A bonding structure enabling fast and reliable methods to fabricate a substantially homogeneous bondline with reduced dependency of a thickness limitation is disclosed. Also, this system creates a bondline targeted for performance in power electronics. This system is highly adaptable as various structures and fabrication options may be implemented. This enables diverse fabrication selection and creates less dependency on outside conditions. The disclosed system is at least applicable to wafer-to-wafer, die-to-wafer, die-to-substrate, or die-to-die bonding.
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11. A method for creating a substantially homogenous bondline of a Cu3Sn alloy material having high conductivity and incorporated in an automotive power electronic device, the method comprising:
providing a first material made of copper (Cu) and having a first surface;
providing a second material made of tin (Sn) and having a second surface;
sandwichably positioning the second material between a first section of the first material and a second section of the first material;
etching within the first surface of the first section of the first material or adding additional material of the first material on the first surface of the first section of the first material to form a plurality of valleys and a plurality of hills having flared ends that increase a surface area of the first material, each hill of the plurality of hills being wider at an end of the hill that at a base of the hill;
etching within the second surface of the second material or adding additional material of the second material on the surface of the second material to form a plurality of valleys and a plurality of hills having flared ends for interlocking with the plurality of hills and the plurality of valleys that were etched within or added on the first surface of the first section of the first material;
melting the second material that is positioned between the plurality of valleys and the plurality of hills that were etched within or added on the first surface of the first section and the second section of the first material; and
via transient liquid phase bonding, creating a substantially homogenous bondline made of the Cu3Sn alloy that is configured to be electrically conductive and incorporated in an automotive power electronic device.
1. A transient liquid phase bonding method for alloy formation control for creating a highly conductive alloy incorporated in an automotive power electronic device, the method comprising:
providing a first material made of copper (Cu) and having a first surface;
etching within the first surface of the first material or adding additional material of the first material on the first surface of the first material to form a plurality of valleys and a plurality of hills having flared ends that increase a surface area of the first material, each hill of the plurality of hills being wider at an end of the hill than at a base of the hill;
providing a second material made of tin (Sn) and having a second surface;
etching within the second surface of the second material or adding additional material of the second material on the second surface of the second material to form a plurality of valleys and a plurality of hills having flared ends for interlocking with the plurality of hills and the plurality of valleys that were etched within or added on the first surface of the first material;
interlocking the plurality of valleys and the plurality of hills that were etched within or added on the first surface of the first material with the plurality of hills and the plurality of valleys that were etched within or added on the second surface of the second material;
melting the second material that is interlocked with the first material such that the second material reflows between the plurality of valleys and the plurality of hills of the first material to create partial liquid diffusion;
reacting the partially diffused material with the second material via isothermal solidification; and
creating a substantially homogenous bondline made of the highly conductive alloy to be incorporated in the automotive power electronic device.
10. A method, comprising:
providing a first block or piece made of a first material and having a first surface;
etching within the first surface of the first block or piece or adding additional material of the first material on the first surface of the first block or piece to form a plurality of bumps and a plurality of valleys on the first block or piece, the plurality of bumps having flared ends, each bump of the plurality of bumps being wider at an end of the bump than at a base of the bump;
providing a second block or piece made of a second material and having a second surface;
etching within the second surface of the second block or piece or adding material of the second material on the second surface of the second block or piece to form a plurality of valleys and a plurality of bumps on the second block or piece that correspond and interlock with the plurality of bumps and the plurality of valleys on the first block or piece, the plurality of bumps of the second block or piece having flared ends for interlocking with the corresponding plurality of valleys of the first block or piece;
sandwichably positioning the second block or piece between the first block or piece and a third block or piece made of the first material;
interlocking the plurality of bumps and the plurality of valleys that were etched within or added on the first surface of the first block or piece with the plurality of valleys and the plurality of bumps that were etched within or added on the second surface of the second block or piece for transient liquid phase bonding;
applying heat to at least the second block or piece to reach a temperature equal to or greater than a bonding temperature of the second material for melting and diffusing the second block or piece, the heat being applied after the plurality of bumps and the plurality of valleys are etched within or added on the second block or piece; and
creating a substantially homogenous bondline of an alloy material.
2. The transient liquid phase bonding method of
3. The transient liquid phase bonding method of
4. The transient liquid phase bonding method of
5. The transient liquid phase bonding method of
6. The transient liquid phase bonding method of
7. The transient liquid phase bonding method of
8. The transient liquid phase bonding method of
9. The transient liquid phase bonding method of
12. The method of
positioning, over the first block or piece, a plurality of molds having a plurality of openings filled with the first material; and
removing the plurality of molds to form the plurality of bumps on the first block or piece and the plurality of valleys on the first block or piece,
wherein the plurality of valleys on the first block or piece have a substantially flat bottom surface for allowing the second material to diffuse into the plurality of valleys to increase a contact surface with the first material for enhancing the creation of the substantially homogeneous bondline.
13. The method of
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The present disclosure relates to alloy formation, and more particularly, to alloy formation using transient liquid phase bonding in power electronics.
Various processes may be used to join materials together. Welding has been used in the automotive industries for years. Welding is the joining together of materials (typically metals or thermoplastics), usually by a fusion process. Design of complex components is often based on the concept of the “weakest link” limiting structural performance. The “ideal joint” would exhibit all of the characteristics of the bulk material comprising the structures being joined. Such a joint is by no means simple to produce.
The automobile fabrication process, and the elements and subsystems within, require highly reliable couplings available in relatively short production windows. Waiting hours for a bond to occur is not an option. An emphasis on the electrical properties of welds and the characteristics of the any alloys in the bond has not been a primary focus in the industry.
The above needs are successfully met via the disclosed system and method. The present disclosure is generally directed to control of alloy formation via transient liquid phase bonding in power electronics. In various embodiments, a technology to improve bonding quality and fabrication reliability of bonding technologies for electronic devices is disclosed. This method is especially useful for bonding technologies generating multiple compounds (or alloys).
This disclosure describes a new bonding technique enabling fast and reliable fabrication of a substantially homogeneous bondline with reduced dependency of a thickness limitation. Stated another way, a substantially homogeneous bondline made of substantially a single alloy without a thickness limitation and excessive bonding time can be achieved using the techniques disclosed herein. A (more) suitable bondline providing better and targeted performance for power electronics may also be achieved. This system is highly adaptable as various structures and fabrication options may be implemented. This enables a diverse selection of fabrication techniques and creates less dependency on outside conditions. This process can be used over a wide field of applications. Moreover, for instance, this process can be used on any application associated with power electronics. For instance, this system is at least applicable to wafer-to-wafer, die-to-wafer, die-to-substrate, or die-to-die bonding. Moreover, this system is compatible with conventional fabrication techniques.
The features and advantages of the embodiments of the present disclosure will become more apparent from the detailed description set forth below when taken in conjunction with the drawings. Naturally, the drawings and their associated descriptions illustrate example arrangements within the scope of the claims and do not limit the scope of the claims. Reference numbers are reused throughout the drawings to indicate correspondence between referenced elements.
In the following detailed description, numerous specific details are set forth to provide a understanding of the present disclosure. It will be apparent, however, to one ordinarily skilled in the art that elements of the present disclosure may be practiced without some of these specific details. In other instances, well-known structures and techniques have not been shown in detail to avoid unnecessarily obscuring the present disclosure.
The present disclosure is generally directed to control of alloy formation via transient liquid phase bonding in power electronics. Transient liquid phase (TLP) bonding produces joints that have microstructural and hence mechanical properties similar to those properties of the base materials. TLP bonding differs from diffusion bonding in which diffusion occurs when a melting point depressant element from an interlayer moves into lattice and grain boundaries of the substrates at the bonding temperature. Solid state diffusional processes lead to a change of composition at the bond interface and the dissimilar interlayer melts at a lower temperature than the parent materials. Thus, a thin layer of liquid spreads along the interface to form a joint at a lower temperature than the melting point of either of the parent materials. A reduction in bonding temperature leads to solidification of the melt, and this phase can subsequently be diffused away into the parent materials by holding at bonding temperature.
In various embodiments, a system and method 100 to improve bonding quality and fabrication reliability of bonding technologies for electronic devices is disclosed. This method 100 is especially useful for bonding technologies generating multiple compounds (or alloys).
With reference to
An overview of TLP is illustrated in
In some TLP materials, multiple A+B alloys may generate multiple compounds such as depicted in step 5 of
In general, a particular alloy of the multiple available alloys may be more suitable for power electronics applications, due to the high power usage and high temperature generation of the power electronics, such as a conductive bondline. For example, the Cu3Sn alloy has higher electrical conductivity as compared to Cu6Sn5, even though both alloys are generated during Cu—Sn TLP bonding process (Cu3Sn corresponds to alloy B+ and Cu6Sn5 corresponds to alloy A+). Thus, for power electronics, a target may be to utilize a process to create a homogeneous bondline made of the preferred material (e.g., Cu3Sn alloy instead of Cu6Sn5). The above disclosed needs are successfully met via the disclosed system and method 100.
Copper-tin (Cu—Sn) TLP bonding has a complicated phase diagram (shown in
TABLE 1
Material System
Bonding Process
Remelt Temp.
Copper - Tin
4 min at 280° C.
>415° C.
Silver - Tin
60 min at 250° C.
>600° C.
Silver - Indium
120 min at 175° C.
>880° C.
Gold - Tin
15 min at 260° C.
>278° C.
Gold - Indium
0.5 min at 200° C.
>495° C.
Nickel - Tin
6 min at 300° C.
>400° C.
In various embodiments the present system 100 may be utilized to achieve a homogeneous bondline made of a single alloy. For instance, a single alloy may be achieved based on attributes targeted to power electronics applications. One example alloy is Cu3Sn which is more suitable in power electronics compared to other alloys, such as Cu6Sn5. The present system 100 may be configured to fabricate a thick bondline, which is advantageous in reducing bondline stress induced by high temperature. Also, aiding in mass production, the present system does not require long bonding time and is less depend on fabrication conditions. For instance, the bonding process of the present system 100 is between about 30 minutes to about 2 hours. The present system 100 provides excellent contact and good electrical and thermal conductivity to bonded devices, and therefore, improves device performance as well as bonding quality over prior techniques.
Multiple structures and fabrication options are proposed. Various materials may be used. Also, a pre-treatment of a material surface may be performed. This variety enables a flexible design and fabrication process and easy translation of this technology to many applications. For instance, this system and method 100 may be applied to wafer-to-wafer, die-to-wafer, die-to-substrate, or die-to-die bonding. Also, the presently disclosed technology 100 is compatible with conventional fabrication techniques.
With reference to
A system 100 using a Cu—Sn is disclosed; however, an analogous method 100 can be used in other two-material TLP bonding that generates multiple alloys (such as those disclosed in table 1). For example the first material, material A 50 and the second material, material B 75, may comprise any of copper, tin, silver, indium, gold, nickel, and/or boron. The two most common alloys of Cu—Sn (Cu3Sn and Cu6Sn5) may be formed in following ways. First, Cu (material A 50) reacts with Sn (material B 75) and produces the first Cu—Sn alloy, Cu6Sn5. This Cu6Sn5 may react with left-over Cu 50 and form Cu3Sn. Therefore, in various embodiments the Cu6Sn5 is configured to have increased contact with Cu 50, which expedites the reaction between the two materials and forms Cu3Sn more rapidly. Thus, a resultant uniform bondline of substantially only Cu3Sn may be achieved in shorter time compared to the flat surface (
This method 100 has another advantage other than fabricating a homogeneous bondline at relatively short time. In power electronics, a bondline proving high electrical conductivity is beneficial. Cu3Sn has higher electrical conductivity than Cu6Sn5 and thus is generally better suited for power electronics. Stated another way, the techniques disclosed herein create a bondline made of substantially only Cu3Sn without Cu6Sn5 which is well suited for power electronics applications.
As previously disclosed, the wavy surface approach of
The arrangement of the structures may also be varied. For instance,
In various embodiments, material B 75 may be sandwiched between two sections. These two sections may both be material A 50 or be made of material A and another material having altered surface features.
In various embodiments, material A 50 and/or material B 75 may have altered surface features. For instance, applying a surface feature such as a pattern to material A 50 (having a high melting temperature) without applying a surface feature, such as a pattern, to material B 75, may be convenient for fabrication. This is because the material B 75 will be melted during TLP bonding process (
For example, during assembly (
The altered surface properties, e.g., wavy surface and/or pattern, can be fabricated in numerous ways. For instance, the altered surface properties may be by (1) etching and/or (2) deposition. In general, etching is removing unwanted areas and deposition is adding wanted area. Etching can be achieved in multiple fashions. For instance, etching can be achieved by chemical etching (usage of liquid removing material A 50), dry etching (usage of gas or plasma removing material A 50), mechanical grinding or scribing, or high energy beam etching such as laser etching. Deposition can be achieved in multiple fashions. For example, deposition can be achieved by depositing additional material A 50 through a mask using electroplating, evaporating, or supporting; pattern transfer such as nano-pattern transfer or selective bonding of material A 50; or growth of material A 50.
This disclosure describes a new bonding system 100 enabling fast and reliable fabrication of a homogeneous bondline with reduced dependency of thickness limitation. This system 100 is highly adaptable as various structures and fabrication options may be implemented. This enables less dependency on fabrication conditions. This process can be used over a wide field of applications. For instance, this process 100 can be used on any application associated with power electronics. For instance, this system 100 is applicable to wafer-to-wafer, die-to-wafer, die-to-substrate, or die-to-die bonding. Moreover, this system 100 is compatible with conventional fabrication techniques.
Those of ordinary skill will appreciate that the various illustrative logical blocks and process steps described in connection with the examples disclosed herein may be implemented as electronic hardware, computer software, or combinations of both. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Ordinarily skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the disclosed apparatus and methods.
The steps of a method or algorithm described in connection with the examples disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an Application Specific Integrated Circuit (ASIC).
The foregoing description of the disclosed example embodiments is provided to enable any person of ordinary skill in the art to make or use the present invention. Various modifications to these examples will be readily apparent to those of ordinary skill in the art, and the principles disclosed herein may be applied to other examples without departing from the spirit or scope of the present invention. The described embodiments are to be considered in all respects only as illustrative and not restrictive and the scope of the invention is, therefore, indicated by the following claims rather than by the foregoing description. All changes which come within the meaning and range of equivalency of the claims are to be embraced within their scope.
Yoon, Sang Won, Shiozaki, Koji
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