A circuit package panel containing a packaging of epoxy mold compounds and a circuit device in the packaging, wherein the packaging comprises, at least one hybrid layer of a first epoxy mold compound and a second epoxy mold compound of a different composition.
|
1. A circuit package panel comprising
a front and back face,
a packaging of epoxy mold compounds, and
a circuit device in the packaging, wherein
the packaging comprises, parallel to the front face, at least one hybrid layer of a first epoxy mold compound and next to it a second epoxy mold compound of a different composition;
wherein
the circuit device is a fluidic device comprising a fluid channel array, and
the second compound comprises fluid holes to deliver fluid to the circuit device.
17. A circuit package, comprising
a packaging formed of a plurality of different epoxy mold compounds, the packaging having a front face; and
a circuit device disposed in the packaging near the front face;
said plurality of epoxy mold compounds comprising, parallel to the front face, at least one hybrid layer of
a bulk epoxy mold compound, and
a second epoxy mold compound of a different composition than the bulk epoxy mold compound, next to the bulk epoxy mold compound; and
at least two additional caps of different epoxy mold compounds between the first and second epoxy mold compounds, the mold compounds having varying Coefficients of Thermal Expansion (CTE) based on varying filler density, where filler density decreases, increases and then decreases again in a direction away from the circuit device moving through the epoxy mold compounds.
3. The circuit package of
the circuit device extends in the first compound, and,
the second compound surrounds the first compound.
4. The circuit package of
5. The circuit package of
6. The circuit package of
7. The circuit package of
8. The circuit package of
9. The circuit package of
10. The circuit package of
11. The circuit package of
12. The circuit package of
13. The circuit package of
14. The circuit package of
the circuit device is disposed in the first compound, and,
the second compound surrounds the first compound,
wherein the first compound extends under the circuit device and under the second compound.
15. The circuit package of
16. The circuit package of
|
Circuits such as integrated circuits are oftentimes packaged in an epoxy mold compound packaging to support and protect the circuitry. Depending on the manufacturing method used, it may be difficult to control dimensions, shapes or certain properties of packaged circuits.
For the purpose of illustration, certain examples constructed in accordance with this disclosure will now be described with reference to the accompanying drawings, in which:
In the following detailed description, reference is made to the accompanying drawings. The examples in the description and drawings should be considered illustrative and are not intended as limiting to the specific example or element described. Multiple examples can be derived from the following description and drawings through modification, combination or variation of the different elements.
The circuit package 1 may be a component of, or an intermediate product for, a larger apparatus. The circuit package 1 includes a circuit device 3 packaged in a hybrid epoxy mold compound packaging 5. The packaging 5 includes at least two epoxy mold compounds 7, 9 that are each of different compositions. For example a filler density or filler diameter of each compound 7, 9 may be different. The circuit device 3 is provided near a front face F of the circuit package 1, opposite to a back face B.
The packaging 5 includes at least one hybrid layer HL that includes both epoxy mold compounds 7, 9. The hybrid layer HL extends parallel to the front face F of the circuit package 1. In the illustrated example the packaging consists of the hybrid layer HB but in other examples the hybrid layer HB may be provided between other layers that may consist of a single epoxy mold compound.
The example epoxy mold compounds 7, 9 of different compositions that are patterned in a single plane X-Y. For example, one of the compounds 7 is a bulk compound (i.e. that forms the bulk of the total volume of the packaging), while the other compound 9 may be patterned with respect to the bulk compound to control certain properties associated with the manufacture or use of the circuit device 1.
In one example the patterned second compound 9 has a different CTE (Coefficient of Thermal Expansion) than the first compound 7 of the same hybrid layer HL, to control warpage of the panel that would otherwise occur because of a higher CTE of the bulk epoxy mold compound with respect to the lower CTE of the circuit device 3. For example, the circuit device 3 may be contain conductive and/or semi-conductor materials that generally have lower CTEs than bulk epoxy mold compounds. The difference in CTEs may generate deformations in the package during cooling. To counter deformations such as warpage, the CTE is altered. The CTE can be altered by varying the weight percentage of the fillers in the compound, also referred to as filler density.
In other examples, one of the compounds could have a different average filler diameter, filler length or different weight and/or volume percentages of added components like fillers or other components. For example, a filler diameter can influence certain surface characteristics of laser ablated or cut panel parts. By patterning the second compound in the first compound (or vice versa) certain properties of the circuit package 1 can be controlled during manufacture or use of the circuit package 1.
In the illustrated example the circuit device 103 extends in the first compound 107. The first compound 107 surrounds the circuit device 103 at the sides and back of the circuit device 103. The second compound 109 surrounds the first compound 107 within the hybrid layer HL. The second epoxy compound 109 extends along the sides and over the first compound 107. Hence, the second epoxy mold compound 109, the first epoxy mold compound 107 and the circuit device 103 are disposed next to each other. The first compound 107 may be a bulk compound of the packaging 105 and may extend under the second compound 109 and under the hybrid layer HL. The first compound 107 may form the back surface B of the circuit package 101.
The circuit package can be manufactured through compression molding. Compression molding involves heating an epoxy mold compound disposed in a mold, depositing the circuit device and compressing the assembly of the compound and the circuit device, and cooling the circuit package 101. The thermal expansion of the circuit device 103 and the thermal expansion of the first epoxy mold compound 107 are different. Hence, warpage could occur during cooling, if the circuit device 103 would be packaged in a packaging of the first or second epoxy mold compound only. For example, the back surface B could curve into a concave shape.
In one example, the second epoxy mold compound 109 has a higher CTE than the first epoxy mold compound 107. In a further example the second epoxy mold compound 109 has a lower weight percentage of fillers than the first epoxy mold compound 107 to achieve the higher CTE. A hybrid layer HL that includes both the first and second epoxy mold compound is deposited adjacent to the circuit device 103 to increase an overall CTE of the entire hybrid layer HL. This may compensate for the difference in CTE with the back surface B and control overall panel warpage. For example, the second epoxy mold compound 109 is disposed in a strategic quantity (e.g. thickness, surface) and location in the hybrid layer HL, near the front surface F.
By disposing a layer of the second epoxy mold compound 109 around the first epoxy mold compound 107 near the circuit device 103, an overall thermal expansion of the hybrid layer HL during cooling may be similar as, or of inverse shape with respect to, the thermal expansion near the back surface B. The second epoxy mold compound 109 can be patterned around the circuit device 103 and around the first epoxy mold compound 107 so as to control the bow or warpage of the circuit package 1. By obtaining a better control over panel bow with some of the example packages of this disclosure, certain design constraints can be relieved, such as circuit device thickness (versus length and width), number of circuit devices in a packaging, packaging thickness, mold temperature settings, substrate handling downstream of a compression mold such as an electrical redistribution layer (RDL) fabrication process, packaging clamping during cooling, and more.
In other examples that are not illustrated, the filler density may decrease in a direction away from the circuit device. In yet other examples the filler density may vary, for example by first decreasing, increasing and decreasing again, in a direction away from the circuit device 503. In yet other examples, the gradient can be one of varying filler fineness, filler diameters, or other additives quantity or additives weight, etc. Having a gradient of a certain filler or other component or property may allow for a gradient of certain properties in a desired direction or location in the package 501.
In one example the fluid holes 723 are provided through at least part of the second epoxy mold compound. In the illustrated example the second epoxy mold compound extends from a back to a front face B, F of the package 701, whereby the fluid holes 723 extend completely through the second epoxy mold compound. In other examples the second epoxy mold compound may extend up to a back of the circuit devices 703, not reaching the front face F.
The second epoxy mold compound 707 may include on average finer fillers than the first epoxy mold compound 709. On average, the diameters of the fillers in the second epoxy mold compound 709 are smaller than the diameters of the fillers in the first epoxy mold compound. The finer fillers may allow for smoother walls of the fluid holes 723. For example the fluid holes 723 may be manufactured through laser ablation and the finer fillers allow for smoother walls after said laser ablation.
In other fluidic or non-fluidic applications similar panel-shaped packagings may be provided that package arrays of circuit devices, in rows and/or columns.
Some of the described example packagings of this disclosure include multiple epoxy mold compounds having different CTEs. In an example, the CTEs of the epoxy mold compounds of this description can be determined by a weight percentage of fillers in the epoxy mold compound. For example, the CTE is inversely proportional to a filler concentration in the compound. In one example the first epoxy mold compound has a weight percentage of fillers of approximately 90%, corresponding to a CTE of approximately 6 ppm/C. An example of an industry standard epoxy mold compound having such characteristics is CEL400ZHF40 W from Hitachi Chemical, Ltd®. For example the second epoxy mold compound has a weight percentage of fillers of approximately 87% and a CTE of approximately 9 ppm/C. An example of an industry standard epoxy mold compound having such characteristics is CEL400ZHF40 W-87. In other examples the weight percentage of filler in the first epoxy mold compound can be between 87 and 91%. For example the CTE of the first epoxy mold compound can be between approximately 6 and 9 ppm/C. In another example the weight percentage of filler in the second epoxy mold compound can be between 82 and 87%. For example, the CTE of the second epoxy mold compound is between 9 and 14 ppm/C. A different example of different CTEs of the first and second epoxy mold compound is 6 ppm/C and 13 ppm/C, respectively. An example of a CTE of a silicon of which a circuit device may be composed is approximately 3 ppm/C.
Some of the examples of this disclosure describe placement of an extra epoxy mold compound of a different composition than a bulk epoxy mold compound, next to the circuit devices and the bulk epoxy compound, hence providing for a “patterning” effect in a hybrid layer of both compounds. Effects of such example circuit packages may include at least one of reducing bow, increasing design space, improving fluidic properties, improving electrical properties, and/or eliminating the need to add components or manufacturing process steps.
The circuit package of the various examples described in this disclosure may be a subcomponent of a larger package or device, or an intermediate product of an end product. For example multiple other layers or components can be attached to the back or front surface. Hence, when the circuit package is a subcomponent, the back or front surface may not be visible or not apparent.
The various examples of circuit packages and manufacturing methods may relate to integrated circuit packaging for example for computer components. In further examples, the packages and methods may involve fluidic applications such as 2D or 3D printing, digital titration, other microfluidic devices, etc. In different examples, the fluid may include liquids, inks, printing agents, pharmaceutical fluids, bio-fluids, etc.
The example circuit packages can have any orientation: the descriptive terms “back” and “front” should be understood as relative to each other only. Also, the example sheets or panels of this disclosure have a thickness in a Z-direction and a width and length along an X-Y plane. The thickness of the package may be relatively thin with respect to the width and length. In certain examples, the filler density varies over the thickness.
Cumbie, Michael W, Chen, Chien-Hua
Patent | Priority | Assignee | Title |
Executed on | Assignor | Assignee | Conveyance | Frame | Reel | Doc |
Mar 26 2015 | CHEN, CHIEN-HUA | HEWLETT-PACKARD DEVELOPMENT COMPANY, L P | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 044284 | /0950 | |
Mar 27 2015 | Hewlett-Packard Development Company, L.P. | (assignment on the face of the patent) | / | |||
Mar 27 2015 | CUMBIE, MICHAEL W | HEWLETT-PACKARD DEVELOPMENT COMPANY, L P | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 044284 | /0950 |
Date | Maintenance Fee Events |
Jan 30 2023 | REM: Maintenance Fee Reminder Mailed. |
Jul 17 2023 | EXP: Patent Expired for Failure to Pay Maintenance Fees. |
Date | Maintenance Schedule |
Jun 11 2022 | 4 years fee payment window open |
Dec 11 2022 | 6 months grace period start (w surcharge) |
Jun 11 2023 | patent expiry (for year 4) |
Jun 11 2025 | 2 years to revive unintentionally abandoned end. (for year 4) |
Jun 11 2026 | 8 years fee payment window open |
Dec 11 2026 | 6 months grace period start (w surcharge) |
Jun 11 2027 | patent expiry (for year 8) |
Jun 11 2029 | 2 years to revive unintentionally abandoned end. (for year 8) |
Jun 11 2030 | 12 years fee payment window open |
Dec 11 2030 | 6 months grace period start (w surcharge) |
Jun 11 2031 | patent expiry (for year 12) |
Jun 11 2033 | 2 years to revive unintentionally abandoned end. (for year 12) |