A method of operating a data storage device is disclosed comprising an enclosure comprising a first head actuated over a first disk surface and a second head actuated over a second disk surface. A manufacture printed circuit board (pcb) is coupled to the enclosure, wherein the manufacture pcb comprises at least one dual channel configured to execute concurrent access operations. While the manufacture pcb is coupled to the enclosure, the data storage device is operated as a dual channel device. The manufacture pcb is decoupled from the enclosure and a product pcb is coupled to the enclosure, wherein the product pcb comprises a single channel configured to execute a single access operation.
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20. A method of operating a data storage device comprising an enclosure, the method comprising:
coupling a manufacture printed circuit board (pcb) to the enclosure;
while the manufacture pcb is coupled to the enclosure, operating the data storage device as a dual channel device;
decoupling the manufacture pcb from the enclosure and coupling a product pcb to the enclosure; and
while the product pcb is coupled to the enclosure, operating the data storage device as a single channel device.
10. A method of operating a data storage device comprising an enclosure, the method comprising:
coupling a manufacture printed circuit board (pcb) to the enclosure, wherein the manufacture pcb comprises at least one dual channel configured to execute concurrent access operations;
while the manufacture pcb is coupled to the enclosure, operating the data storage device as a dual channel device; and
decoupling the manufacture pcb from the enclosure and coupling a product pcb to the enclosure, wherein the product pcb comprises a single channel configured to execute a single access operation.
1. A method of operating a data storage device comprising an enclosure comprising a first head actuated over a first disk surface and a second head actuated over a second disk surface, the method comprising:
coupling a manufacture printed circuit board (pcb) to the enclosure, wherein the manufacture pcb comprises at least one dual channel configured to execute concurrent access operations;
while the manufacture pcb is coupled to the enclosure, operating the data storage device as a dual channel device; and
decoupling the manufacture pcb from the enclosure and coupling a product pcb to the enclosure, wherein the product pcb comprises a single channel configured to execute a single access operation.
2. The method as recited in
3. The method as recited in
generating a first channel signal applied to the first preamp circuit to execute a first access operation of the first disk surface; and
generating a second channel signal applied to the second preamp circuit to execute a second access operation of the second disk surface.
4. The method as recited in
5. The method as recited in
generating a first channel signal applied to the first dual channel preamp circuit to execute a first access operation of the first disk surface; and
generating a second channel signal applied to the first dual channel preamp circuit to execute a second access operation of the second disk surface.
6. The method as recited in
7. The method as recited in
generating a third channel signal applied to the second dual channel preamp circuit to execute a third access operation of the third disk surface; and
generating a fourth channel signal applied to the second dual channel preamp circuit to execute a fourth access operation of the fourth disk surface.
8. The method as recited in
9. The method as recited in
11. The method as recited in
12. The method as recited in
13. The method as recited in
generating a first channel signal applied to the first preamp circuit to execute a first access operation; and
generating a second channel signal applied to the second preamp circuit to execute a second access operation.
14. The method as recited in
15. The method as recited in
generating a first channel signal applied to the first dual channel preamp circuit to execute a first access operation; and
generating a second channel signal applied to the first dual channel preamp circuit to execute a second access operation.
16. The method as recited in
17. The method as recited in
generating a third channel signal applied to the second dual channel preamp circuit to execute a third access operation; and
generating a fourth channel signal applied to the second dual channel preamp circuit to execute a fourth access operation.
18. The method as recited in
19. The method as recited in
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Data storage devices such as disk drives comprise a disk and a head connected to a distal end of an actuator arm which is rotated about a pivot by a voice coil motor (VCM) to position the head radially over the disk. The disk comprises a plurality of radially spaced, concentric tracks for recording user data sectors and embedded servo sectors. The embedded servo sectors comprise head positioning information (e.g., a track address) which is read by the head and processed by a servo controller to control the velocity of the actuator arm as it seeks from track to track.
A disk drive typically comprises a plurality of disks each having a top and bottom surface accessed by a respective head. That is, the VCM typically rotates a number of actuator arms about a pivot in order to simultaneously position a number of heads over respective disk surfaces based on servo data recorded on each disk surface.
In the embodiment of
In one embodiment, the enclosure 16 shown in
Any suitable manufacture procedure may be executed by the manufacture PCB 22, wherein in one embodiment the data storage device is operated as a dual channel device during the manufacturing procedure meaning that at least two of the heads are concurrently accessing respective disk surfaces (e.g., concurrent writes, concurrent reads, or concurrent write/read). For example, the manufacture PCB 22 may execute a servo writing procedure wherein servo sectors (such as shown in
In one embodiment, when executing concurrent operations the manufacture PCB 22 may execute concurrent access operations to top and bottom surfaces of a disk. For example, in one embodiment the manufacture PCB 22 may bank write servo sectors to the top and bottom surfaces in order to improve the coherency of the servo sectors. In this manner, when executing an access operation concurrently to top and bottom surfaces the coherency of the servo sectors enables the concurrent tracking of heads over the top and bottom surfaces. For example, the coherency of the servo sectors may enable the stroke of secondary actuators to track the deviations between top and bottom data tracks. In addition, the coherency of the servo sectors across the top and bottom surfaces may be substantially maintained in the event the disk is subject to thermal expansion or disk slip relative to a spindle of a spindle motor configured to rotate the disks.
In the embodiment of
In one embodiment, the manufacture PCB 22 may comprise control circuitry capable of executing concurrent access commands to the top/bottom surfaces of multiple disks. That is in one embodiment, instead of the interfaces 501 and 502 being wire-ORed as shown in the embodiment of
In the embodiments described above, the interface between the manufacture PCB 22 or product PCB 28 and the enclosure 16 may be implemented in any suitable manner. In one embodiment, the interface may comprise a parallel interface or a serial interface, or in another embodiment a combination of a parallel and a serial interface. For example, in one embodiment the write/read lines may be implemented using dedicated interface lines, whereas certain commands (e.g., the head selection command) may be transmitted to the preamp circuits over a serial interface. In yet another embodiment, the interface may comprise a wireless interface, such as a suitable Wi-Fi interface.
In one embodiment, the interface between the manufacture PCB 22 or product PCB 28 and the enclosure 16 may include control signals for controlling a primary actuator (e.g., a VCM 38) and one or more secondary actuators (e.g., a PZT) configured to actuate the heads radially over the disk surfaces. In one embodiment, the control signals for the secondary actuator(s) generated by the product PCB 28 may be effectively wire-ORed such as shown in
In one embodiment after coupling the product PCB 28 to the enclosure 16, the product control circuitry 52 may execute additional manufacturing procedures prior to shipping the data storage device to a customer. For example, in one embodiment the product control circuitry 52 may execute manufacturing procedures that verify the functionality of the product PCB 28 as well as test and/or compensate for variations between the manufacture PCB 22 and the product PCB 28. In other embodiments, the product PCB 28 may execute any suitable finishing manufacturing procedures, such as executing additional testing/calibration procedures, and/or writing operating system and/or calibration data to one or more of the disks.
In the embodiments described above, the storage medium of the data storage device is a disk, such as a magnetic disk. Other embodiments may employ other types of storage mediums, such as a magnetic tape. That is, the enclosure 16 shown in
Any suitable control circuitry may be employed to implement the flow diagrams in the above embodiments, such as any suitable integrated circuit or circuits. For example, the control circuitry may be implemented within a read channel integrated circuit, or in a component separate from the read channel, such as a data storage controller, or certain operations described above may be performed by a read channel and others by a data storage controller. In one embodiment, the read channel and data storage controller are implemented as separate integrated circuits, and in an alternative embodiment they are fabricated into a single integrated circuit or system on a chip (SOC). In addition, the control circuitry may include a suitable power large scale integrated (PLSI) circuit implemented as a separate integrated circuit, integrated into the read channel or data storage controller circuit, or integrated into a SOC.
In one embodiment, the control circuitry comprises a microprocessor executing instructions, the instructions being operable to cause the microprocessor to perform the flow diagrams described herein. The instructions may be stored in any computer-readable medium. In one embodiment, they may be stored on a non-volatile semiconductor memory external to the microprocessor, or integrated with the microprocessor in a SOC. In another embodiment, the instructions are stored on the disk and read into a volatile semiconductor memory when the disk drive is powered on. In yet another embodiment, the control circuitry comprises suitable logic circuitry, such as state machine circuitry. In some embodiments, at least some of the flow diagram blocks may be implemented using analog circuitry (e.g., analog comparators, timers, etc.), and in other embodiments at least some of the blocks may be implemented using digital circuitry or a combination of analog/digital circuitry.
In various embodiments, a disk drive may include a magnetic disk drive, a hybrid disk drive comprising non-volatile semiconductor memory, a tape drive, etc. In addition, some embodiments may include electronic devices such as computing devices, data server devices, media content storage devices, etc. that comprise the storage media and/or control circuitry as described above.
The various features and processes described above may be used independently of one another, or may be combined in various ways. All possible combinations and subcombinations are intended to fall within the scope of this disclosure. In addition, certain method, event or process blocks may be omitted in some implementations. The methods and processes described herein are also not limited to any particular sequence, and the blocks or states relating thereto can be performed in other sequences that are appropriate. For example, described tasks or events may be performed in an order other than that specifically disclosed, or multiple may be combined in a single block or state. The example tasks or events may be performed in serial, in parallel, or in some other manner. Tasks or events may be added to or removed from the disclosed example embodiments. The example systems and components described herein may be configured differently than described. For example, elements may be added to, removed from, or rearranged compared to the disclosed example embodiments.
While certain example embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions disclosed herein. Thus, nothing in the foregoing description is intended to imply that any particular feature, characteristic, step, module, or block is necessary or indispensable. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the methods and systems described herein may be made without departing from the spirit of the embodiments disclosed herein.
Contreras, John T., Kobayashi, Masahito, Reinhart, Robert C., Parken, Alec, Noda, Junzo, Esmond, Michael J.
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