Techniques are provided for authentication using pairwise secrets constructed from partial secrets. One method comprises obtaining, by a first entity of a communication between the first entity and a second entity, partial secrets associated with the first and second entities; generating a constructed secret for the communication by applying a cryptographic function to the partial secrets associated with the first and second entities; and authenticating the communication using the constructed secret. A control entity may assign a substantially unique partial secret to each of multiple first and second entities and distribute at least a subset of the assigned partial secrets to at least some of the first and second entities. A communication between given first and second entities can be authenticated using a pairwise constructed secret for the given communication generated by applying the cryptographic function to the partial secrets associated with the first and second entities.
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1. A method, comprising:
obtaining a partial secret associated with a first entity associated with a communication between the first entity and a second entity and a partial secret associated with the second entity, wherein the partial secret associated with the first entity and the partial secret associated with the second entity are assigned by a control entity;
generating a constructed secret for the communication by applying a cryptographic function to the partial secret associated with the first entity and the partial secret associated with the second entity; and
authenticating the communication using the constructed secret,
wherein the method is performed by at least one processing device of the first entity, said at least one processing device comprising a processor coupled to a memory.
11. An apparatus comprising:
at least one processing device of a first entity associated with a communication between the first entity and a second entity, wherein the at least one processing device comprises a processor coupled to a memory;
the at least one processing device being configured to implement the following steps:
obtaining a partial secret associated with the first entity and a partial secret associated with the second entity, wherein the partial secret associated with the first entity and the partial secret associated with the second entity are assigned by a control entity;
generating a constructed secret for the communication by applying a cryptographic function to the partial secret associated with the first entity and the partial secret associated with the second entity; and
authenticating the communication using the constructed secret.
17. A non-transitory processor-readable storage medium having stored therein program code of one or more software programs, wherein the program code, when executed by at least one processing device of a first entity associated with a communication between the first entity and a second entity, causes the at least one processing device to perform the following steps:
obtaining a partial secret associated with the first entity and a partial secret associated with the second entity, wherein the partial secret associated with the first entity and the partial secret associated with the second entity are assigned by a control entity;
generating a constructed secret for the communication by applying a cryptographic function to the partial secret associated with the first entity and the partial secret associated with the second entity; and
authenticating the communication using the constructed secret.
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The field relates generally to information processing systems, and more particularly to authentication techniques in such systems.
Many authentication solutions are based upon a client proving knowledge to another computing device of a secret value, such as a password, a personal identification number or a symmetric key. The Challenge Handshake Authentication Protocol (CHAP), for example, is an identity verification protocol where an authenticator entity sends a challenge message to an entity requesting access (e.g., an initiator of a communication between the two entities). The entity requesting access responds with a value calculated using a “one-way hash” function applied to the challenge and a secret value. The authenticator entity evaluates the response against an expected hash value.
A need exists for improved techniques for authenticating communications.
In one embodiment, a method comprises obtaining, by at least one processing device of a first entity associated with a communication between the first entity and a second entity, a partial secret associated with the first entity and a partial secret associated with the second entity, wherein the partial secret associated with the first entity and the partial secret associated with the second entity are assigned by a control entity; generating a constructed secret for the communication by applying a cryptographic function to the partial secret associated with the first entity and the partial secret associated with the second entity; and authenticating the communication using the constructed secret.
In some embodiments, the control entity assigns a substantially unique partial secret to each first entity of a plurality of first entities and a substantially unique partial secret to each second entity of a plurality of second entities and distributes at least a subset of the assigned partial secrets to at least a subset of the first entities and to at least a subset of the second entities using a control communication path. A given communication between a given first entity and a given second entity can be authenticated using a pairwise constructed secret for the given communication generated by applying the cryptographic function to the partial secret associated with the given first entity and the partial secret associated with the given second entity.
Other illustrative embodiments include, without limitation, apparatus, systems, methods and computer program products comprising processor-readable storage media.
Illustrative embodiments of the present disclosure will be described herein with reference to exemplary communication, storage and processing devices. It is to be appreciated, however, that the disclosure is not restricted to use with the particular illustrative configurations shown. One or more embodiments of the disclosure provide methods, apparatus and computer program products for authentication using pairwise secrets constructed from partial secrets.
In one or more embodiments of the disclosure, a communication between a first entity and a second entity is authenticated using partial secrets that are associated with each entity and assigned by a control entity. In at least some embodiments of the disclosure, the partial secrets assigned to each entity are known to both entities associated with the given communication. A constructed secret for the communication is generated by at least one of the entities by applying a cryptographic function to the partial secret associated with the first entity and the partial secret associated with the second entity. The communication is then authenticated using the constructed secret.
With at least some existing implementations of the CHAP protocol, a single secret is used for each entity requesting access to connect to all authenticators. With the disclosed techniques for authentication using pairwise secrets, different pairwise secrets are used for each pair of entities. In this manner, a pairwise secret for a given communication is based on a first secret value assigned to a first entity associated with the given communication, such as an authenticator entity, and a second secret value assigned to the second entity associated with the given communication, such as entity requesting access.
While one or more embodiments of the disclosure are illustrated herein using the CHAP protocol in the context of a storage system, the disclosed techniques may be applied to any environment where pairwise secrets can be used to authenticate an entity, as would be apparent to a person of ordinary skill in the art. For example, the disclosed techniques for authentication using pairwise secrets can be employed to authenticate any directory-based communications where a directory service or another control entity distributes control mappings (e.g., identifies peers and other entities) and credentials among devices and then the devices communicate directly. It is noted that CHAP-based authentication is one standard for a storage over IP (internet protocol) medium.
The client nodes 110 include various types of applications that issue data input/output (I/O) requests to storage volumes. For example, the client nodes 110 include user applications, server applications, database applications, virtual machines and containers. The client nodes 110 can be hosted by, and execute on, various types of computing devices and systems including, but not limited to, desktop computers, laptop computers, workstations, computer servers, enterprise servers, rack servers, smart phones and electronic tablets.
A number of storage systems rely on initiator authentication to enforce volume access permissions. With the CHAP authentication protocol, for example, the initiator holds a secret that is used to authenticate the initiator with target data storage resources 150. One or more embodiments of the disclosure provide techniques for authentication using pairwise secrets constructed from partial secrets.
While the communications network 120 is generically depicted in
In some embodiments, the data storage resources 150 comprise direct-attached storage (DAS) resources (internal and/or external storage resources of the server node 130), wherein the storage devices 152 are virtually pooled into shared block storage by the control system. For example, the storage devices 152 include the same type, or a combination of different types of persistent storage devices (e.g., physical block devices) such as hard disk drives (HDDs), solid-state drives (SSDs) (e.g., flash storage devices), peripheral component interconnect express (PCIe) flash cards, or other types and combinations of non-volatile memory. The data storage resources 150 are directly connected to the server node 130 through, e.g., a host bus adapter, and using suitable protocols such as ATA (AT Attachment), SATA (Serial ATA), eSATA (external Serial ATA), non-volatile memory express (NVMe), SCSI, and SAS. In an exemplary embodiment, the storage devices 152 include both HDD and SSD storage devices. As is known in the art, SSD storage devices provide faster storage performance than HDD devices. While
In the software-defined storage environment of
The control system is a component of the software-defined storage environment shown in
The control system supports the virtualization of storage by separating the control and management software from the hardware architecture. The control system is configured to abstract storage access services from the underlying storage hardware to thereby control and manage I/O requests issued by the client nodes 110, as well as to support networking and connectivity. As shown in
As shown in
The exemplary metadata manager 132 also comprises a partial secret assignment module 134 and a volume migration engine 136. In some embodiments, the exemplary partial secret assignment module 134 implements a process in accordance with
On the client-side, a storage data client (SDC), as discussed further below in conjunction with
It is to be appreciated that this particular arrangement of elements 134, 136 illustrated in the metadata manager 132 of the
At least portions of one or more of the elements 134, 136 may be implemented at least in part in the form of software that is stored in memory and executed by a processor.
As noted above, computing system 100 comprises a software-defined storage system that implements the disclosed techniques for balancing storage blocks using volume part migration. In one exemplary implementation, the software-defined storage system may be implemented using the Dell EMC ScaleIO® software-defined storage product, commercially available from Dell EMC of Hopkinton, Mass. The Dell EMC ScaleIO™ software-defined storage product is also known as the VxFlex OS® software-defined storage product and/or the PowerFlex OS® software-defined storage product.
The SDC module 116 is an initiator on the client node 110-1 for write operations to storage volumes and to read from storage volumes, where a given storage data server (SDS), as discussed further below in conjunction with
At least portions of one or more of the modules 112, 114, 116 may be implemented at least in part in the form of software that is stored in memory and executed by a processor.
As noted above, a given SDS is a target for I/O operations initiated by a given client node 110. In addition, a given SDS serves a portion of a given storage volume. For example, if there are 50 data storage resources 150-1 in the computing system 100, each data storage resource 150-1 has multiple (potentially hidden) storage devices 152 and a portion of a storage volume desired by a given client node 110. The portion of the storage volume stored by each SDS does not need to be the same size for all SDS (e.g., some SDSs can store more than 1/50th of a storage volume and some SDSs can store less than 1/50th of a storage volume). In addition, the portion of storage volume that resides on a single SDS does not need to be consecutive (e.g., an SDS can carry several non-consecutive spans of the virtual volume; eventually, however, all volume spans, on all hosted SDSs, sum up to the full virtual volume space). It is noted that volume space does not need to be physically allocated on the SDS, and can be virtually assigned. In addition, a given SDS will consume the assigned volume space if, and when, the user actually starts using the volume space by writing to the volume space. It is to be appreciated that this particular arrangement of modules 154, 156, 158 illustrated in the data storage resource 150-1 of the
At least portions of one or more of the modules 154, 156, 158 may be implemented at least in part in the form of software that is stored in memory and executed by a processor.
Generally, in some embodiments, after the initiator (e.g., SDC 430) connects to the metadata manager 132, the initiator gets a set of unique partial secrets. The unique partial secrets can be recreated and distributed by the metadata manager 132 to SDSs 410 (target devices) and SDCs 430 (initiators). Thus, in one or more embodiments, the partial secrets do not need to be persisted by the metadata manager 132, SDS 410 or SDC 430 entities and can be frequently changed. Thus, if a given SDC 430, for example, stops operating, the given SDC 430 must communicate again with the metadata manager 132 using the process 400 to obtain the needed partial secrets.
In the example of
Each SDS 410 receives its own unique partial secret (e.g., a partial key), as well as a partial secret for each of the SDCs 430 that a given SDS 410 interacts with. Likewise, each SDC 430 receives its own unique partial secret, as well as a partial secret for each of the SDSs 410 that a given SDC 430 interacts with.
In one or more embodiments, the exemplary process 400 for the generation and distribution of partial secrets may be triggered, for example, when an SDC 430 (initiator) connects to the computing system 100. A connection to the metadata manager 132 is established, for example, using a CHAP secret or TLS authentication. In at least some embodiments, the security level of the disclosed techniques for authentication using pairwise secrets constructed from partial secrets are influenced by the security level of the initial connection with the metadata manager 132. Although TLS is often considered more modern and robust, many existing storage drivers use the CHAP protocol. One or more SDSs 410 and one or more SDCs 430 communicate using an I/O path 420, as discussed further below.
In this manner, the constructed secrets 510 used for access are generated from the respective partial secrets of the two parties to a communication, using, for example, an asymmetric function, so that partial secrets cannot be inferred. In this manner, an infiltrator cannot expose more than one constructed secret 510.
In further variations, the constructed secret 510 can be generated using HMAC (hash-based message authentication code) with one partial secret serving as the key, or a KDF (key derivation function), such as HKDF (a KDF based on an HMAC), with one of the partial secrets serving as the key. Thus, if a given constructed secret 510 is intercepted, the secret reveals nothing about the two partial secrets, and changing either partial secret invalidates a potential attack.
As discussed further below in conjunction with
Since the SDSs 410 and SDCs 430 construct the constructed secret 510, the computational load on the metadata manager 132 is reduced, since the metadata manager 132 only needs to create and distribute m+p partial secrets (and not m*p full (e.g., constructed) secrets).
SDC 430-1 generates the constructed secret for the communication by applying the cryptographic function to the challenge and the partial secrets of the SDC 430-1 and the SDS 410-1. SDC 430-1 responds to the challenge during step 630 by returning the constructed secret to SDS 410-1.
During step 640, SDS 410-1 validates the received constructed secret by also applying the cryptographic function to the challenge and the partial secrets of the SDC 430-1 and the SDS 410-1 and comparing the result to the received constructed secret value. If the two constructed secrets match, an authenticated communication is established during step 650. The SDC 430-1 may be optionally re-challenged during the authenticated communication.
The exemplary authentication process 700 then generates a constructed secret for the communication during step 720 by applying a cryptographic function to the partial secret of the first entity and the partial secret of the second entity. Finally, during step 730, the exemplary authentication process 700 authenticates the communication using the constructed secret. For example, if the constructed secret sent by the first entity matches the constructed secret generated by the second entity, the communication can be authenticated. If the two constructed secrets match, an authenticated communication can be established, and the communications continue, for example, using the CHAP protocol.
The particular processing operations and other network functionality described in conjunction with the flow diagram of
In some embodiments, the above-described techniques for authentication using pairwise secrets based on two partial secrets can be extended to include additional partial secrets (e.g., triplet secrets and/or quadruplet secrets) for: (i) two or more paths between at least a subset of the first entities and at least a subset of the second entities, (ii) each storage volume for all of the second entities serving the same storage volume, and/or (iii) each storage volume on a specific second entity.
In one or more embodiments, the disclosed techniques for authentication using pairwise secrets constructed from partial secrets enhance the existing CHAP security scheme by reducing the chances of an eavesdropper to access target devices, and by reducing the attack surface of the storage system, without putting significant memory and computational strains on the control entity, such as the metadata manager 132. For example, the attack surface can be reduced by: not passing the constructed secrets between the communicating entities, by not storing the partial secrets or the constructed secret in persistent memory, and by more easily changing the partial secrets at a high frequency.
Current storage systems, on the other hand, rely on CHAP secrets for initiator authentication. The constructed secret is unique for each initiator (e.g., first entity) and is persisted both on the initiator side (with the configuration information) and in a database of the storage controller. It is difficult to recreate CHAP secrets and replace them in the initiator devices, so it is seldom done. CHAP has a two-way authentication mechanism, but it is used just for the initiator to also identify the target device (as opposed to just the target identifying the initiator).
Further, with existing implementations of the CHAP protocol, a control entity must generate N*T pairwise secrets, where N is the number of authenticator entities and T is the number of entities requesting access. With the disclosed techniques for authentication using pairwise secrets constructed from partial secrets, the control entity can create just N+T secrets and spread them to the components. This reduces the calculation time for the control entity and reduces the memory size needed to store the secrets. In turn, frequent replacement of all partial secrets is enabled in the system, thus reducing the attack surface even more. In addition, a failure of the control entity can be handled by recreating of the partial secrets, and there is no need to persist them, or pass them among standby controllers.
The processors 802 comprise one or more types of hardware processors that are configured to process program instructions and data to execute a native operating system (OS) and applications that run on the server node 800. For example, the processors 802 may comprise one or more CPUs, microprocessors, microcontrollers, application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), and other types of processors, as well as portions or combinations of such processors. The term “processor” as used herein is intended to be broadly construed so as to include any type of processor that performs processing functions based on software, hardware and/or firmware. For example, a “processor” is broadly construed so as to encompass all types of hardware processors including, for example, (i) general purpose processors which comprise “performance cores” (e.g., low latency cores), and (ii) workload-optimized processors, which comprise any possible combination of multiple “throughput cores” and/or multiple hardware-based accelerators. Examples of workload-optimized processors include, for example, graphics processing units (GPUs), digital signal processors (DSPs), system-on-chip (SoC), tensor processing units (TPUs), image processing units (IPUs), deep learning accelerators (DLAs), artificial intelligent (AI) accelerators, and other types of specialized processors or coprocessors that are configured to execute one or more fixed functions.
The storage interface circuitry 804 enables the processors 802 to interface and communicate with the system memory 810, the storage resources 816, and other local storage and off-infrastructure storage media, using one or more standard communication and/or storage control protocols to read data from or write data to volatile and non-volatile memory/storage devices. Such protocols include, but are not limited to, NVMe, PCIe, PATA, SATA, Serial Attached SCSI (SAS), and Fibre Channel. The network interface circuitry 806 enables the server node 800 to interface and communicate with a network and other system components. The network interface circuitry 806 comprises network controllers such as network cards and resources (e.g., network interface controllers (NICs) (e.g., SmartNICs, RDMA-enabled NICs), Host Bus Adapter (HBA) cards, Host Channel Adapter (HCA) cards, I/O adaptors, and converged Ethernet adaptors) to support communication protocols and interfaces including, but not limited to, PCIe, DMA and RDMA data transfer protocols.
The virtualization resources 808 can be instantiated to execute one or more services or functions which are hosted by the server node 800. For example, the virtualization resources 808 can be configured to implement the various modules and functionalities of the control systems of
A hypervisor is an example of what is more generally referred to as “virtualization infrastructure.” The hypervisor runs on physical infrastructure, e.g., CPUs and/or storage devices, of the server node 800, and emulates the CPUs, memory, hard disk, network and other hardware resources of the host system, enabling multiple virtual machines to share the resources. The hypervisor can emulate multiple virtual hardware platforms that are isolated from each other, allowing virtual machines to run, e.g., Linux and Windows Server operating systems on the same underlying physical host. The underlying physical infrastructure may comprise one or more commercially available distributed processing platforms which are suitable for the target application.
In another embodiment, the virtualization resources 808 comprise containers such as Docker containers or other types of Linux containers (LXCs). As is known in the art, in a container-based application framework, each application container comprises a separate application and associated dependencies and other components to provide a complete filesystem, but shares the kernel functions of a host operating system with the other application containers. Each application container executes as an isolated process in user space of a host operating system. In particular, a container system utilizes an underlying operating system that provides the basic services to all containerized applications using virtual-memory support for isolation. One or more containers can be instantiated to execute one or more applications or functions of the server node 800 as well as execute one or more of the various modules and functionalities of the control systems of
The various software modules of the control systems and the storage block balancing modules that employ authentication using pairwise secrets constructed from partial secrets comprise program code that is loaded into the system memory 810 (e.g., volatile memory 812), and executed by the processors 802 to perform respective functions as described herein. In this regard, the system memory 810, the storage resources 816, and other memory or storage resources as described herein, which have program code and data tangibly embodied thereon, are examples of what is more generally referred to herein as “processor-readable storage media” that store executable program code of one or more software programs. Articles of manufacture comprising such processor-readable storage media are considered embodiments of the disclosure. An article of manufacture may comprise, for example, a storage device such as a storage disk, a storage array or an integrated circuit containing memory. The term “article of manufacture” as used herein should be understood to exclude transitory, propagating signals.
The system memory 810 comprises various types of memory such as volatile RAM, NVRAM, or other types of memory, in any combination. The volatile memory 812 may be a dynamic random-access memory (DRAM) (e.g., DRAM DIMM (Dual In-line Memory Module), or other forms of volatile RAM. The non-volatile memory 814 may comprise one or more of a NAND Flash storage device, an SSD device, or other types of next generation non-volatile memory (NGNVM) devices. The system memory 810 can be implemented using a hierarchical memory tier structure wherein the volatile memory 812 is configured as the highest-level memory tier, and the non-volatile memory 814 (and other additional non-volatile memory devices which comprise storage-class memory) is configured as a lower level memory tier which is utilized as a high-speed load/store non-volatile memory device on a processor memory bus (i.e., data is accessed with loads and stores, instead of with I/O reads and writes). The term “memory” or “system memory” as used herein refers to volatile and/or non-volatile memory which is utilized to store application program instructions that are read and processed by the processors 802 to execute a native operating system and one or more applications or processes hosted by the server node 800, and to temporarily store data that is utilized and/or generated by the native OS and application programs and processes running on the server node 800. The storage resources 816 can include, for example, one or more HDDs and/or SSD storage devices.
It is to be understood that the above-described embodiments of the disclosure are presented for purposes of illustration only. Many variations may be made in the particular arrangements shown. For example, although described in the context of particular system and device configurations, the techniques are applicable to a wide variety of other types of information processing systems, computing systems, data storage systems, processing devices and distributed virtual infrastructure arrangements. In addition, any simplifying assumptions made above in the course of describing the illustrative embodiments should also be viewed as exemplary rather than as requirements or limitations of such embodiments. Numerous other alternative embodiments within the scope of the appended claims will be readily apparent to those skilled in the art.
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