The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller and a storage unit divided into a plurality of streams. The storage unit comprises a plurality of dies, where each die comprises two planes. One erase block from each plane of a die is selected for stream formation. Each erase block comprises a plurality of wordlines. A stream comprises one or two dies dedicated to storing parity data and a plurality of dies dedicated to storing user data. The stream further comprises space devoted for controller metadata. The storage device restricts a host device to send write commands in a minimum write size to increase programming efficiency. The minimum write size equals one wordline from one erase block from each plane of each die in the stream dedicated to storing user data minus the space dedicated to metadata.
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11. A storage device, comprising:
a non-volatile storage unit, wherein a capacity of the non-volatile storage unit is divided into a plurality of streams, and wherein the non-volatile storage unit comprises a plurality of dies, each of the plurality of dies comprising a plurality of planes, each of the planes comprising a plurality of erase blocks, and each of the erase blocks comprising a plurality of wordlines, wherein each stream comprises a plurality of user data dies of the plurality of dies, wherein the plurality of user data dies are dedicated to storing user data, a first parity die, and a second parity die;
a volatile storage unit;
means for receiving commands to write data received from a host device in a minimum write size, wherein the minimum write size is set by multiplying a number of erase blocks in a stream dedicated to storing user data times a pages per cell of the wordlines times a wordline size, subtracting an amount of space dedicated to storing metadata of the storage device, store p-parity data in the first parity die, and store q-parity data in the second parity die, wherein q-parity data is a same size as p-parity data;
means for aggregating one or more commands to write data received from the host device having a size smaller than the minimum write size, wherein the aggregating occurs within the volatile storage unit; and
means for programming the write data in the minimum write size to the stream, wherein the means for programming occurs to a wordline of each erase block of the stream concurrently.
1. A storage device, comprising:
a non-volatile storage unit, wherein a capacity of the non-volatile storage unit is divided into a plurality of streams, and wherein the non-volatile storage unit comprises a plurality of dies, each of the plurality of dies comprising a plurality of erase blocks, and each of the erase blocks comprising a plurality of wordlines, wherein each stream comprises a plurality of user data dies of the plurality of dies, a first parity die, and a second parity die, wherein the plurality of user data dies are dedicated to storing user data;
a volatile storage unit; and
a controller coupled to the non-volatile storage unit and the volatile storage unit, wherein the controller is configured to:
store p-parity data in the first parity die;
store q-parity data in the second parity die, wherein q-parity data is a same size as p-parity data;
determine a minimum write size for commands to write data received from a host device, wherein the minimum write size is determined based on a number of erase blocks in a stream dedicated to storing user data, a pages per cell of the wordlines of each erase block, a number of wordlines in each erase block, and an amount of space dedicated to storing metadata of the storage device;
receive the commands to write data from the host device in the minimum write size;
aggregate one or more smaller commands to write data received from the host device having a size smaller than the minimum write size until the minimum write size is reached, wherein the aggregating occurs within the volatile storage unit; and
program the write data in the minimum write size to the stream, wherein the programming occurs to a wordline of each erase block of the stream concurrently.
7. A storage device, comprising:
a non-volatile storage unit, wherein a capacity of the non-volatile storage unit is divided into a plurality of streams, and wherein the non-volatile storage unit comprises a plurality of dies, each of the plurality of dies comprising a plurality of planes, each of the planes comprising a plurality of erase blocks, and each of the erase blocks comprising a plurality of wordlines, wherein each stream comprises a plurality of user data dies of the plurality of dies, a first parity die, and a second parity die, wherein the plurality of user data dies are dedicated to storing user data;
a volatile storage unit; and
a controller coupled to the non-volatile storage unit and the volatile storage unit, wherein the controller is configured to:
store p-parity data in the first parity die;
store q-parity data in the second parity die, wherein q-parity data is a same size as p-parity data;
calculate a minimum write size for commands to write data received from a host device, wherein the minimum write size is calculated to write a full wordline size of one erase block of each plane of each die dedicated to storing user data within a stream;
restrict the host device through a verbal agreement or a handshake agreement to send the commands to write data in the minimum write size;
receive one or more write commands from the host device in a size smaller than the minimum write size;
hold the one or more write commands in the volatile storage unit until the one or more write commands aggregate to the minimum write size; and
write the one or more write commands to the non-volatile storage unit once the one or more write commands are aggregated to the minimum write size, wherein the writing the one or more write commands to the non-volatile storage comprises programming the aggregated one or more write commands to a wordline of each erase block of the stream concurrently.
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Embodiments of the present disclosure generally relate to storage devices, such as sold state drives (SSDs).
Storage devices, such as SSDs, may be used in computers in applications where relatively low latency and high capacity storage are desired. For example, SSDs may exhibit lower latency, particularly for random reads and writes, than hard disk drives (HDDs). Typically, a controller of the SSD receives a command to read or write data from a host device to a memory device. The data is read and written to one or more erase blocks in the memory device. Each of the erase blocks is associated with a logical block address so that the SSD and/or the host device know the location of where the data is stored. One or more erase blocks may be grouped together by their respective logical block addresses to form a plurality of streams.
The host device may send write commands of any size to the storage device. The storage device may then write the commands to the memory device as the commands are received, regardless of the size of the commands. However, writing several small commands to the memory device may require a lot of time, slowing down the programming time, and decreasing the overall programming efficiency of the storage device.
Therefore, what is needed is a new method of operating a storage device that optimizes controller resource efficiency to maximize throughput for the storage device.
The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller and a storage unit divided into a plurality of streams. The storage unit comprises a plurality of dies, where each die comprises two planes. One erase block from each plane of a die is selected for stream formation. Each erase block comprises a plurality of wordlines. A stream comprises one or more die planes dedicated to storing parity data and a plurality of dies dedicated to storing user data. The stream further comprises space devoted for controller metadata. The storage device restricts a host device to send write commands in a minimum write size to increase programming efficiency. The minimum write size equals one wordline from one erase block from each plane of each die in the stream dedicated to storing user data minus the space dedicated to metadata.
In one embodiment, a storage device comprises a non-volatile storage unit, wherein a capacity of the non-volatile storage unit is divided into a plurality of streams, and wherein the non-volatile storage unit comprises a plurality of dies. Each of the plurality of comprising a plurality of erase blocks, and each of the erase blocks comprising a plurality of wordlines. The storage device further comprises a controller coupled to the non-volatile storage unit. The controller is configured to determine a minimum write size for commands to write data received from a host device, wherein the minimum write size is determined based on a number of erase blocks in a stream dedicated to storing user data, a pages per cell of the wordlines of each erase block, a number of wordlines in each erase block, and an amount of space dedicated to storing metadata of the storage device. The controller is further configured to receive the commands to write data from the host device in the minimum write size, or aggregate one or more smaller commands to write data received from the host device having a size smaller than the minimum write size until the minimum write size is reached.
In another embodiment, a storage device comprises a non-volatile storage unit, wherein a capacity of the non-volatile storage unit is divided into a plurality of streams, and wherein the non-volatile storage unit comprises a plurality of dies, each of the plurality of dies comprising a plurality of planes, each of the planes comprising a plurality of erase blocks, and each of the erase blocks comprising a plurality of wordlines. The storage device further comprises a controller coupled to the non-volatile storage unit. The controller is configured to calculate a minimum write size for commands to write data received from a host device, wherein the minimum write size is calculated to write a full wordline size of one erase block of each plane of each die dedicated to storing user data within a stream. The controller is further configured to restrict the host device through a verbal agreement or a handshake agreement to send the commands to write data in the minimum write size.
In another embodiment, a storage device comprises a non-volatile storage unit, wherein a capacity of the non-volatile storage unit is divided into a plurality of streams, and wherein the non-volatile storage unit comprises a plurality of dies, each of the plurality of dies comprising a plurality of planes, each of the planes comprising a plurality of erase blocks, and each of the erase blocks comprising a plurality of wordlines. The storage device further comprises a means for receiving commands to write data received from a host device in a minimum write size, wherein the minimum write size is set by multiplying a number of erase blocks in a stream dedicated to storing user data times a pages per cell of the wordlines times a wordline size, and subtracting an amount of space dedicated to storing metadata of the storage device.
So that the manner in which the above recited features of the present disclosure can be understood in detail, a more particular description of the disclosure, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this disclosure and are therefore not to be considered limiting of its scope, for the disclosure may admit to other equally effective embodiments.
To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements disclosed in one embodiment may be beneficially utilized on other embodiments without specific recitation.
In the following, reference is made to embodiments of the disclosure. However, it should be understood that the disclosure is not limited to specific described embodiments. Instead, any combination of the following features and elements, whether related to different embodiments or not, is contemplated to implement and practice the disclosure. Furthermore, although embodiments of the disclosure may achieve advantages over other possible solutions and/or over the prior art, whether or not a particular advantage is achieved by a given embodiment is not limiting of the disclosure. Thus, the following aspects, features, embodiments and advantages are merely illustrative and are not considered elements or limitations of the appended claims except where explicitly recited in a claim(s). Likewise, reference to “the disclosure” shall not be construed as a generalization of any inventive subject matter disclosed herein and shall not be considered to be an element or limitation of the appended claims except where explicitly recited in a claim(s).
The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller and a storage unit divided into a plurality of streams. The storage unit comprises a plurality of dies, where each die comprises two planes. One erase block from each plane of a die is selected for stream formation. Each erase block comprises a plurality of wordlines. A stream comprises one or two dies dedicated to storing parity data and a plurality of dies dedicated to storing user data. The stream further comprises space devoted for controller metadata. The storage device restricts a host device to send write commands in a minimum write size to increase programming efficiency. The minimum write size equals one wordline from one erase block from each plane of each die in the stream dedicated to storing user data minus the space dedicated to metadata.
The storage system 100 includes a host device 104 which may store and/or retrieve data to and/or from one or more storage devices, such as the storage device 106. As illustrated in
The storage device 106 includes a controller 108, non-volatile memory 110 (NVM 110), a power supply 111, volatile memory 112, and an interface 114. The controller 108 comprises an internal volatile memory 120 or buffer. In some examples, the storage device 106 may include additional components not shown in
The interface 114 of the storage device 106 may include one or both of a data bus for exchanging data with the host device 104 and a control bus for exchanging commands with the host device 104. The interface 114 may operate in accordance with any suitable protocol. For example, the interface 114 may operate in accordance with one or more of the following protocols: advanced technology attachment (ATA) (e.g., serial-ATA (SATA) and parallel-ATA (PATA)), Fibre Channel Protocol (FCP), small computer system interface (SCSI), serially attached SCSI (SAS), PCI, PCIe, non-volatile memory express (NVMe), OpenCAPI, GenZ, Cache Coherent Interface Accelerator (CCIX), Computer Express Link (CXL), Open Channel SSD (OCSSD), or the like. The electrical connection of the interface 114 (e.g., the data bus, the control bus, or both) is electrically connected to the controller 108, providing electrical connection between the host device 104 and the controller 108, allowing data to be exchanged between the host device 104 and the controller 108. In some examples, the electrical connection of the interface 114 may also permit the storage device 106 to receive power from the host device 104. For example, as illustrated in
The storage device 106 includes NVM 110, which may include a plurality of memory devices or media units. NVM 110 may be configured to store and/or retrieve data. For instance, a media unit of NVM 110 may receive data and a message from the controller 108 that instructs the media unit to store the data. Similarly, the media unit of NVM 110 may receive a message from the controller 108 that instructs the media unit to retrieve data. In some examples, each of the media units may be referred to as a die. In some examples, a single physical chip may include a plurality of dies (i.e., a plurality of media units). In some examples, each media unit may be configured to store relatively large amounts of data (e.g., 128 MB, 256 MB, 412 MB, 1 GB, 2 GB, 4 GB, 8 GB, 16 GB, 32 GB, 64 GB, 128 GB, 256 GB, 412 GB, 1 TB, etc.).
In some examples, each media unit of NVM 110 may include any type of non-volatile memory devices, such as flash memory devices, phase-change memory (PCM) devices, resistive random-access memory (ReRAM) devices, magnetoresistive random-access memory (MRAM) devices, ferroelectric random-access memory (F-RAM), holographic memory devices, and any other type of non-volatile memory devices.
The NVM 110 may comprise a plurality of flash memory devices or media units. Flash memory devices may include NAND or NOR based flash memory devices, and may store data based on a charge contained in a floating gate of a transistor for each flash memory cell. In NAND flash memory devices, the flash memory device may be divided into a plurality of blocks which may divided into a plurality of pages. Each block of the plurality of blocks within a particular memory device may include a plurality of NAND cells. Rows of NAND cells may be electrically connected using a word line to define a page of a plurality of pages. Respective cells in each of the plurality of pages may be electrically connected to respective bit lines. Furthermore, NAND flash memory devices may be 2D or 3D devices, and may be single level cell (SLC), multi-level cell (MLC), triple level cell (TLC), or quad level cell (QLC). The controller 108 may write data to and read data from NAND flash memory devices at the page level and erase data from NAND flash memory devices at the block level.
The storage device 106 includes a power supply 111, which may provide power to one or more components of the storage device 106. When operating in a standard mode, the power supply 111 may provide power to the one or more components using power provided by an external device, such as the host device 104. For instance, the power supply 111 may provide power to the one or more components using power received from the host device 104 via the interface 114. In some examples, the power supply 111 may include one or more power storage components configured to provide power to the one or more components when operating in a shutdown mode, such as where power ceases to be received from the external device. In this way, the power supply 111 may function as an onboard backup power source. Some examples of the one or more power storage components include, but are not limited to, capacitors, super capacitors, batteries, and the like. In some examples, the amount of power that may be stored by the one or more power storage components may be a function of the cost and/or the size (e.g., area/volume) of the one or more power storage components. In other words, as the amount of power stored by the one or more power storage components increases, the cost and/or the size of the one or more power storage components also increases.
The storage device 106 also includes volatile memory 112, which may be used by controller 108 to store information. Volatile memory 112 may be comprised of one or more volatile memory devices. In some examples, the controller 108 may use volatile memory 112 as a cache. For instance, the controller 108 may store cached information in volatile memory 112 until cached information is written to non-volatile memory 110. As illustrated in
The various types of volatile memories may be used with different access properties. For example, DRAM may be arranged for longer burst accesses to allow for improved bandwidth (BW) of the same access bus. Alternatively, DRAM may be used with smaller accesses such that random small accesses may have better latency. The controller comprises additional optional SRAM and/or embedded MRAM. Embedded MRAM is another alternative memory that may be used in another embodiment. Similarly, the access to the MRAM can be optimized for different design purposes, but the quantity of embedded MRAM in the SSD controller may be cost sensitive. Therefore, the choice of how much data and which data goes into the premium non-volatile memory and premium volatile memory will subject to system tradeoffs.
The storage device 106 includes a controller 108, which may manage one or more operations of the storage device 106. For instance, the controller 108 may manage the reading of data from and/or the writing of data to the NVM 110 via a toggle mode (TM) bus (not shown). In some embodiments, when the storage device 106 receives a write command from the host device 104, the controller 108 may initiate a data storage command to store data to the NVM 110 and monitor the progress of the data storage command. The controller 108 may determine at least one operational characteristic of the storage system 100 and store the at least one operational characteristic to the NVM 110. In some embodiments, when the storage device 106 receives a write command from the host device 104, the controller 108 temporarily stores the data associated with the write command in the internal volatile memory 120 before sending the data to the NVM 110.
Method 200 begins at operation 250, where the host device writes a command into a submission queue as an entry. The host device may write one or more commands into the submission queue at operation 250. The commands may be read commands or write commands. The host device may comprise one or more submission queues.
In operation 252, the host device writes one or more updated submission queue tail pointers and rings a doorbell or sends an interrupt signal to notify or signal the storage device of the new command that is ready to be executed. The host may write an updated submission queue tail pointer and send a doorbell or interrupt signal for each of the submission queues if there are more than one submission queues. In operation 254, in response to receiving the doorbell or interrupt signal, a controller of the storage device fetches the command from the one or more submission queue, and the controller receives the command.
In operation 256, the controller processes the command and writes or transfers data associated with the command to the host device memory. The controller may process more than one command at a time. The controller may process one or more commands in the submission order or in the sequential order. Processing a write command may comprise identifying a stream to write the data associated with the command to and writing the data to one or more logical block addresses (LBA) of the stream.
In operation 258, once the command has been fully processed, the controller writes a completion entry corresponding to the executed command to a completion queue of the host device and moves or updates the CQ head pointer to point to the newly written completion entry.
In operation 260, the controller generates and sends an interrupt signal or doorbell to the host device. The interrupt signal indicates that the command has been executed and data associated with the command is available in the memory device. The interrupt signal further notifies the host device that the completion queue is ready to be read or processed.
In operation 262, the host device processes the completion entry. In operation 264, the host device writes an updated CQ head pointer to the storage device and rings the doorbell or sends an interrupt signal to the storage device to release the completion entry.
In one embodiment, the NVM 302 is a NAND device. The NAND device comprises one or more dies. Each of the one or more dies comprises one or more planes. Each of the one or more planes comprises one or more erase blocks. Each of the one or more erase blocks comprises one or more wordlines (e.g., 256 wordlines). Each of the one or more wordlines may be addressed in one or more pages. For example, an MLC NAND die may use upper page and lower page to reach the two bits in each cell of the full wordline (e.g., 16 kB per page). Furthermore, each page can be accessed at a granularity equal to or smaller than the full page. A controller can frequently access NAND in user data granularity LBA sizes of 512 bytes. Thus, as referred to in the below description, NAND locations are equal to a granularity of 512 bytes. As such, an LBA size of 512 bytes and a page size of 16 KiB for two pages of an MLC NAND results in 32 LBAs per wordline. However, the NAND location size is not intended to be limiting, and is merely used as an example.
In some embodiments, a NAND location may be equal to a wordline. In such an embodiment, the controller may optionally aggregate several write commands in another memory location such as DRAM or SRAM prior to programming a full wordline composed of multiple write commands. Write commands that are longer than a wordline will be able to program and fill a complete wordline with some of the data, and the excess data beyond a wordline will be used to fill the next wordline. For the purposes of this description, the write data sizes are equal to a NAND location of 512 bytes; however, this is not intended to be limiting.
The capacity of the NVM 302 is divided into a plurality of streams 306a-306n (collectively referred to as streams 306), and each of the streams 306 comprises a plurality of dies 304. The NVM 302 of the storage device can be formatted into logical blocks such that the capacity is divided into a plurality of streams 306. Each of the plurality of streams 306 may have a state that is open and active, open and closed, empty, full, or offline. Moreover, one or more streams 306 of the plurality of streams 306 may have a different size or capacity. For example, a first stream0 306a and a third stream2 306c are each shown to comprise three dies 304, a second stream1 306b and an nth streamN 306n are shown to comprise two dies 304, and a fourth stream3 306d is shown to comprise 1 die 304.
The term “written to” includes programming user data on 0 or more NAND locations in an erase block and/or partially filled NAND locations in an erase block when user data has not filled all of the available NAND locations. The term “written to” may further include moving a stream to full due to internal drive handling needs (open block data retention concerns because the bits in error accumulate more quickly on open erase blocks), the storage device closing or filling a stream due to resource constraints, like too many open streams to track or discovered defect state, among others, or a host device closing the stream for concerns such as there being no more data to send the drive, computer shutdown, error handling on the host, limited host resources for tracking, among others.
Each of the streams 306 comprise a plurality of physical or erase blocks (not shown) of a memory unit or NVM 302, and each of the erase blocks are associated a plurality of logical blocks (not shown). As discussed above, each of the streams 306 may be a different size, and are not required to be aligned to the capacity of one or more erase blocks of a NVM or NAND device. A stream write size (SWS) is an optimal write size agreed on between the host, such as the host 104 of
When the controller receives a command, such as from a host device (not shown) or the submission queue of a host device, the command is received with a stream ID (e.g., stream0), which tells the controller which stream 306 of the plurality of streams 306 to write the data associated with the command to. The host device may select the stream ID for a command based on data the host device wants grouped together. Thus, the data stored within each stream 306 may be related or grouped together as determined by the host, such as the host 104 of
Because the host is not restricted to any size granularity, the controller, such as the controller 108 of
In
In one embodiment, a stream 400 is formed by selecting an erase block 404 from each plane 406 of 30 out of the 32 dies 402, and assigning or associating the logical block address corresponding to the erase blocks 404 to the stream 400. The configuration of erase blocks 404 of the stream 400 is an example of one embodiment. In another embodiment, the selected erase blocks 404 for a stream 400 may be non-sequential (i.e., not the same erase block in each plane).
Out of the 32 total dies 402, 30 dies 402 can be utilized to store data, one parity die 402a can be utilized to store parity data (e.g., XOR data, internal error correction codes (ECC), external ECC, etc.), and one parity or user data die 402b can be utilized to store either user data or parity data. In one embodiment, the stream 400 may contain 31 dies 402 to be utilized for user data and 1 die 402a to be utilized for parity data. For example, RAID 4 utilizes 1 die for parity data. In another embodiment, the stream 400 may contain 30 dies 402 to be utilized for user data and 2 dies 402a, 402b to be utilized for parity data. For example, RAID 6 utilizes 2 dies for parity data. Such embodiments are not intended to be limiting nor restricting, and are examples of possible configurations of a stream 400. Furthermore, other embodiments neither listed nor described may exist.
Though referred to throughout as a “parity die”, possible embodiments may include a parity plane, where only one plane of a die is associated with parity data. Additionally, parity data for one wordline of each erase block storing user data (e.g., wordline 60 of each erase block of each plane of 30 or 31 dies) may be stored in a corresponding parity wordline (e.g., wordline 60) of any erase block where user data is not being stored in the parity wordline (e.g., wordline 60). In such an embodiment, parity wordlines may be stored in a plurality of different erase blocks, or planes, or dies within the stream 400. Furthermore, when programming to the non-volatile storage unit, a single plane of a die, instead of both planes of a die, may be programmed to the non-volatile storage unit. In the descriptions herein, the embodiments listed to a parity die are applicable to a parity plane or a parity wordline and are not intended to be limiting. Moreover, while the die 402a being utilized to store parity data is shown as the last die 402 within the stream 400, any die 402 may be used to stored parity data.
Within a stream 400, the parity die 402a is partitioned for the storage of parity data for die failure protection. A parity or user data die 402b may either be partitioned for the storage of additional parity data or be utilized for user data. The parity die 402a stores p-parity data, which is the standard parity data. The parity or user data die 402b, when used for parity data, stores q-parity data, which is the same size as the p-parity data. However, the q-parity data is calculated using Gaussian math on the host data stored on a particular wordline of each EB. The parity data includes erasure coding which may protect against single die failure and/or dual die failure. Erasure coding may also provide some amount of protection for plane loss failure.
In coding theory, an erasure code is a forward error correction (FEC) code under the assumption of bit erasures (rather than bit errors), which transforms a message of k symbols into a longer message (code word) with n symbols such that the original message can be recovered from a subset of the n symbols. Examples of various erasure code classes are tornado codes, fountain (i.e., rateless erasure) codes, parity, and Reed-Solomon codes. For example, the Reed-Solomon codes are a group of error-correcting codes (ECC), where the codes are able to detect and correct multiple symbol errors.
In one embodiment, the error correction information used by an ECC decoder to correct errors may refer to redundant and/or encoded bits generated by an encoder for an error correcting code. In various embodiments, an error correcting code may be one of various types of error correcting codes, such as a block code, a convolution code, a Bose-Chaudhuri-Hocquenghem (BCH) code, a low-density parity check (LDPC) code, a Hamming code, a Reed-Solomon code, a turbo code, or the like. In a certain embodiment, the error correcting code may be a systematic error correcting code, so that each ECC chunk, or code word, may store data received by an encoder for the error correcting code, as well as parity bits, or check bits. The ECC may comprise error detecting code (EDC) as well, where the EDC may be a sentinel value, a logical address, a Cyclical Redundancy Code (CRC), or any other ECC miscorrection check that will follow the ECC decode. The miscorrection check detects if the ECC has corrected a value to an invalid result. The miscorrection check is needed because there are instances where no ECC is used, but the EDC still detects for failures.
The stream 400 may have any capacity, such as 256 MiB or 512 MiB. However, a small portion of the stream 400 may be inaccessible to write data to, but may still be read, such as a portion of the stream 400 storing the parity data (e.g., parity die 402a and/or parity or user data die 402b). For example, if the total capacity of a stream 400 is 512 MiB, the writable capacity may be 470 MiB, while 42 MiB are unavailable to write data.
Furthermore, each wordline is contains a number of pages, where the number corresponds to the type of memory cell. For example, a SLC memory has 1 page per wordline, a MLC memory has 2 pages per wordline, a TLC memory has 3 pages per wordline, and so forth. In
The total size of a wordline in a TLC memory in an erase block 404, such as WL1 470, is 48 KiB (i.e., 16 KiB*3 pages). Since two planes exist in a die, a wordline of the same size exists parallel to WL1 (not shown). The combined wordline size of two erase blocks 404, one from each plane 406, in a die 402 (hereafter referred to as “a wordline”) is: 1 Die*2 EB/Die*3 page/EB*16 KiB/page=96 KiB, where a single erase block wordline is 48 KiB, which is half the size of a wordline. Furthermore, the die wordline size of 96 KiB and erase block wordline size of 48 KiB may be less due to space dedicated to storing metadata. As such, the total combined size of one wordline in each plane of a die in TLC memory in a die is 96 KiB minus the space dedicated to storing metadata. The previous values are examples of a possible embodiment, and the values listed are neither limiting nor restricting.
A super wordline or a multiple wordline is comprised of a die wordline from each die of a stream (i.e., the sum of one wordline from one erase block from each plane of a die and from each die of a stream storing user data), such that a stream comprises 256 super wordlines, according to one embodiment. In one embodiment, each plane of a die provides one identical erase block (i.e., EB1 of each plane) for a stream. In another embodiment, each plane of a die provides one non-identical erase block (i.e., different erase blocks for each plane) for a stream. For example, if a stream comprises 30 dies dedicated to storing user data, a super wordline would be 96 KiB*30 dies minus the space dedicated to storing metadata in the RAID 6 implementation. Similarly, if a stream comprises 31 dies dedicated to storing user data, a super wordline would be 96 KiB*31 dies minus the space dedicated to storing metadata in the RAID 4 implementation.
In other words, a super wordline capacity for writeable data (i.e., total capacity minus space lost due to controller metadata) for a stream can be solved by the following equation: # Die*2 (EB/Die)*(page/EB)*wordline (WL) size−metadata. Though the term “metadata” is used throughout, metadata may refer to data overhead. Thus, metadata may be used interchangeably with data overhead throughout for exemplary purposes. The metadata may be internal tracking information, such as the stream logical block addresses stored on the super wordline for the storage device. The stream logical block addresses stored on the super wordline comprises the location of the parity data and/or the controller debug information. The super wordline size may be used as a minimum write size for commands to write data received from a host, as discussed below.
For example, for TLC memory (i.e., 3 pages per cell), the super wordline capacity for user data with one die allocated for parity data is solved as follows: 31 Die*2 EB selected/Die*3 page/EB*16 KiB/page−16 KiB=2960 KiB. The 16 KiB/page refers to the WL data size per page within a memory cell. The 16 KiB refers to the metadata data size. The values for WL data size and the metadata data size are merely examples of possible sizes and are not intended to be limiting. In addition, the metadata of a stream may be associated with a single wordline in a single EB, with multiple wordlines in a single EB, or with multiple wordlines across multiple EBs. Furthermore, the metadata may be associated with a portion of a single wordline in a single EB, with a portion of multiple wordlines in a single EB, or with a portion of multiple wordlines across multiple EBs.
Furthermore, the equation is applicable to other forms of memory cells such as SLC, MLC, QLC, and other higher iterations of memory cells. The pages/cell refers to the number of pages a particular type of memory cell may contain. If two dies were allocated for parity data within TLC memory, then the equation would be solved as follows: 30 Die*2 EB/Die*3 page/EB*16 KiB/page−16 KiB=2864 KiB. In a single die 402, two planes 406 exist, and an erase block 404 is selected from each plane 406 for stream formation.
A controller of a storage device, such as the controller 108 of the storage device 106 of
The volatile memory, such as the volatile memory 112 of
Furthermore, to better optimize the write process and increase programming efficiency, the minimum write size may be selected to fill one wordline in each erase block 404 in a stream 400 (i.e., one die WL in each erase block of the stream is written to simultaneously). Thus, the minimum write size may be set to the super wordline size. In the example in
In one embodiment, parity data is written to the totality of wordlines of a single erase block of a stream. In another embodiment, parity data is written to one wordline of each erase block, identically (i.e., WL0 of each erase block). In yet another embodiment, parity data is written to one wordline of each erase block, non-identically (i.e., different wordlines on each erase block). In one embodiment, the total number of wordlines dedicated to parity data within a stream is equal to a multiple of one or more erase blocks of a stream.
In one embodiment, the space lost to metadata may be from a wordline. In another embodiment, the space lost to metadata may be from an erase block 404. In yet another embodiment, the space lost to metadata may be from a plane 406. In another embodiment, the space lost to metadata may be from a die 402. In yet another embodiment, the space lost to metadata may be from the stream 400.
For example, the host, such as the host 104 of
In one embodiment, the minimum write size is a wordline capacity of an erase block 404 minus the space lost to metadata. In another embodiment, the minimum write size is the size of a combined die wordline across two planes 406 of a die 402 minus the space lost to metadata. In yet another embodiment, the minimum write size is the size of a super wordline storing user data in a stream 400 minus the space lost to metadata. In another embodiment, the minimum write size is the size of one or more super wordlines storing user data in a stream 400 minus the space lost to metadata.
If the minimum write size is a wordline of a plane, a buffer may be utilized for each plane and the relevant parity plane. For example, for a two wordline write where each wordline is on parallel planes of a die, four buffers are utilized while the data is located in the internal volatile memory. When one wordline of the plane is written to the non-volatile storage unit (i.e., not a parallel write), two buffers are freed (i.e., returned to the available buffer pool). The freed buffers are a parity buffer associated with the wordline and the wordline buffer. Similarly, if both wordlines are written to the non-volatile storage unit (i.e., a parallel write), all the buffers utilized are returned to the available buffer pool. A parity buffer may be associated with a plane of each die, such that the parity buffer will exist until all identical planes are written to the non-volatile storage unit. When the final utilized plane is written to the non-volatile storage unit, the parity buffer is also written to the non-volatile storage unit, resulting in a non-utilized internal volatile memory.
The write process to a stream may be optimized by writing to a wordline across all dies within a stream concurrently. By restricting the host to have a minimum write size, or allowing the controller to store data until a minimum write size is achieved, such as a size to fill a wordline in each erase block across all dies within a stream to capacity, the overall write performance and programming efficiency may be improved.
In one embodiment, a storage device comprises a non-volatile storage unit, wherein a capacity of the non-volatile storage unit is divided into a plurality of streams, and wherein the non-volatile storage unit comprises a plurality of dies. Each of the plurality of dies comprising a plurality of erase blocks, and each of the erase blocks comprising a plurality of wordlines. The storage device further comprises a controller coupled to the non-volatile storage unit. The controller is configured to determine a minimum write size for commands to write data received from a host device, wherein the minimum write size is determined based on a number of erase blocks in a stream dedicated to storing user data, a pages per cell of the wordlines of each erase block, a number of wordlines in each erase block, and an amount of space dedicated to storing metadata of the storage device. The controller is further configured to receive the commands to write data from the host device in the minimum write size, or aggregate one or more smaller commands to write data received from the host device having a size smaller than the minimum write size until the minimum write size is reached.
One or more each streams of the plurality of streams comprise the same number of erase blocks and have a same writable capacity. One or more streams of the plurality of streams comprise a different number of erase blocks and have a different writable capacity. The minimum write size is determined to write two full wordlines in each die of the stream minus the amount of space dedicated to storing metadata. Each die of the stream comprises two planes and the minimum write size is determined to write to one full wordline in each plane of each die of the stream minus the amount of space dedicated to storing metadata. A portion of each wordline comprises the amount of space dedicated to storing metadata. A portion of each erase block comprises the amount of space dedicated to storing metadata. Furthermore, at least one die in each stream is dedicated to storing die failure protection data.
In another embodiment, a storage device comprises a non-volatile storage unit, wherein a capacity of the non-volatile storage unit is divided into a plurality of streams, and wherein the non-volatile storage unit comprises a plurality of dies, each of the plurality of dies comprising a plurality of planes, each of the planes comprising a plurality of erase blocks, and each of the erase blocks comprising a plurality of wordlines. The storage device further comprises a controller coupled to the non-volatile storage unit. The controller is configured to calculate a minimum write size for commands to write data received from a host device, wherein the minimum write size is calculated to write a full wordline size of one erase block of each plane of each die dedicated to storing user data within a stream. The controller is further configured to restrict the host device through a verbal agreement or a handshake agreement to send the commands to write data in the minimum write size.
The minimum write size is calculated based on a pages per cell of the plurality of wordlines. A portion of each stream comprises a metadata capacity for the storage device to write to. The minimum write size is calculated to account for the metadata capacity. The controller is further configured to receive one or more write commands from the host device in a size smaller than the minimum write size, hold the one or more write commands until the one or more write commands aggregate to the minimum write size, and write the one or more write commands to the non-volatile storage unit once the one or more write commands are aggregated to the minimum write size. Each stream comprises a plurality of user data dies dedicated to storing user data, a first parity die, and a second parity die. The first parity die is dedicated to storing p-parity data and the second parity die is dedicated to storing q-parity data.
In another embodiment, a storage device comprises a non-volatile storage unit, wherein a capacity of the non-volatile storage unit is divided into a plurality of streams, and wherein the non-volatile storage unit comprises a plurality of dies, each of the plurality of dies comprising a plurality of planes, each of the planes comprising a plurality of erase blocks, and each of the erase blocks comprising a plurality of wordlines. The storage device further comprises a means for receiving commands to write data received from a host device in a minimum write size, wherein the minimum write size is set by multiplying a number of erase blocks in a stream dedicated to storing user data times a pages per cell of the wordlines times a wordline size, and subtracting an amount of space dedicated to storing metadata of the storage device.
The minimum write size is set to align to a size of a wordline. The minimum write size is a factory setting of the storage device. One or more streams of a storage device individually comprises 32 dies, and at least 30 dies of the 32 dies of each of the one or more streams are dedicated to storing user data. Furthermore, at least one die of the 32 dies of each of the one or more streams is dedicated to storing parity data. In addition, a first die of the 32 dies of each of the one or more streams is dedicated to storing p-parity data and a second die of the 32 dies of each of the one or more streams is dedicated to storing q-parity data.
While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the disclosure may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.
Gorobets, Sergey Anatolievich, Helmick, Daniel L., Parker, Liam, Bennett, Alan D., Grayson, Peter
Patent | Priority | Assignee | Title |
Patent | Priority | Assignee | Title |
10950315, | Dec 16 2019 | Micron Technology, Inc. | Preread and read threshold voltage optimization |
11055176, | Apr 24 2020 | SanDisk Technologies, Inc | Storage devices hiding parity swapping behavior |
8554997, | Jan 18 2013 | EMC IP HOLDING COMPANY LLC | Method and system for mirrored multi-dimensional raid |
9021188, | Mar 15 2013 | Western Digital Technologies, INC | Small block write operations in non-volatile memory systems |
20070183198, | |||
20120311231, | |||
20130282980, | |||
20150227460, | |||
20160092300, | |||
20160210083, | |||
20160291884, | |||
20160357462, | |||
20180024777, | |||
20180137005, | |||
20200012444, | |||
20200379899, | |||
20210011639, | |||
20210011659, | |||
20210042031, | |||
20210064290, | |||
20210064520, |
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