Systems and methods for splitting cells in a network of Internet of Things (IOT) may evaluate a network metric such as receives signal strength indicator (RSSI) for end devices to determine a general network activity level. When the network metric falls below a predetermined threshold, the cell splitting controller may cause the cell to split in such a manner as to offload some portion of the end devices on an adjacent gateway and/or change frequencies to reduce the likelihood of collision. By splitting cells in this fashion, the density of end devices served by a single gateway is reduced, fewer collisions occur statistically, and the user experience may be improved.
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1. A cell split controller comprising:
an output configured to be coupled to a network connection; and
a control circuit coupled to the output, the control circuit configured to:
assign a first plurality of end devices to a first gateway operating using a first channel set;
assign a second plurality of end devices to a second gateway operating using a second channel set; and
order the second plurality of end devices to operate using the second channel set.
2. The cell split controller of
3. The cell split controller of
4. The cell split controller of
5. The cell split controller of
6. The cell split controller of
7. The cell split controller of
8. The cell split controller of
9. The cell split controller of
10. The cell split controller of
11. The cell split controller of
12. The cell split controller of
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The disclosure relates generally to managing cells by controlling gateways in a network for Internet of Things (IoT), which may piggyback on another distributed communications system (DCS).
Computing devices have become ubiquitous throughout society. The explosion of the Internet and increased functions available for computing devices have caused increasing interconnection between computing devices and given rise to the Internet of Things (IoT), which may be described as the interconnection via the internet of computing devices embedded in everyday objects enabling them to send and receive data. In many cases, the data exchange is done wirelessly, giving rise to a variety of ways that the computing devices are coupled to the Internet. Popular standards include Wireless Fidelity (WiFi), Bluetooth, and Semtech's LoRa (Long Range), among others.
LoRa is a spread spectrum modulation technique derived from chirp spread spectrum (CSS) technology. In general, LoRa devices and LoRa wireless radio frequency technology is a long-range, low-power wireless platform. Semtech has promulgated the open LoRaWAN standard to enable smart IoT applications. Typically, a LoRa device wirelessly accesses the Internet through a local gateway, which communicates to an IoT application through a LoRa server. Each gateway thus acts as a cell. In many installations, uplink and downlink transmissions through the gateway are not synchronized and therefore might collide. As the number of devices within a cell grows, the likelihood of collision also grows and may reach the point where no more end devices may be added to the system without increasing the collision probability above acceptable levels. Accordingly, there is room for improved gateway management to mitigate the possibility of collision.
No admission is made that any reference cited herein constitutes prior art. Applicant expressly reserves the right to challenge the accuracy and pertinency of any cited documents.
Aspects disclosed herein include systems and methods for splitting cells in a network of Internet of Things (IoT). In an exemplary aspect, a cell splitting controller function is added to an IoT network. The cell splitting controller may evaluate a network metric such as a received signal strength indicator (RSSI) for end devices to determine a general network activity level. When the network metric falls below a predetermined threshold, the cell splitting controller may cause the cell to split in such a manner as to offload some portion of the end devices on an adjacent gateway and/or change frequencies to reduce the likelihood of collision. By splitting cells in this fashion, the density of end devices served by a single gateway is reduced, fewer collisions occur statistically, and the user experience may be improved.
One exemplary embodiment of the disclosure relates to a cell split controller. The cell split controller includes an output configured to be coupled to a network connection. The cell split controller also includes a control circuit coupled to the output. The control circuit is configured to assign a first plurality of end devices to a first gateway operating using a first channel set. The control circuit is also configured to assign a second plurality of end devices to a second gateway operating using a second channel set. The control circuit is also configured to order the second plurality of end devices to operate using the second channel set.
Another exemplary embodiment of the disclosure relates to a cell split controller. The cell split controller includes an output configured to be coupled to a network connection. The cell split controller also includes a control circuit coupled to the output. The control circuit is configured to determine that a received signal strength indicator (RSSI) of an end device being served by a first gateway has fallen below a threshold. The control circuit is also configured to order the end device to switch to a new channel set of a neighboring gateway. The control circuit is also configured to check a new RSSI for the end device through the neighboring gateway. The control circuit is also configured to command the end device to switch back to an original channel set of the first gateway if the new RSSI is weaker than the received RSSI.
Another exemplary embodiment of the disclosure relates to a cell split controller. The cell split controller includes an output configured to be coupled to a network connection. The cell split controller also includes a control circuit coupled to the output. The control circuit is configured to determine a second gateway is installed proximate a first gateway serving a plurality of end devices. The control circuit is also configured to assign a subset of the plurality of end devices to the second gateway. The control circuit is also configured to assign a second channel set to the second gateway different than a first channel set assigned to the first gateway.
Additional features and advantages will be set forth in the detailed description which follows, and in part will be readily apparent to those skilled in the art from the description or recognized by practicing the embodiments as described in the written description and claims hereof, as well as the appended drawings.
It is to be understood that both the foregoing general description and the following detailed description are merely exemplary and are intended to provide an overview or framework to understand the nature and character of the claims.
The accompanying drawings are included to provide a further understanding and are incorporated in and constitute a part of this specification. The drawings illustrate one or more embodiment(s), and together with the description, serve to explain principles and operation of the various embodiments.
Aspects disclosed herein include systems and methods for splitting cells in a network of Internet of Things (IoT). In an exemplary aspect, a cell splitting controller function is added to an IoT network. The cell splitting controller may evaluate a network metric such as a received signal strength indicator (RSSI) for end devices to determine a general network activity level. When the network metric falls below a predetermined threshold, the cell splitting controller may cause the cell to split in such a manner as to offload some portion of the end devices on an adjacent gateway and/or change frequencies to reduce the likelihood of collision. By splitting cells in this fashion, the density of end devices served by a single gateway is reduced, fewer collisions occur statistically, and the user experience may be improved.
In practice, as seen in
Similarly, as seen in
Exemplary aspects of the present disclosure provide systems and methods for splitting the gateways of an IoT network such that adjacent gateways may have different frequencies to create neighboring cells with different frequencies or where adjacent gateways are essentially co-located, the adjacent gateways may split the end devices and operate at different frequencies to reduce the chance of collision at the gateways.
Similarly,
To effectuate the splitting of cells, exemplary aspects of the present disclosure provide a cell split controller in conjunction with elements of an IoT network. The cell split controller tests which gateways have network metrics below a predetermined threshold and causes changes in frequencies for adjacent gateways in instances where the network metric has fallen below the predetermined threshold.
In this regard,
With continued reference to
In this regard,
Given the system 300,
With continued reference to
Similarly,
With continued reference to
While it should be appreciated that the network 300 may exist in isolation, it is also possible that the network 300 may piggyback on top of a distributed communication system (DCS) such as a distributed antenna system (DAS), illustrated in
With continued reference to
The head end 802 may be coupled to the remote end 804 via an optical interface unit (OIU) 826, such as one or more fiber optic cables. It is possible that instead of being in the HEU 806, the gateways 304(1)-304(P) may be located within the RUs 816(1)-816(T) and use the DAS 800 to connect to a local server 306 within the HEU 806 or in the cloud.
With continuing reference to
While a DAS such as DAS 800 may have the network 300 associated or integrated therewith, another option would be a software defined area network (SDAN) 850 such as illustrated in
Any of the circuits in the network 300 of
The processing circuit 902 represents one or more general-purpose processing circuits such as a microprocessor, central processing unit, or the like. More particularly, the processing circuit 902 may be a complex instruction set computing (CISC) microprocessor, a reduced instruction set computing (RISC) microprocessor, a very long instruction word (VLIW) microprocessor, a processor implementing other instruction sets, or processors implementing a combination of instruction sets. The processing circuit 902 is configured to execute processing logic in instructions 916 for performing the operations and steps discussed herein.
The computer system 900 may further include a network interface device 910. The computer system 900 also may or may not include an input 912 to receive input and selections to be communicated to the computer system 900 when executing instructions 916. The computer system 900 also may or may not include an output 914, including, but not limited to, a display, a video display unit (e.g., a liquid crystal display (LCD) or a cathode ray tube (CRT)), an alphanumeric input device (e.g., a keyboard), and/or a cursor control device (e.g., a mouse).
The computer system 900 may or may not include a data storage device that includes instructions 916 stored in a computer-readable medium 918. The instructions 916 may also reside, completely or at least partially, within the main memory 904 and/or within the processing circuit 902 during execution thereof by the computer system 900, the main memory 904, and the processing circuit 902 also constituting the computer-readable medium 918. The instructions 916 may further be transmitted or received over a network 920 via the network interface device 910.
While the computer-readable medium 918 is shown in an exemplary embodiment to be a single medium, the term “computer-readable medium” should be taken to include a single medium or multiple media (e.g., a centralized or distributed database and/or associated caches and servers) that store the one or more sets of instructions 916. The term “computer-readable medium” shall also be taken to include any medium that is capable of storing, encoding, or carrying a set of instructions for execution by the processing circuit and that cause the processing circuit to perform any one or more of the methodologies of the embodiments disclosed herein. The term “computer-readable medium” shall accordingly be taken to include, but not be limited to, solid-state memories, optical and magnetic medium, and carrier wave signals.
Note that as an example, any “ports,” “combiners,” “splitters,” and other “circuits” mentioned in this description may be implemented using Field Programmable Logic Array(s) (FPGA(s)) and/or a digital signal processor(s) (DSP(s)), and therefore, may be embedded within the FPGA or be performed by computational processes.
The embodiments disclosed herein include various steps. The steps of the embodiments disclosed herein may be performed by hardware components or may be embodied in machine-executable instructions, which may be used to cause a general-purpose or special-purpose processor programmed with the instructions to perform the steps. Alternatively, the steps may be performed by a combination of hardware and software.
The embodiments disclosed herein may be provided as a computer program product or software that may include a machine-readable medium (or computer-readable medium) having stored thereon instructions, which may be used to program a computer system (or other electronic devices) to perform a process according to the embodiments disclosed herein. A machine-readable medium includes any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computer). For example, a machine-readable medium includes a machine-readable storage medium (e.g., read-only memory (“ROM”), random access memory (“RAM”), magnetic disk storage medium, optical storage medium, flash memory devices, etc.).
The various illustrative logical blocks, modules, and circuits described in connection with the embodiments disclosed herein may be implemented or performed with a processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A controller may be a processor. A processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.
The embodiments disclosed herein may be embodied in hardware and in instructions that are stored in hardware and may reside, for example, in Random Access Memory (RAM), flash memory, Read-Only Memory (ROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), registers, a hard disk, a removable disk, a CD-ROM, or any other form of computer-readable medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a remote station. In the alternative, the processor and the storage medium may reside as discrete components in a remote station, base station, or server.
Unless otherwise expressly stated, it is in no way intended that any method set forth herein be construed as requiring that its steps be performed in a specific order. Accordingly, where a method claim does not actually recite an order to be followed by its steps, or it is not otherwise specifically stated in the claims or descriptions that the steps are to be limited to a specific order, it is in no way intended that any particular order be inferred.
It will be apparent to those skilled in the art that various modifications and variations can be made without departing from the spirit or scope of the invention. Since modification combinations, sub-combinations, and variations of the disclosed embodiments incorporating the spirit and substance of the invention may occur to persons skilled in the art, the invention should be construed to include everything within the scope of the appended claims and their equivalents.
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