The present invention is a high-speed planarizing machine with a platform that holds the wafer stationary during planarization, and a carrier positioned opposite the platform. The carrier rotates about an axis and translates in a plane that is substantially parallel to the wafer. A polishing pad is attached to the carrier and positioned opposite the wafer. The carrier rotates and translates the polishing pad across the wafer while the wafer is held stationary.
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1. A planarizing apparatus for planarizing microelectronic-device substrate assemblies, comprising:
a platform upon which a substrate assembly can be mounted and held stationary during planarization; a turret assembly positioned over the platform, the turret assembly being translatable in a plane at least substantially parallel to the substrate assembly and rotatable about a turret rotation axis in a first rotational direction, and the turret assembly having a first station spaced apart from the turret rotation axis and a second station spaced apart from the turret rotation axis, the first and second stations orbiting about the turret rotation axis as the turret rotates in the first rotational direction; a first pad carrier attached to the turret assembly at the first station that rotates in the first rotational direction about a first pad rotation axis through the first station; a first pad attached to the first pad carrier; a second pad carrier attached to the turret assembly at the second station that rotates in a second rotational direction counter to the first rotational direction about a second pad rotation axis through the second station; and a second pad attached to the second pad carrier.
6. A planarizing apparatus for planarizing microelectronic-device substrate assemblies, comprising:
a platform upon which a substrate assembly can be mounted and held stationary during planarization; a turret assembly positioned over the platform, the turret assembly being translatable in a plane at least substantially parallel to the substrate assembly and rotatable about a turret rotation axis in a first rotational direction, and the turret assembly having a first station spaced apart from the turret rotation axis and a second station spaced apart from the turret rotation axis, the first and second stations orbiting about the turret rotation axis as the turret rotates in the first rotational direction; a first pad carrier attached to the turret assembly at the first station that is separately rotatable and rotates in the first rotational direction about a first pad axis off-set from the turret rotational axis; a first polishing pad attached to the first pad carrier; a second pad carrier attached to the turret assembly at the second station that is separately rotatable and rotates in a second rotational direction counter to the first rotational direction about a second pad axis off-set from the turret rotational axis and the first pad axis; and a second polishing pad attached to the second pad carrier.
11. A method of planarizing a microelectronic-device substrate assembly, comprising:
holding the substrate assembly stationary; pressing a first polishing pad against a face of the substrate assembly in the presence of a planarizing solution, the first polishing pad having a first central point; rotating the first polishing pad about a first pad rotational axis passing through the first central point of the first polishing pad; orbiting the first polishing pad about a primary rotational axis in a first rotational direction, the primary rotational axis being spaced apart from the first central point of the first polishing pad; pressing a second polishing pad against the face of the substrate assembly in the presence of the planarizing solution, the second polishing pad having a second central point spaced apart from the primary rotational axis; rotating the second polishing pad about a second pad rotational axis passing through the second central point of the second polishing pad; orbiting the second polishing pad about the primary rotational axis in the first rotational direction; rotating the first polishing pad in the first rotational direction in which the first and second polishing pads orbit about the primary rotational axis, and the second pad in a second rotational direction counter to the first rotational direction; and translating the first and second polishing pads with respect to the substrate assembly in a plane at least substantially parallel to the substrate assembly in a pattern that produces a substantially random pattern of point velocities across the substrate assembly.
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This application is a continuation of U.S. patent application Ser. No. 08/574,492, filed Dec. 19, 1995, and issuing as U.S. Pat. No. 5,792,709 on Aug. 11, 1998.
The present invention relates to a high-speed wafer planarizing machine for use in chemical-mechanical planarization of semiconductor wafers.
Chemical-mechanical planarization ("CMP") processes are used to remove materials from the surface layer of a wafer in the production of ultra-high density integrated circuits. In a typical CMP process, a wafer is pressed against a slurry on a polishing pad under controlled chemical, pressure, velocity and temperature conditions. Current polishing pads have diameters of approximately two feet, and they are rotated on a platen at approximately 20 to 40 rpm. Wafers typically have diameters of 6 to 8 inches, and they are simultaneously rotated at approximately 10 to 30 rpm and translated across the polishing pad. The slurry solution contains small, abrasive particles that mechanically remove material from the surface layer of the wafer as the wafer is moved over the pad.
After a wafer is planarized, it is removed from the polishing pad and rinsed with deionized water to remove residual particles on the surface of the wafer. Wafers are typically re-planarized a second time to obtain a uniformly planar surface at a desired end point, and then they are removed from the planarizing machine and re-rinsed with deionized water.
CMP processes must consistently and accurately create a uniform, planar surface on the wafer at a desired endpoint. Many microelectronic devices are typically fabricated on a single wafer by depositing layers of various materials on the wafer, and manipulating the wafer and the other layers of material with photolithographic, etching, and doping processes. In order to manufacture ultra-high density integrated circuits, CMP processes must produce a highly planar surface so that the geometries of the component parts of the circuits may be accurately positioned across the full surface of the wafer. Integrated circuits are generally patterned on a wafer by optically or electromagnetically focusing a circuit pattern on the surface of the water. If the surface of the wafer is not highly planar, the circuit pattern may not be sufficiently focused in some areas, resulting in defective circuits. Therefore, it is important to accurately planarize a uniformly planar surface on the wafer.
One problem with current CMP planarizers is that they do not produce a wafer with a sufficiently uniform surface because the relative velocity between the wafer and the pad changes from the center of the wafer to its perimeter in proportion to the radial distance from the center of the wafer. The center-to-edge velocity profile generally causes the perimeter of the wafer to have a different temperature, and thus a different polishing rate, than the center of the wafer. Accordingly, it would be desirable to reduce or eliminate the center-to-edge velocity profile across the wafer.
In the competitive semiconductor industry, it is also highly desirable to maximize the throughput of CMP processes to produce accurate, planar surfaces as quickly as possible. The throughput of CMP processes is a function of several factors, including the rate at which the thickness of the wafer decreases as it is being planarized ("the polishing rate"), and the ability to perform the rinsing and planarizing steps quickly. A high polishing rate generally results in a greater throughput because it requires less time to planarize a wafer. Similarly, performing the planarizing and rinsing steps quickly reduces the overall time it takes to completely planarize a wafer. Thus, it would be desirable to maximize the polishing rate and minimize the time required to perform the planarizing and rinsing steps.
Another problem with current CMP processes is that the polishing rates are limited because the center-to-edge velocity profile across the wafer limits the maximum velocity between the wafer and polishing pad. As stated above, the polishing rate is a function of the relative velocity between the wafer and the pad. Rotating the wafer at higher speeds, however, only exacerbates the center-to-edge velocity profile across the surface of the wafer because the difference between the linear velocity at the perimeter of the wafer and the center of the wafer increases as the angular velocity of the wafer increases. Accordingly, it would be desirable to provide a wafer planarizer that increases the maximum velocity between the wafer and the pad without increasing the center-to-edge velocity profile across the wafer.
Still another problem of the current CMP processes is that the procedure of planarizing, rinsing, re-planarizing, and re-rinsing is time-consuming. In current CMP processes, the wafer is moved back and forth between the planarizing machine and a wafer rinser throughout the process. Each time the wafer is moved from the planarizer to the wafer rinser, an arm picks up the wafer and physically moves it over to the wafer rinser. The wafer planarizer is idle while the wafer is being rinsed, and the wafer rinser is idle while the wafer is being planarized. In current CMP processes, therefore, either the wafer planarizer or the wafer rinser is idle at any given time. Thus, it would be desirable to provide a more efficient wafer planarizer and wafer rinser.
The inventive high-speed planarizing machine has a platform that holds the wafer stationary during planarization, and a carrier positioned opposite the platform. The carrier rotates about an axis and is translated in a plane that is substantially parallel to the wafer. A polishing pad is attached to the carrier and positioned opposite the wafer. The carrier rotates and translates the polishing pad across the wafer while the wafer is held stationary.
The present invention provides a high-speed planarizing apparatus for planarizing semiconductor wafers that eliminates the center-to-edge velocity profile across the wafer. The wafer planarizing apparatus of the invention also simultaneously planarizes and rinses a number of wafers to provide parallel processing of a plurality of wafers. For the purposes of better understanding the present invention, "point velocity" is the relative linear velocity between a point on the wafer and the surface of the pad. Each point on the wafer in contact with the pad has a point velocity that is a function of the radial distance from the rotational axis of the pad and the translational velocity of the pad. One important aspect of the invention is to provide a planarizer in which the diameter of the polishing pad is less than the diameter of the wafer. Another important aspect of the invention is to hold the wafer stationary while moving such a small pad in an asymmetrical pattern across the surface of the wafer. By holding the wafer stationary and using a small pad, the average of the point velocities along a radius of the wafer are substantially random. The present invention, therefore, does not produce a center-to-edge velocity profile across the surface wafer.
The pad carrier 40 has an actuator arm 44 attached to its upper surface and a pad socket 42 formed in its bottom surface. A perforated spacer 50 is attached to the upper portion of the pad socket 42, and the pad 60 is attached to the lower surface of the spacer 50. The spacer 50 and the pad 60 are securely attached to the pad carrier 40 by drawing a vacuum in the pad socket 42. The spacer 50 has a plurality of holes 52 through which the vacuum in the pad socket 42 draws the upper surface 62 of the pad 60 against the perforated spacer 50. The spacer 50 is preferably an optical flat that positions a planarizing surface 64 on the pad 60 substantially parallel to a plane defined by the upper surface 32 of the wafer 30.
Referring to
Moreover, the pad 60 is desirably moved along several paths across the surface of the wafer 30 so that the pad 60 passes over each point on the wafer 30 several times. For example, the pad 60 may be moved along paths Q and U to pass the pad 60 over all of the points in the region 35 at least twice. By making multiple passes over each point on the wafer, each point experiences multiple random velocities that result in an average point velocity for each point in the region 35 on the wafer 30. Accordingly, the present invention eliminates point velocity patterns and averages the point velocities across the surface of the wafer to provide a more uniform removal of material from the wafer.
A pad carrier is received within each recess of the turret 170. Referring still to
A number of perforated spacers and pads are attached to the pad carriers. A first perforated spacer 150(a) and the first pad 160(a) are attached to the first pad carrier 140(a) by a vacuum, as discussed above. Similarly, a second perforated spacer 150(b) and the second pad 160(b) are attached to the second pad carrier 140(b) by a vacuum. The diameter of each of the pads 160(a) and 160(b) in the multi-head planarizer 100 is less than the diameter of the wafer 30. In a preferred embodiment, the sum of the diameter of the pads 160(a) and 160(b) is also less than the diameter of the wafer 30. A number of slurry dispensers 180(a), 180(b), and 180(c) are positioned on the turret 170 to deposit a slurry solution 182 onto the upper surface 32 of the wafer 30.
A magazine 190 for holding a plurality of pads 160 is positioned near the platform 24. A number of pads 160 are positioned in first and second chambers 192(a) and 192(b) of the magazine 190. A first plug 193(a) positioned in the first chamber 192(a) is biased upwardly by a first spring 194(a), and a second plug 193(b) positioned in the second chamber 192(b) is biased upwardly by a second spring 194(b). After the pads 160(a) and 160(b) have planarized a wafer, they are removed from the wafer carriers 140(a) and 140(b) by a backside pressure created in the pad carriers 140(a) and 140(b). The multi-head planarizer 100 is then moved over the magazine 190, and new pads 160 are attached to the pad carriers 140(a) and 140(b) by drawing a vacuum against the top surface of the new pads.
In operation, the carrousel 90 selectively positions a plurality of wafers proximate to appropriate devices to simultaneously planarize and rinse the wafers in a desired sequence. At the start of the process, the wafer loader 85 loads the first wafer 30(a) onto the first station 91, and then the carrousel 90 rotates counter-clockwise to position the first wafer 30(a) under the pre-rinse nozzle 301. The wafer loader 85 then loads another wafer onto the second station 92, and the pre-rinse nozzle 301 sprays the first wafer 30(a) in a pre-rinse cycle. The carrousel 90 rotates again so that the first wafer 30(a) is positioned under the first multi-head planarizer 100(a). The carrousel 90 continuously indexes the wafers to an appropriate device so that a number of wafers may be simultaneously pre-rinsed, planarized, primary-rinsed, final-planarized, final-rinsed, and unloaded/loaded.
One advantage of the present invention is that the carrousel 90 provides parallel processing of several wafers. As shown by
Another advantage of the present invention is that it eliminates the center-to-edge velocity profile across the surface of the wafer. By holding the wafer stationary during planarization, and by providing a pad that is smaller than the wafer, the pad may move randomly across the face of the wafer 30 and pass over any given point on the wafer 30 several times. The point velocities on the wafer are randomly distributed eliminate point velocity patterns across the wafer. Unlike conventional CMP planarizers, therefore, the perimeter of a wafer will not have consistently different point velocities and polishing rates than the center of the wafer.
As discussed above, the elimination of the center-to-edge velocity profile will produce a more uniform surface on the wafer because the slurry distribution and temperature will be more uniform across the face of the wafer. Moreover, without a center-to-edge velocity profile, the planarizing machines of the invention can achieve higher polishing rates because the pads may be rotated at much higher angular velocities compared to conventional CMP machines.
From the foregoing it will be appreciated that, although specific embodiments of the invention have been described herein for purposes of illustration, various modifications may be made without deviating from the spirit and scope of the invention. Accordingly, the invention is not limited except as by the appended claims.
Robinson, Karl M., Stroupe, Hugh
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