The present invention generally relates to provide a fabrication method for forming a rounded corner of a contact window or a via by using a two-step light etching technique. In the present invention, after the etching process to form the contact window or the via, an object of the invention is to utilize oxygen plasma and fluorocarbon plasma of the two-step light etching technique to produce the rounded corner of the window or via so as this rounded opening profile of the contact window or the via can supply for following metal-filling processes.
|
1. A fabrication method for forming a rounded corner of a contact window by using a two-step light etching technique, said fabrication method comprising the steps of:
providing a semiconductor device; forming a dielectric layer on said semiconductor device; forming a photoresist layer as a mask on said dielectric layer; etching said dielectric layer to form a contact window; performing a first-step etching process to remove a portion of said photoresist layer adjacent to the opening of said contact window so as to expose a portion of said dielectric layer adjacent to the contact window; and performing a second-step etching process to remove the exposed portion of said dielectric layer to form a rounded profile of said opening of said contact window and then removing said photoresist layer.
8. A fabrication method for forming a rounded corner of a via by using a two-step light etching technique, said fabrication method comprising the steps of:
providing a semiconductor device having a metal layer thereon; forming a flat dielectric layer on said metal layer; forming a patterned photoresist layer said dielectric layer; etching said dielectric layer by using said patterned photoresist layer as a mask to form a via hole; performing a oxygen plasma etching process to remove a portion of said photoresist layer adjacent to the opening of said via hole so as to expose a portion of said dielectric layer adjacent to the via hole; and performing a fluorocarbon plasma etching process to round the exposed portion of said dielectric layer to form a rounded profile of said opening of said via hole and then removing said photoresist layer.
2. The fabrication method according to
3. The fabrication method according to
4. The fabrication method according to
5. The fabrication method according to
6. The fabrication method according to
7. The fabrication method according to
9. The fabrication method according to
10. The fabrication method according to
11. The fabrication method according to
12. The fabrication method according to
|
1. Field of the Invention
The present invention generally relates to an etching technique in the semiconductor manufacture, and more particularly relates to a method for forming a rounded corner of a contact window and a via by using a two-step light etching technique.
2. Description of the Prior Art
In view of the effect of the etching process is remove the non-photoresist-covered and non-protected portion of the membrane by using chemical reaction method or physics way, wherein the membrane is deposited before the photolithograph process and has a thickness between about thousands of angstroms or hundreds of angstroms. In other word, the device pattern of the photo-mask is transferred on the photoresist by the photolithograph process and then transferred to the membrane by the etching process.
In the semiconductor manufacture, the contact between metal layer and silicon surface and the contact between different metal layers are formed by the way of the interconnection according to the metallization process. In general, the contact between metal layer and silicon surface is so-called a contact window and the contact between different metal layers is so-called a via. With the increased density of integrated circuit, the interconnection technique becomes more and more important so as the formulation of the contact window or via also becomes more and more important.
To make an example of the fabrication of the MOS contact window, referring to the
For the purpose of improved metal-filling, after completing the contact window 16 and removing the photoresist layer 14, the conventional method utilizes the higher energy ion to strike the opening of the contact window 16 to achieve the object of the top corner rounding, such as shown in the FIG. 1C. However, the method for rounding the top corner with the higher energy ion will easily cause the disadvantages of charge induced damage and bottom layer loss. Furthermore, it will cause the effect of the bowling profile.
Obviously, the main spirit of the present invention is to provide a fabrication method for forming a rounded opening of a contact window and a via by using a two-step light etching technique, and then some disadvantages of well-known technology are overcome.
The primary object of the present invention is to provide a fabrication method for forming a rounded corner of a contact window and a via hole by using a two-step light etching technique and supply for following metal-filling process.
Another object of the present invention is to utilize oxygen plasma, which are full of neutral radical and lower energy ion, and fluorocarbon plasma to complete the two-step light etching process. The present invention not only can achieve the object of the rounded corner of a contact window or a via, but also can overcome some disadvantages of charge induced damage and bottom layer loss resulting in prior technology.
A further object of the present invention is to provide a method for forming a rounded corner of a contact window and a via hole by using a two-step light etching technique with visible equipments.
In order to achieve previous objects, the present invention comprises the steps of: forming a flat dielectric layer on a semiconductor device; forming a photoresist layer on the dielectric layer; and etching the dielectric layer by using the photoresist layer as a mask to form a contact window. In the present invention, a first step etching process is performed to remove a portion of the photoresist layer adjacent to the opening of the contact window so as to expose a portion of said dielectric layer adjacent to the contact window; and a second-step etching process is performed to round the exposed portion of the dielectric layer to form a rounded profile of the opening of the contact window; and then to remove the photoresist layer thereon.
Other advantages will become apparent from the following description taken in conjunction with the accompanying drawings wherein are set forth, by way of illustration and example, certain embodiments of the present invention.
The foregoing aspects and many of the accompanying advantages of this invention will become more readily appreciated as the same becomes better understood by reference to the following detailed description, when taken in conjunction with the accompanying drawings, wherein:
Referring to the
Referring to the
After defining the size of the contact window, a contact window 28 is formed by existing etching technique to etch and remove the exposed portion of the dielectric layer 22 from the etching window 26 and stop till reaching the semiconductor substrate 20, wherein the patterned photoresist layer 24 is used as a mask, such as shown in the FIG. 2B.
Referring to the FIG. 2C and
Following, a fluorcarbon plasma etching technique, which is usually used CHF3 as its reaction gas, is perform to light etch the dielectric layer 22, such as shown in the FIG. 2D. The present uses fluorcarbon plasma etching technique of excellent etching selectivity to etch the dielectric layer 22 to form a rounded corner 30 of the opening of the contact window 28 to achieve the object of the invention to obtain a rounded opening of the contact window 28.
Last, referring to the
Another embodiment of the present invention is illustrated in the
According to the
Referring to the
Wherein, the mentioned dielectric layer is usually made of by selected by the group of phosphosilicate glass (PSG), fluorosilicate glass (FSG), boronphosphosilicate glass (BPSG), silicon oxide formed by plasma chemical vapor deposition method, and tetraethyl-orthosilicate (TEOS) formed by plasma chemical vapor deposition method.
Besides, after the formation of contact window or via which are mentioned above, the present invention can perform the steps of the oxygen plasma etching process and the fluorocarbon plasma etching process in the same etching. The present invention also can perform the steps of the oxygen plasma etching process and the fluorocarbon plasma etching process the photoresist-free machine before the step of removing the photoresist layer.
However, in comparison of the conventional method for forming the contact window or the via, prior technology only utilizes one-step plasma etching technique to etch the dielectric layer till reaching the silicon substrate. It could not produce the rounded profile of the opening of the contact window or via, so it must utilize higher energy ion to form the rounded profile, but it remains some disadvantages mentioned above. Beside, for the deep sub-micron MOS manufacture and the reduced size of the contact window and via, prior technology could not overcome these advantages. The present invention is to utilize oxygen plasma, which are full of neutral radical and lower energy ion, and fluorocarbon plasma of the two-step light etching process so as the present invention not only can achieve the object of the rounded opening of a contact window or a via for the following processes, but also some disadvantages of charge induced damage and bottom layer loss resulting in prior technology are overcome by the present invention.
The forgoing embodiments of the invention have been presented in a example relative about the contact window or the first-layer via. The present invention also can apply for the process of the second-layer via, the third-layer via, or the following-layer via.
The forgoing description of the embodiments of the invention has been presented for purposes of illustration and description, and is not intended to be exhaustive or to limit the invention to he precise from disclosed. The description was selected to best explain the principles of the invention and practical application of these principles to enable others skilled in the art to best utilize the invention in various embodiments and modifications as are suited to the particular use contemplated. It is intended that the scope of the invention not to be limited by the specification, but be defined by the claim set forth below.
Liang, Ming-Chung, Tsai, Shin-Yi
Patent | Priority | Assignee | Title |
7101786, | Jul 12 2004 | Hynix Semiconductor Inc. | Method for forming a metal line in a semiconductor device |
7285497, | Mar 31 2004 | Seiko Epson Corporation | Mask, method for manufacturing a mask, method for manufacturing an electro-optical device, and electronic equipment |
7858488, | Dec 29 2006 | TAIWAN SEMICONDUCTOR MANUFACTURING CO , LTD | Method of forming a device isolation film of a semiconductor device |
8420533, | Feb 26 2010 | ALSEPHINA INNOVATIONS INC | Metallization system of a semiconductor device comprising rounded interconnects formed by hard mask rounding |
Patent | Priority | Assignee | Title |
6159847, | Nov 18 1997 | Texas Instruments Incorporated | Multilayer metal structure for improved interconnect reliability |
6333265, | Dec 12 1996 | Texas Instruments Incorporated | Low pressure, low temperature, semiconductor gap filling process |
6384480, | Feb 18 1999 | U S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT | Formation of electrical contacts to conductive elements in the fabrication of semiconductor integrated circuits |
6387798, | Jun 25 2001 | Institute of Microelectronics | Method of etching trenches for metallization of integrated circuit devices with a narrower width than the design mask profile |
6391763, | Dec 17 1999 | Winbond Electronics Corp. | Method for forming a plug or damascene trench on a semiconductor device |
6440847, | Apr 30 2001 | Taiwan Semiconductor Manufacturing Company | Method for forming a via and interconnect in dual damascene |
Executed on | Assignor | Assignee | Conveyance | Frame | Reel | Doc |
Mar 19 2002 | LIANG, MING-CHUNG | MACRONIX INTERNATIONAL CO , LTD | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 012732 | /0647 | |
Mar 19 2002 | TSAI, SHIN-YI | MACRONIX INTERNATIONAL CO , LTD | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 012732 | /0647 | |
Mar 26 2002 | Macronix International Co., Ltd. | (assignment on the face of the patent) | / |
Date | Maintenance Fee Events |
Jun 02 2006 | M1551: Payment of Maintenance Fee, 4th Year, Large Entity. |
Jun 15 2006 | ASPN: Payor Number Assigned. |
May 11 2010 | M1552: Payment of Maintenance Fee, 8th Year, Large Entity. |
May 26 2014 | M1553: Payment of Maintenance Fee, 12th Year, Large Entity. |
Date | Maintenance Schedule |
Jan 28 2006 | 4 years fee payment window open |
Jul 28 2006 | 6 months grace period start (w surcharge) |
Jan 28 2007 | patent expiry (for year 4) |
Jan 28 2009 | 2 years to revive unintentionally abandoned end. (for year 4) |
Jan 28 2010 | 8 years fee payment window open |
Jul 28 2010 | 6 months grace period start (w surcharge) |
Jan 28 2011 | patent expiry (for year 8) |
Jan 28 2013 | 2 years to revive unintentionally abandoned end. (for year 8) |
Jan 28 2014 | 12 years fee payment window open |
Jul 28 2014 | 6 months grace period start (w surcharge) |
Jan 28 2015 | patent expiry (for year 12) |
Jan 28 2017 | 2 years to revive unintentionally abandoned end. (for year 12) |