Disclosed is a device to control a circuit for the vertical deflection of a spot scanning a screen, and more particularly a control device whose output amplifier stage works in class D mode at the rate of a switching signal called a first switching signal. The control device has an internal auxiliary supply to generate the overvoltage needed for the fast flyback of the spot. This auxiliary power supply is a switching voltage generation circuit whose switching signal, called a second switching signal, is synchronous with the first switching signal. The present invention has been shown to used advantageously in television screens and/or computer screens.
|
1. A device to control a circuit for the vertical deflection of a spot scanning a screen, the device comprising:
an output amplifier stage receiving power from a main power supply for the vertical scanning control; and an auxiliary power supply for generating an overvoltage at the vertical deflection circuit for the fast flyback of the spot; wherein the output amplifier stage operates at a rate of a switching signal called a first switching signal; wherein the auxiliary power supply is a switching voltage generation circuit whose switching signal, called a second switching signal, is synchronous with the first switching signal.
11. A device to control a circuit for the deflection of a spot scanning a screen, the device comprising:
an output amplifier stage receiving power from a main power supply for the scanning control, the output amplifier stage operating at a rate of a switching signal called a first switching signal; and an auxiliary power supply formed from a switching voltage generation circuit for generating an over voltage at the deflection circuit for the fast flyback of the spot, the switching voltage generation circuit comprising: a second switching signal which is synchronous with the first switching signal; an output terminal to deliver the over voltage; an inductive element series-mounted with a switch between a first terminal of the main power supply and a second terminal of the main power supply; a capacitive element connected between the output terminal and the second terminal of the main power supply; and a diode whose anode is connected to an intermediate point between the inductive element and the switch and whose cathode is connected to the output terminal and a switch control circuit to deliver the second switching signal designed to control the state of the switch, the second switching signal being synchronous with the first switching signal. 3. The device according to
an output terminal to deliver the over voltage; an inductive element series-mounted with a switch between a first terminal of the main power supply and a second terminal of the main power supply; a capacitive element connected between the output terminal and the second terminal of the main power supply; and a diode whose anode is connected to an intermediate point between the inductive element and the switch and whose cathode is connected to the output terminal and a switch control circuit to deliver the second switching signal designed to control the state of the switch, the second switching signal being synchronous with the first switching signal.
5. The device according to
a reference voltage input terminal for receiving a reference voltage signal; a clock input terminal for receiving clock signal synchronous with the first switching signal; a ramp input terminal for receiving a ramp signal; an input terminal for receiving a signal representing the voltage present at the output terminal of the switching voltage generating circuit; and an output terminal for providing the second switching signal.
6. The device according to
a reference voltage input terminal for receiving a reference voltage signal; a clock input terminal for receiving clock signal synchronous with the first switching signal; a ramp input terminal for receiving a ramp signal; an input terminal for receiving a signal representing the voltage present at the output terminal of the switching voltage generating circuit; and an output terminal for providing the second switching signal.
7. The device according to
a resistive divider bridge formed by two resistors series-connected between the output terminal and the second terminal of the main power supply; wherein the signal representing the voltage present at the output terminal of the switching voltage generation circuit corresponds to a voltage at a midpoint of the resistive divider bridge.
8. The device according to
a resistive divider bridge formed by two resistors series-connected between the output terminal and the second terminal of the main power supply; wherein the signal representing the voltage present at the output terminal of the switching voltage generation circuit corresponds to the voltage at the midpoint of the resistive divider bridge.
9. The device according to
10. The device according to
13. The device according to
14. The device according to
a reference voltage input terminal for receiving a reference voltage signal; a clock input terminal for receiving clock signal synchronous with the first switching signal; a ramp input terminal for receiving a ramp signal; an input terminal for receiving a signal representing the voltage present at the output terminal of the switching voltage generating circuit; and an output terminal for providing said second switching signal.
15. The device according to
a reference voltage input terminal for receiving a reference voltage signal; a clock input terminal for receiving clock signal synchronous with the first switching signal; a ramp input terminal for receiving a ramp signal; and an input terminal for receiving a signal representing the voltage present at the output terminal of the switching voltage generating circuit; and an output terminal for providing said second switching signal.
16. The device according to
a resistive divider bridge formed by two resistors series-connected between the output terminal and the second terminal of the main power supply; wherein the signal representing the voltage present at the output terminal of the switching voltage generation circuit corresponds to the voltage at the midpoint of the resistive divider bridge.
|
This application is based upon and claims priority from prior French Patent Application No. 0101839, filed Feb. 7, 2001, the disclosure of which is hereby incorporated by reference in its entirety.
1. Field of the Invention
The present invention generally relates to the field of devices for the control of a circuit for the deflection of a spot on a screen and more particularly the present invention relates to a circuit for the vertical deflection of a spot scanning on a screen, especially for television screens and computer screens using class D amplifiers.
2. Description of Related Art
Generally, the spot scans the screen in two orthogonal directions, typically a horizontal direction and a vertical direction. Horizontal or line scanning consists of shifting the spot from left to right and then making a line return at the end of the line to go to the next line. Simultaneously, in vertical scanning, the screen is scanned from top to bottom. When the spot reaches the bottom of the screen, a flyback is done to bring the spot to the top of the screen to begin the next scan. The vertical deflection of the spot therefore comprises an outbound or forward phase of vertical scanning (from top to bottom) and a phase for the fast flyback of the spot. This vertical deflection of the spot is preformed by placing the spot in a magnetic field created by one or more vertical deflection coils as part of a vertical deflection control circuit.
One device used in the control circuits for the vertical deflection of a spot scan on a screen is class AB (linear) or class D amplifiers. Class AB amplifiers are amplifiers whose output stage comprises transistors working in their linear zone and producing a quasi-DC voltage for this purpose. Class D amplifiers are amplifiers whose output stage comprises transistors working alternately in their saturation zone and in their cut-off zone so as to generate a "square-wave" voltage (an alternation of high and low levels). The high frequency components of this "square-wave" voltage are then filtered to obtain the mean value of the voltage.
The role of these amplifiers is to amplify an instructed-value signal, generally a sawtoothed signal, in order to deliver a vertical scanning control signal as shown in FIG. 1. The amplifier delivers a linear voltage ramp (the voltage decreases from +VM to -VM) during the forward phase of the vertical scanning and delivers an overvoltage VF of several tens of volts (preferably 70 to 75 volts) during the spot flyback phase to ensure a fast spot flyback.
One control for a class D amplifier is described in a vertical deflection control circuit in the French patent application No. 9900715, with inventor Philippe Maige and commonly assigned with STMicroelectronics SA Société anonyme, and incorporated by reference in its entirety.
The operational amplifier AO delivers an error signal which is used by the control means PWM and the detection means DTF to control the output stage BLS. Referring to
The output stage BLS also has means MFB designed to control the generation of the overvoltage needed for the fast spot flyback. Referring to
This control device works as follows. During the forward phase of vertical scanning, the control means PWM deliver control pulses (switching signal COMT1) to make the transistors T1 and T2 alternately conductive and non-conductive with a very high switching frequency, in the range of 100 KHz. During this phase, the transistor T4 is conductive and the transistor T3 is off.
During this phase, the duration of the control pulses, designed to make the transistor T1 conductive, decreases from about 90% of the period of the switching signal to about 10% of the period of the switching signal. Conversely, the duration of the control pulses, designed to make the transistor T2 conductive, increases from about 10% of the period of the switching signal to about 90% of the period of the switching signal. The voltage at the terminal BSS is filtered by the filter F to keep only the mean value.
It is important to note that, when the output voltage of the control device is zero, the control pulses of the switching signal take up about 50% of the switching period.
During the fast flyback phase of the spot, the control means PWM respectively make the transistors T1 and T2 conductive and non-conductive and the detection means DTF respectively make the transistors T3 and T4 conductive and non-conductive. The voltage VF given by the auxiliary power supply ALM is then delivered to the output terminal BS of the control device.
At present, the auxiliary power supply ALM used to generate the overvoltage is either external, i.e., external to the control device or internal, i.e., integrated into the control device. In the former case corresponding to the case shown in
The case of an auxiliary supply known as an internal supply is illustrated in FIG. 4. The internal auxiliary supply is formed by a chemical capacitor C whose first terminal is connected for example to the positive terminal +Vcc of the main power supply by means of the first two-way switch T4 and to the drain of the transistor T1. The second switch T3 is then used to connect the second terminal of the capacitor to the positive terminal +Vcc of the main power supply. The second terminal of the capacitor is also connected to the negative terminal -Vcc of the main power supply by means of a third two-way switch T6. The capacitor C is then charged by the main power supply voltage during the forward phase of the vertical scanning and is placed in series with the positive terminal of the main power supply during the fast spot flyback phase to generate the overvoltage. In this circuit, the voltage values of the main supply and of the auxiliary supply are correlated. This approach although useful, is not without its drawbacks. One drawback is that the voltage generated by this internal circuit is not sufficient. Typically the voltage generated is in the range of 36 V for a main power supply of 24 V. One solution to this drawback consists of increasing the value of the main power supply voltage. However, this approach of increased power supply voltage has its drawbacks. For example one drawback is it requires an increase in the heat dissipation in the control device. This goes against the goal desired through the use of class D amplifiers. Accordingly, a need exists to provide an auxiliary power supply to overcome these shortcomings for the control of vertical deflection circuits.
The present invention results from research carried out on devices for the control of vertical deflection circuits with an output stage working. The present invention has been shown to be used advantageously with an output stage working in class D mode. Moreover, the present invention provides a control device that does not require any auxiliary external power supply and is capable of producing a high voltage value in the range of 70 to 75 volts without disturbing the small-signal operation of the amplifier of the control device, especially during the forward scanning stage.
The present invention is a device to control a circuit for the vertical deflection of a spot scanning a screen, comprising an output amplifier stage powered by a main power supply for the vertical scanning control and an auxiliary power supply capable of generating an overvoltage at the vertical deflection circuit for the fast flyback of the spot, the output amplifier stage working in class D mode at the rate of a switching signal called the first switching signal, the auxiliary power supply being also internal to the control device, wherein the auxiliary power supply is a switching voltage generation circuit whose switching signal, called a second switching signal, is synchronous with the first switching signal.
According to a particular embodiment, the switching voltage generation circuit comprises an output terminal to deliver the overvoltage, an inductive element series-mounted with a switch between a first terminal of the main power supply and a second terminal of the main power supply, a capacitive element connected between the output terminal and the second terminal of the main power supply, a diode whose anode is connected to an intermediate point between the inductive element and the switch and whose cathode is connected to the output terminal and a switch control circuit to deliver the second switching signal designed to control the state of the switch, the second switching signal being synchronous with the first switching signal.
In this embodiment for example, the switch control circuit is preferably a DC/DC regulator receiving at input a reference voltage signal, a signal representing the voltage present at the output terminal of the switching voltage generating circuit, a clock signal synchronous with the first switching signal and a ramp signal used to modulate the duration of the control pulses of the second switching signal.
The subject matter which is regarded as the invention is particularly pointed out and distinctly claimed in the claims at the conclusion of the specification. The foregoing and other features, and advantages of the invention will be apparent from the following detailed description taken in conjunction with the accompanying drawings.
It should be understood that these embodiments are only examples of the many advantageous uses of the innovative teachings herein. In general, statements made in the specification of the present application do not necessarily limit any of the various claimed inventions. Moreover, some statements may apply to some inventive features but not to others. In general, unless otherwise indicated, singular elements maybe in the plural and vice versa with no loss of generality.
In the drawing like numerals refer to like parts through several views.
The invention provides for the integration into the control device of a switching voltage generation circuit that generates the overvoltage from voltage given by the main power supply of the control device. In one embodiment, the switching signal of the switching voltage generation circuit and the switching signal COMT1 of the output amplifier stage BLS are synchronous so that the switching signal of the switching voltage generation circuit does not disturb the working of the output amplifier stage ETS and vice versa.
A possible structure of the switching voltage generation circuit ALM is shown in FIG. 5. This device ALM is integrated into the control device DCS. In the present case, it is a voltage step-up converter. It comprises an inductance coil L, a first terminal of which is connected to the positive terminal +Vcc of the main power supply of the control device, and the second terminal of which is connected to the first terminal of a resistor R5 by means of a switch herein formed by a NMOS type transistor T5. The drain of the transistor T5 is connected to the second terminal of the inductance coil L and its source is connected to the first resistor R5. The second terminal of the resistor R5 is connected to the negative terminal -Vcc of the main power supply. The voltage generation device ALM furthermore comprises a diode D5 whose anode is connected to the second terminal of the inductance coil L and whose cathode is connected to an output terminal S. A capacitor Cf is connected between the output terminal S and the negative terminal -Vcc of the main power supply. During the forward phase of vertical scanning, this capacitor is charged with the current coming from the inductance coil L so as to reach an overvoltage value VF of about 70 volts.
To control the transistor T5 and regulate the voltage at the output terminal S of the device ALM, a DC/DC regulator referenced Reg is provided. This regulator delivers a switching signal COMT5 to control the state of conduction of the transistor T5. The switching signal COMT5 is given to the gate of the transistor T5. In the example shown in
The working of a switching voltage generation circuit such as this is well known to those skilled in the art. This device works in such a way that, when the transistor T5 is conductive, the inductance coil L stores the energy and the current iL flowing through it increases and when the transistor T5 is off, the inductance coil L restores the stored energy and the capacitor Cf gets charged.
We shall now give a more detailed description of the working of this voltage generation device as compared with that of the control device of the invention with reference more particularly to
During the vertical scanning forward phase, the capacitor Cf gets charged. As shown in
Preferably, it is seen to it that the duration of each control pulse of the switching signal COMT5 is lower than that of the corresponding control pulse of the switching signal COMT1 so that the trailing edges of the switching signal COMT5 do not disturb the working of the output amplifier stage ETS of the control device DCS.
During the fast flyback phase of the spot, the switching signal COMT1 remains at a high level while the switching signal COMT5 remains at the low level.
It must be noted that this could also be integrated into an AB class control device.
Although a specific embodiment of the invention has been disclosed, it will be understood by those having skill in the art that changes can be made to this specific embodiment without departing from the spirit and scope of the invention. The scope of the invention is not to be restricted, therefore, to the specific embodiment, and it is intended that the appended claims cover any and all such applications, modifications, and embodiments within the scope of the present invention.
Guedon, Yannick, Maige, Philippe
Patent | Priority | Assignee | Title |
Patent | Priority | Assignee | Title |
4874992, | Aug 04 1988 | Honeywell Inc. | Closed loop adaptive raster deflection signal generator |
5260628, | Oct 14 1991 | Sony Coproration | Deflection distortion correction circuit |
6151082, | Oct 16 1996 | Samsung Electronics, Co., Ltd. | Horizontal focus controlling apparatus for cathode-ray tube |
6411048, | Jan 22 1999 | STMICROELECTRONICS S A | Method and device for controlling a circuit for the vertical deflection of a spot scanning a screen, in particular for a television set or a computer monitor |
EP1022855, |
Executed on | Assignor | Assignee | Conveyance | Frame | Reel | Doc |
Feb 06 2002 | STMicroelectronics S.A. | (assignment on the face of the patent) | / | |||
Apr 08 2002 | MAIGE, PHILIPPE | STMICROELECTRONICS S A | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 012903 | /0757 | |
Apr 08 2002 | GUEDON, YANNICK | STMICROELECTRONICS S A | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 012903 | /0757 |
Date | Maintenance Fee Events |
Jan 03 2007 | M1551: Payment of Maintenance Fee, 4th Year, Large Entity. |
Jan 11 2007 | ASPN: Payor Number Assigned. |
Dec 24 2010 | M1552: Payment of Maintenance Fee, 8th Year, Large Entity. |
Feb 13 2015 | REM: Maintenance Fee Reminder Mailed. |
Jul 08 2015 | EXP: Patent Expired for Failure to Pay Maintenance Fees. |
Date | Maintenance Schedule |
Jul 08 2006 | 4 years fee payment window open |
Jan 08 2007 | 6 months grace period start (w surcharge) |
Jul 08 2007 | patent expiry (for year 4) |
Jul 08 2009 | 2 years to revive unintentionally abandoned end. (for year 4) |
Jul 08 2010 | 8 years fee payment window open |
Jan 08 2011 | 6 months grace period start (w surcharge) |
Jul 08 2011 | patent expiry (for year 8) |
Jul 08 2013 | 2 years to revive unintentionally abandoned end. (for year 8) |
Jul 08 2014 | 12 years fee payment window open |
Jan 08 2015 | 6 months grace period start (w surcharge) |
Jul 08 2015 | patent expiry (for year 12) |
Jul 08 2017 | 2 years to revive unintentionally abandoned end. (for year 12) |