A method of manufacturing a semiconductor device etches a feature on a substrate in accordance with a photoresist mask. The photoresist mask is removed by plasma etching. Laser thermal annealing is performed to vaporize polymer residue created during the stripping of the photoresist mask, and to repair damage to the substrate.
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1. A method of manufacturing a semiconductor device, comprising the steps of:
etching a feature on a substrate in accordance with a photoresist mask; stripping the photoresist mask by plasma removal; and laser thermal annealing the substrate to repair damage to the substrate.
8. A method of forming a semiconductor device, comprising the steps of:
forming an etch stop layer on a substrate; forming a gate layer on the etch stop layer; creating a photoresist mask on the gate layer; etching the gate layer in accordance with the photoresist mask by plasma etching; removing the photoresist mask by plasma etching; and laser thermal annealing the etch stop layer and the substrate.
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The present invention relates to the field of semiconductor processing, and more particularly, to repairinig the etch damage created during semiconductor processing.
Over the last few decades, the semiconductor industry has undergone a revolution by the use of semiconductor technology to fabricate small, highly integrated electronic devices, and the most common semiconductor technology presently used is silicon-based. A large variety of semiconductor devices have been manufactured having various applications in numerous disciplines. One silicon-based semiconductor device is a metal-oxide-semiconductor (MOS) transistor. The MOS transistor is one of the basic building blocks of most modern electronic circuits. Importantly, these electronic circuits realized improved performance and lower costs, as the performance of the MOS transistors increased and as manufacturing costs are reduced.
A typical MOS semiconductor device includes a semiconductor substrate on which a gate electrode is formed over a gate dielectric. The gate electrode, which acts as a conductor, receives an input signal to control operation of the device. Source and drain regions are typically formed in regions of the substrate adjacent the gate electrodes by doping the regions with a dopant of a desired conductivity. The conductivity of the doped region depends on the type of impurity used to dope the region. The typical MOS transistor is symmetrical, in that the source and drain are interchangeable. Whether a region acts as a source or drain typically depends on the respective applied voltages and the type of device being made. The collective term source/drain region is used herein to generally describe an active region used for the formation of either a source or drain.
In creating the MOS transistor or other semiconductor device, the process typically involves a plasma etch process to etch material to form structures. For example, a silicon substrate may have a gate oxide layer or other layer serving as an etch stop layer provided on the top of the silicon substrate. A gate electrode layer, such as polysilicon, is provided on the oxide. A photoresist mask material is deposited and patterned by known photolithography techniques. The plasma etch process is then performed to remove portions of the gate layer that are not protected by the patterned photoresist mask.
After the plasma etch is performed, stopping on the etch stop layer, such as a gate oxide, a gate electrode has been created. The plasma etch, however, damages the etch stop layer and the underlying layers, such as the silicon substrate. The photoresist is rapidly removed in a resist strip process, and pre-diffusion or pre-rapid thermal anneal (RTA) wet cleans are done to remove polymer residue and photoresist. The polymer residue and photoresist must be removed before the damage can be repaired by the thermal anneal process.
The damage to the substrate caused by exposure to the plasma results in the enhanced oxidation of the silicon substrate in subsequent oxidations. The thicker oxide that is formed on the substrate operates to undesirably screen subsequent source/drain implants due to the damage done to the substrate by plasma.
There is a need for an improved process to repair the damage caused to etch stop layers and underlying substrates following a plasma etch process.
This and other needs are met by embodiments of the present inventions which provide a method of manufacturing a semiconductor device, comprising the steps of etching a feature on a substrate in accordance with a photoresist mask and stripping the photoresist mask by plasma removal. The substrate is laser thermal annealed to repair damage to the substrate.
By the use of laser thermal annealing, following the plasma etch, the polymer residue left over from the stripping of the resist is vaporized by the laser thermal annealing process. Further, the laser thermal annealing repairs the damage to the etch stop layer and underlying layers. This prevents the growth of thick oxide on the previously damaged substrate, thereby avoiding screening during subsequent source/drain implantation steps.
The other stated needs are also met by other embodiments of the present invention which provide a method of forming semiconductor device comprising the steps of forming an etch stop layer on a substrate and forming a gate layer on the etch stop layer. A photoresist mask is created on the gate layer. This gate layer is etched in accordance with the photoresist mask by plasma etching. The photoresist mask itself is removed by plasma etching. Laser thermal annealing is performed to the etch stop layer and the substrate.
The foregoing and other features, aspects and advantages of the present invention will become more apparent from the following detailed description of the invention when taken in conjunction with the accompanying drawings.
The present invention addresses and solves problems related to the etching of features of the semiconductor device by plasma etching. These problems include damage to the etch stop layers and to underlying substrates caused by the plasma etching process. The present invention provides for removal of the photoresist by plasma removal after the plasma etch process has been completed. Any polymer residues left after the plasma resist stripping are removed by laser thermal annealing. This laser thermal annealing is performed at an energy level sufficient to vaporize the polymer residues. At the same time, the laser thermal annealing repairs the damage to the etch stop layer and the underlying layers caused by the plasma etching.
An overlying layer 14, such as a polysilicon layer, is provided on a substrate comprising the gate oxide of the gate dielectric layer 12 and the silicon substrate layer 10. This polysilicon layer 14 may be considered a gate layer, since the polysilicon layer 14 will be etched to form a gate electrode. The polysilicon layer 14 may be deposited by any conventional methodology to a desired thickness.
In
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In the present invention, laser thermal annealing is performed to both remove the polymer residues 22 and to repair the damage caused to the gate oxide 12 and the substrate layer 10. The single step process avoids the extra steps employed in conventional techniques to remove the residues by pre-diffusion or pre-RTA wet cleans performed prior to rapid thermal annealing. The laser thermal etching process vaporizes the polymer residues 22 at the same time it repairs the damage to the etch stop layer formed by the gate oxide 12 and the damage to the underlying silicon substrate layer 10.
During the laser thermal annealing, the results of which are depicted in
Hence, the present invention acts to vaporize the polymer residues 22 and remove them from the surfaces of the gate electrode 18 and the etch stop layer formed by the gate oxide layer 12 and the gate electrode 18. At the same time, the silicon substrate layer 10 and the gate oxide layer 12 are repaired by the damage caused by the plasma etch process performed earlier. This simultaneous cleaning of residue and repairing of etch damage prevents the use of two separate steps to achieve these goals.
Following the laser thermal annealing, shallow implants into the repaired silicon substrate layer 10 are provided to create shallow implant regions 24, as shown in FIG. 6. Conventional dopants and ion implant energy levels may be employed, for example, to create the shallow implant regions 24.
One of the advantages of the invention is that the silicon substrate 10 is prevented from growing thicker oxide that can screen the source/drain implants. Using laser thermal annealing to repair the damage avoids the undesirable growth of thick oxide on the substrate 10.
Although the present invention has been described and illustrated in detail, it is to be clearly understood that the same is by way of illustration and example only and is not to be taken by way of limitation, the scope of the present invention being limited only by the terms of the appended claims.
Halliyal, Arvind, Shields, Jeffrey A., Ramsbey, Mark T., Wu, Yider, Tripsas, Nicholas H.
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