A DC-to-DC converter having an input voltage and an output voltage, which includes a circuit topology such that, in operation, the input and output voltages have the same polarity, and that a magnitude of a ratio of the input voltage to the output voltage of the DC-to-DC converter is capable of being equal to, greater than, or less than one. The circuit topology is also such that a same at least one capacitor and alternative coils of a two-coil inductor are employed in a primary and a secondary circuit loop of the DC-to-DC converter. The primary and secondary circuit loops are not electrically isolated.
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1. A DC-to-DC converter having an input voltage and an output voltage, comprising:
a circuit topology such that, in operation, the input and output voltages have the same polarity, and that a magnitude of a ratio of the input voltage to the output voltage of said DC-to-DC converter is capable of being equal to, greater than, or less than one; said circuit topology being further such that at least one capacitor and alternative coils of a two-coil inductor are employed in a primary and a secondary circuit loop of said DC-to-DC converter; said primary and secondary circuit loops not being electrically isolated.
19. A circuit for converting from an input direct current (DC) voltage, VIN, to an output direct current (DC) voltage, VO, VO and VIN having the same polarity, said circuit comprising:
an inductor coupled so as to have a primary loop circuit and a secondary loop circuit that respectively conduct current at different times during circuit operation; wherein said primary and secondary loop circuits are not electrically isolated; wherein said primary loop and secondary loop circuits are further coupled so that, during circuit operation, while said inductor is charging via current flow in said primary loop circuit, the voltage across the coils of said inductor is VIN, and while said inductor is discharging via current flow in said secondary loop circuit, the voltage across the coils of said inductor is VO.
2. The DC-to-DC converter of
3. The DC-to-DC converter of
4. The DC-to-DC converter of
5. The DC-to-DC converter of
6. The DC-to-DC converter of
7. The DC-to-DC converter of
8. The DC-to-DC converter of
9. The DC-to-DC converter of
10. The DC-to-DC converter of
11. The DC-to-DC converter of
12. The DC-to-DC converter of
13. The DC-to-DC converter of
14. The DC-to-DC converter of
15. The DC-to-DC converter of
16. The DC-to-DC converter of
17. The DC-to-DC converter of
18. The DC-to-DC converter of
21. The circuit of
22. The circuit of
23. The circuit of
25. The circuit of
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1. Field
The present invention relates to DC-to-DC converters.
2. Background Information
DC-to-DC converters provide the capability to convert energy supplied by a power supply from one voltage and current level to another voltage and current level. Such circuits are widely employed in conjunction with computing platforms, such as personal computers, server nodes, laptop computers, and a variety of other computing systems. Such circuits are desirable because specifications for a processor typically employ lower voltages, such as 1½ to 2½ volts, and higher currents, such as reaching 50 to over 60 amps, that may change over a relatively wide range with a relatively high slew rate.
DC-to-DC converters are desirable for providing voltage regulation under these conditions for a variety of reasons. One reason is because such circuitry may be placed relatively close to the board components, resulting in the capability to provide low local voltage tolerances due to higher switching frequencies, single output topology, and a reduction in resistance from shorter electrical connections. State of the art topologies for DC-to-DC converters are typically energy efficient, reliable and cost effective when input voltages and output voltages have relatively close levels. However, maintaining efficiency in an environment employing a comparatively low voltage is typically costly due at least in part to the high currents employed to maintain the same amount of power while supplying a relatively low voltage. Likewise, isolation high frequency transformers may be employed, however, such transformers are also relatively expensive. A need, therefore, exists for a DC-to-DC converter that addresses cost efficiency while having the capability to convert over a range of voltages and/or currents.
Briefly, in accordance with one embodiment of the invention, a DC-to-DC converter having an input voltage and an output voltage, includes: a circuit topology such that, in operation, the input and output voltages have the same polarity, and that a magnitude of a ratio of the input voltage to the output voltage of the DC-to-DC converter is capable of being equal to, greater than, or less than one. The circuit topology is also such that a same at least one capacitor and alternative coils of a two-coil inductor are employed in a primary and a secondary circuit loop of the DC-to-DC converter. The primary and secondary circuit loops are not electrically isolated.
Briefly, in accordance with another embodiment of the invention, a circuit for converting from an input direct current (DC) voltage, VIN, to an output direct current (DC) voltage, VO, where VO and VIN have the same polarity, includes: an inductor coupled so as to have a primary loop circuit and a secondary loop circuit that respectively conduct current at different times during circuit operation. The primary and secondary loop circuits are not electrically isolated. The primary loop and secondary loop circuits are further coupled so that, during circuit operation, while the inductor is charging via current flow in the primary loop circuit, the voltage across the coils of the inductor is VIN, and while the inductor is discharging via current flow in the secondary loop circuit, the voltage across the coils of the inductor is VO.
Briefly, in accordance with still another embodiment of the invention, a method of converting from an input direct current (DC) voltage, VIN, to an output direct current (DC) voltage, VO, where VIN and VO have the same polarity, includes the following. Current is conducted through a primary and a secondary loop circuit at different times so as to charge and discharge an inductor, included in both circuit loops. While the inductor charges the voltage across its coils is VIN, and while the inductor discharges the voltage across its coils is VO.
The subject matter regarded as the invention is particularly pointed out and distinctly claimed in the concluding portion of the specification. The invention, however, both as to organization and method of operation, together with objects, features, and advantages thereof, may best be understood by reference to the following detailed description when read with the accompanying drawings in which:
In the following detailed description, specific details are set forth in order to provide a thorough understanding of the invention. However, it will be understood by those skilled in the relevant art that the present invention may be practiced without these specific details. In other instances, well-known methods, procedures, components and circuits have not been described in detail so as not to obscure the present invention.
As illustrated in
During the period that transistor 110 is on, diode 130 is reversed biased. This is due to the presence of a negative VIN with respect to ground at the anode of the diode. When transistor 110 turns off, this results in diode 130 conducting current and the voltage across coils 164 and 162 reversing in sign. This occurs because the stored energy in inductor 160 is released in the form of current. With diode 130 conducting, the voltage across coils 164 and 162 is VO and inductor 160 delivers its stored energy to the load. Therefore, the inductor effectively discharges through capacitor 140 and load resistor 150.
In steady-state operation, during the period of the cycle in which transistor 110 is on, inductor 160 charges or stores current, and, during the period of the cycle in which transistor 110 is off, diode 130 is conducting, and, therefore, inductor 160 discharges or releases its current and delivers it to the load. This cycle is repeated continuously as controlled, at least in part, by the duty cycle of the control voltage pulse applied to the gate of transistor 110.
As illustrated in
The relationship between the input voltage and the output voltage may be obtained by equating the current through the inductor for each portion of the cycle and integrating the voltage across coil 162 or 164. This provides the following equation:
where T is the period of the switching frequency, and tON is the time duration of the ON state of the switching transistor. Therefore,
where D is the duty cycle and D=tON/T
This relationship between the input voltage and the output voltage is similar to the relationship that occurs for a DC-to-DC converter employing a flyback converter topology where a transformer is employed. However, this relationship is produced in this particular embodiment without employing a transformer. As the equation above illustrates, one advantage of this particular relationship in comparison with other types of non-isolation DC-to-DC converters is that the ratio between the input voltage and the output voltage may be equal, greater than one or less than one, indicating that it is possible to convert from a higher voltage to a lower voltage and from a lower voltage to a higher voltage. For example, if D=0.25, then D/(1-D)=⅓; however, if D=0.75, then D/(1-D)=3. In contrast, many other types of converter topologies or configurations, such as a buck converter or a boost converter, for example, are limited in that it is not possible to have a ratio capable of being both greater than one or less than one, depending on the duty cycle.
As the previous discussion illustrates, this particular embodiment of a DC-to-DC converter includes a circuit topology such that a magnitude of a ratio of the input signal to the output signal of the DC-to-DC converter is capable of being greater than one or less than one. Furthermore, the same capacitor, capacitor 120 in
In contrast with a flyback converter, for example, the primary and secondary loops are not electrically isolated, as would occur where a transformer is employed. It is not necessary to provide low leakage inductance (i.e. good coupling) between primary and secondary coils. Therefore, one advantage of this particular embodiment is a less expensive component, such as inductor 160 in
A feature of the topology for the embodiment illustrated in
Of course, the invention is not restricted in scope to this embodiment and instead of a diode, such as 130 in
An embodiment of a method of converting from an input direct current (DC) voltage, VIN, to an output direct current (DC) voltage, VO in accordance with the invention, where VIN and VO have the same polarity, is as follows. Current is conducted through a primary and a secondary loop circuit at different times so as to charge and discharge an inductor in both circuit loops. For example, the circuits shown in
While certain features of the invention have been illustrated and described herein, many modifications, substitutions, changes and equivalents thereof will now occur to those skilled in the art. It is, therefore, to be understood that the appended claims are intended to cover all such modifications and changes as fall within the true spirit of the invention.
Patent | Priority | Assignee | Title |
10283974, | Mar 02 2009 | Volterra Semiconductor LLC | Systems and methods for intelligent, adaptive management of energy storage packs |
10978241, | Dec 09 2016 | Astec International Limited | Transformers having screen layers to reduce common mode noise |
7342811, | May 27 2005 | ACLEAP POWER INC | Lossless clamp circuit for DC-DC converters |
8228152, | Jul 21 2006 | Delta Electronics, Inc. | Transforming device of power source and transformer thereof |
8564989, | Dec 22 2010 | Intel Corporation | Cold swap load adaptive power supply |
8686693, | Mar 02 2009 | Volterra Semiconductor Corporation | Systems and methods for scalable configurations of intelligent energy storage packs |
9397502, | Mar 02 2009 | Volterra Semiconductor Corporation | System and method for proportioned power distribution in power converter arrays |
Patent | Priority | Assignee | Title |
4268898, | Mar 20 1980 | Lorain Products Corporation | Semiconductor switching circuit with clamping and energy recovery features |
4274133, | Jun 20 1979 | California Institute of Technology | DC-to-DC Converter having reduced ripple without need for adjustments |
5379206, | Dec 02 1992 | Argus Technologies, Ltd. | Low loss snubber circuit with active recovery switch |
5621625, | Aug 25 1994 | SAMSUNG ELECTRONICS CO , LTD , A CORP OF KOREA | Surge protection circuit for a switching mode power supply |
5724236, | Mar 05 1996 | Motorola, Inc. | Power converter transformer having an auxilliary winding and electrostatic shield to suppress noise |
5835368, | Oct 31 1995 | Sony Corporation | Power-factor improvement converter |
5930124, | Dec 13 1996 | MURATA MANUFACTURING CO , LTD | Switching power supply |
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Feb 04 2016 | Intel Corporation | BEIJING XIAOMI MOBILE SOFTWARE CO , LTD | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 037733 | /0440 |
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