An image sensor device includes a qfn type leadframe having a central die attach flag and an outer bonding pad area having a plurality of bonding pads. A sensor ic is attached to the flag. The ic has a first surface with an active area and a peripheral bonding pad area that includes bonding pads. wires are wirebonded to respective ones of the ic bonding pads and corresponding ones of the leadframe bonding pads, thereby electrically connecting the ic and the leadframe. stud bumps are formed on the first surface of the ic and a transparent cover is disposed over the ic active area and resting on the stud bumps. The cover allows light to pass therethrough onto the ic active area. A mold compound is formed over the leadframe, wirebonds and a peripheral portion of the cover.
|
1. A method of making an image sensor device, comprising the steps of:
providing a qpn type loadframe having a control die attach flag and an outer bonding pad area having a plurality of bonding pads;
disposing a die attach material on the flag;
attaching a sensor integrated circuit (ic) to the flag with the die attach material, the ic having a first surface with an active area and a peripheral bonding pad area, the peripheral bonding pad area including bonding pads;
electrically connecting reaspective ones of the ic bonding pads and corresponding ones of the leadframe bonding pads with a plurality of wires via wirebonding;
forming a plurality of stud bumps on the first surface of the ic, wherein the stud bumps are formed of the same material as the wires;
placing a transparent cover over the ic active area such that the cover rests on the stud bumps, wherein light may pass through the cover and onto the ic active area; and
forming a mold compound over the leadframe, wirebonds and a peripheral portion of the cover.
9. A method of making an image sensor device, comprising the steps of:
providing a qfn type leadframe having a central die attach flag and an outer bonding pad area having a plurality of bonding pads, wherein the flag has a perimeter ring that forms a bond line having a height that is about the same as a thickness of the leadframe;
disposing a die attach material on the flag and within the perimeter ring;
attaching a sensor integrated circuit (ic) to the flag with the die attach material, the ic having a first surface with an active area and a peripheral bonding pad area, the peripheral bonding pad area including bonding pads;
placing the leadframe on a stage curing heat block having a vacuum hole at a central position under the flag;
electrically connecting respective ones of the ic bonding pads and corresponding ones of the leadframe bonding pads with a plurality of wires via wirebonding;
dispensing a clear compound over the ic active area;
placing a transparent cover over the clear compound on the ic active area, wherein light may pass through the cover and the compound and onto the ic active area; and
forming a mold compound over the leadframe, wirebonds and a peripheral portion of the cover.
2. The method of making an image sensor device of
3. The method of making an image sensor device of
dispensing a clear compound over the ic active area prior to placing the cover on the stud bumps, wherein the compound thickness is about the same as a height of the stud bumps.
5. The method of making an image sensor device of
after attaching the ic to the flag, placing the leadframe on a stage curing heat block having a vacuum hole at a central position under the flag.
6. The method of making an image sensor device of
initiating a vacuum force that causes the die attach material to collapse into the hole; and
curing the die attach material.
7. The method of making an image sensor device of
8. The method of making an image sensor device of
after forming the mold compound over the leadframe, wirebonds and the peripheral portion of the cover, collapsing the bump to cause a force for maintaining the cover in contact with a mold cavity.
10. The method of making an image sensor device of
initiating a vacuum force that causes the die attach material to collapse into the hole; and
curing the die attach material.
11. The method of making an image sensor device of
12. The method of making an image sensor device of
after forming the mold compound over the leadframe, wirebonds and the peripheral portion of the cover, collapsing the bump to cause a force for maintaining the cover in contact with a mold cavity.
|
This application is a divisional of and claims priority to prior Application Ser. No. 10/282,537 filed Oct. 29, 2002, now U.S. Pat. No. 6,667,543 entitled “Optical Sensor Package” and naming as inventors Wai Wong Chow, Man Hon Cheng and Wai Keung Ho which is incorporated herein by reference.
The present invention relates to image and optical sensors and, more particularly, to a method of packaging an optical sensor and the resulting packaged sensor product.
There has been a constant demand for smaller and smarter industrial and consumer electronic products such as digital cameras, camcorders, audio players, etc. Such miniaturization and increased functionality has benefited from advances in the design and manufacturing of semiconductor circuits and wafers. There has also been a marked increase in the use of optical and image sensors in electronic products. Such sensor devices are packaged in a variety of ways. For example, an optical sensor in a ceramic leadless chip carrier has good optical quality, but large package form factor. A wafer level package, whole having a lesser form factor and good optical quality, is very expensive. Image sensors are also available as a molded quad flat pack (QFP). While the QFP has a moderate cost, it has low optical quality and a large package form factor.
It would be advantageous to provide a packaged image sensor with a low package form factor, moderate cost, and high optical quality.
The foregoing summary, as well as the following detailed description of the present invention, will be better understood when read in conjunction with the appended drawings. For the purpose of illustrating the invention, there is shown in the drawings embodiments that are presently preferred. It should be understood, however, that the invention is not limited to the precise arrangement and instrumentalities shown. In the drawings:
The detailed description set forth below in connection with the appended drawings is intended as a description of the presently preferred embodiments of the invention, and is not intended to represent the only forms in which the present invention may be practiced. It is to be understood that the same or equivalent functions may be accomplished by different embodiments that are intended to be encompassed within the spirit and scope of the invention.
Certain features in the drawings have been enlarged for ease of illustration and the drawings and the elements thereof are not necessarily in proper proportion. However, those of ordinary skill in the art will readily understand such details. In the drawings, like numerals are used to indicate like elements throughout.
The present invention provides an image sensor device with low cost and high optical quality in a near chip scale package based on standard high density array format, quad flat no-lead (QFN) assembly infrastructure. A tight tolerance in assembly height and unique mechanical structure design provides close dimension matching with mold cavity height. The packaged sensor device uses stud bumps as precise height standoff objects to assemble a window over an active area of a sensor. A vacuum hole located beneath the device during assembly is used to form a bump that provides the dual functions of height compensation in molding and avoiding clamping damage due to height mismatch. The window is maintained in contact with the mold cavity surface, which minimizes resin bleeding and facilitates post-mold cleaning.
More particularly, in one embodiment, the present invention provides an image sensor device including a QFN type leadframe having a central die attach flag and an outer bonding pad area having a plurality of bonding pads. A sensor integrated circuit (IC) is attached to the flag. The IC has a first surface with an active area and a peripheral bonding pad area including bonding pads. A plurality of wires are wirebonded to respective ones of the IC bonding pads and corresponding ones of the leadframe bonding pads, thereby electrically connecting the IC and the leadframe. A plurality of stud bumps are disposed on the first surface of the IC and a transparent cover is disposed over the IC active area and rests on the stud bumps. The cover allows light to pass through onto the IC active area. A mold compound is formed over the leadframe, wirebonds and a peripheral portion of the cover.
In another embodiment, the present invention provides an image sensor device including a QFN type leadframe having a central die attach flag and an outer bonding pad area having a plurality of bonding pads. The flag has a perimeter ring that forms a bond line having a height that is about the same as a thickness of the leadframe. A sensor integrated circuit (IC) is attached to the flag with a low modulus adhesive disposed within the flag perimeter ring. The IC has a first surface with an active area and a peripheral bonding pad area. The peripheral bonding pad area includes bonding pads. A plurality of gold wires are wirebonded to respective ones of the IC bonding pads and corresponding ones of the leadframe bonding pads, thereby electrically connecting the IC and the leadframe. A plurality of gold stud bumps are formed on the active area of the first surface of the IC. A clear compound is disposed over the IC active area. A transparent glass cover is disposed over the clear compound on the IC active area and rests on the stud bumps. Light may pass through the cover and the clear compound onto the IC active area. A mold compound is formed over the leadframe, wirebonds and a peripheral portion of the cover. The device has a height of less than about 40 mils.
In yet another embodiment, the present invention is an image sensor device including a QFN type leadframe having a central die attach flag and an outer bonding pad area having a plurality of bonding pads. A sensor IC is attached to the flag. The IC has a first surface with an active area, a non-active area and a peripheral bonding pad area including bonding pads. A plurality of wires are wirebonded to respective ones of the IC bonding pads and corresponding ones of the leadframe bonding pads, thereby electrically connecting the IC and the leadframe. A clear compound is disposed over the IC active area and a transparent glass cover is disposed over the clear compound on the IC active area. Light is able to pass through the cover and the clear compound onto the IC active area. A mold compound is formed over the leadframe, wirebonds, IC wirebonds, IC non-active area and a peripheral portion of the cover.
In yet another embodiment, the present invention provides a method of making an image sensor device, including the steps of:
providing a QFN type leadframe having a central die attach flag and an outer bonding pad area having a plurality of bonding pads, wherein the flag has a perimeter ring that forms a bond line having a height that is about the same as a thickness of the leadframe;
disposing a die attach material on the flag and within the perimeter ring;
attaching a sensor integrated circuit (IC) to the flag with the die attach material, the IC having a first surface with an active area and a peripheral bonding pad area, the peripheral bonding pad area including bonding pads;
electrically connecting respective ones of the IC bonding pads and corresponding ones of the leadframe bonding pads with a plurality of wires via wirebonding;
forming a plurality of stud bumps on the first surface of the IC;
placing a transparent cover over the IC active area such that the cover rests on the stud bumps, wherein light may pass through the cover and onto the IC active area; and
forming a mold compound over the leadframe, wirebonds and a peripheral portion of the cover.
In a further embodiment, the present invention is a method of making an image sensor device, including the steps of:
providing a QFN type leadframe having a central die attach flag and an outer bonding pad area having a plurality of bonding pads, wherein the flag has a perimeter ring that forms a bond line having a height that is about the same as a thickness of the leadframe;
disposing a die attach material on the flag and within the perimeter ring;
attaching a sensor integrated circuit (IC) to the flag with the die attach material, the IC having a first surface with an active area and a peripheral bonding pad area, the peripheral bonding pad area including bonding pads;
placing the leadframe on a stage curing heat block having a vacuum hole at a central position under the flag;
electrically connecting respective ones of the IC bonding pads and corresponding ones of the leadframe bonding pads with a plurality of wires via wirebonding;
dispensing a clear compound over the IC active area;
placing a transparent cover over the clear compound on the IC active area, wherein light may pass through the cover and the compound and onto the IC active area; and
forming a mold compound over the leadframe, wirebonds and a peripheral portion of the cover.
Referring to
A sensor integrated circuit (IC) 22 is attached to the flag 14 of the leadframe 12, preferably with a low stress, low modulus die attach adhesive 24 disposed within the flag perimeter ring 20. The IC 22 has a first surface with an active area 26 (
The term ‘wirebonding’ is generally accepted to mean the interconnection, via wire, of chips and substrates. The most frequently used methods of joining the wires to the pads are via either thermosonic or ultrasonic bonding. Ultrasonic wirebonding uses a combination of vibration and force to rub the interface between the wire and the bond pad, causing a localized temperature rise that promotes the diffusion of molecules across the boundary. Thermosonic bonding, in addition to vibration, uses heat, which further encourages the migration of materials.
A plurality of stud bumps 34 are formed on the first surface of the IC 22. In the preferred embodiment, the stud bumps 34 are formed of the same material as the wires 32, e.g., gold. The stud bumps 34 have a height of about 3 mils and are positioned proximate to the IC active area 26. The stud bumps 34 are formed on the IC 22 using the capillary of the wirebonder that performs the wirebonding. The stud bumps 34 are formed or disposed on the IC 22 in the same manner that the wirebonding is performed. That is, the process for forming the stud bumps 34 is very similar to the normal thermo-sonic gold ball bonding process, except that there are no loop formation and second bond formation steps. More particularly, a free air ball is formed by electric flame off and captured in the capillary and then a first bond is formed on the surface of the IC 22. After forming the first bond, the tail length is released and tail separation (pull-off from the first bond) is performed. This process is repeated for each stud bump.
A transparent cover 36 (
To complete the device 10, a mold compound 42 is formed over the leadframe 12, wirebonds and a peripheral portion of the cover 36. The stud bumps 34 act as a precise height stand-off and maintain the window 40 in a position between the IC 22 and the mold compound 42. The image sensor device 10 has an overall height of about 40 mils.
Referring now to
It should also be noted that the sensor device 44 does not include stud bumps, although it could include stud bumps if desired. It should be understood by those of skill in the art that the first embodiment (device 10) could also be formed without the stud bumps 34.
Referring now to
After the IC 22 is attached to the flag 14 of the leadframe 12, the assembly is transported to a stage curing heat block 50 that has a vacuum hole 52. The assembly is located on the heat block 50 such that the flag 14 is over the hole 52, as shown in
Referring now to
Referring now to
Finally, as shown in
The description of the preferred embodiments of the present invention have been presented for purposes of illustration and description, but are not intended to be exhaustive or to limit the invention to the forms disclosed. It will be appreciated by those skilled in the art that changes could be made to the embodiments described above without departing from the broad inventive concept thereof. It is understood, therefore, that this invention is not limited to the particular embodiments disclosed, but covers modifications within the spirit and scope of the present invention as defined by the appended claims.
Chow, Wai Wong, Ho, Wai Keung, Cheng, Man Hon
Patent | Priority | Assignee | Title |
10185866, | Sep 18 2015 | BEIJING JIIOV TECHNOLOGY CO , LTD | Optical fingerprint sensor package |
10989571, | Apr 28 2017 | Sensirion AG | Sensor package |
7820485, | Sep 29 2008 | SHENZHEN XINGUODU TECHNOLOGY CO , LTD | Method of forming a package with exposed component surfaces |
8415203, | Sep 29 2008 | SHENZHEN XINGUODU TECHNOLOGY CO , LTD | Method of forming a semiconductor package including two devices |
8492720, | Jun 08 2010 | AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED | Small low-profile optical proximity sensor |
8742350, | Jun 08 2010 | AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED | Proximity sensor |
Patent | Priority | Assignee | Title |
4957882, | Nov 25 1988 | Mitsubishi Denki Kabushiki Kaisha | Method for manufacturing semiconductor device |
5264393, | Nov 25 1988 | FUJIFILM Corporation | Solid state image pickup device and method of manufacturing the same |
6121675, | Sep 22 1997 | FUJI ELECTRIC CO , LTD | Semiconductor optical sensing device package |
6266197, | Dec 08 1999 | AMKOR TECHNOLOGY SINGAPORE HOLDING PTE LTD | Molded window array for image sensor packages |
6342406, | Nov 15 2000 | AMKOR TECHNOLOGY SINGAPORE HOLDING PTE LTD | Flip chip on glass image sensor package fabrication method |
6384472, | Mar 24 2000 | Siliconware Precision Industries Co., LTD | Leadless image sensor package structure and method for making the same |
6492699, | May 22 2000 | AMKOR TECHNOLOGY SINGAPORE HOLDING PTE LTD | Image sensor package having sealed cavity over active area |
6661083, | Feb 27 2001 | STATS CHIPPAC PTE LTE | Plastic semiconductor package |
6759642, | Jan 21 2000 | Sony Corporation | Image pick-up device, camera module and camera system |
JP59040566, | |||
JP61207062, | |||
JP62069674, | |||
WO115237, |
Executed on | Assignor | Assignee | Conveyance | Frame | Reel | Doc |
Sep 26 2002 | CHENG, MAN HON | Motorola, Inc | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 024576 | /0476 | |
Sep 26 2002 | HO, WAI KEUNG | Motorola, Inc | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 024576 | /0476 | |
Sep 26 2002 | CHOW, WAI WONG | Motorola, Inc | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 024576 | /0476 | |
Oct 14 2003 | Freescale Semiconductor, Inc. | (assignment on the face of the patent) | / | |||
Apr 04 2004 | Motorola, Inc | Freescale Semiconductor, Inc | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 015360 | /0718 | |
Dec 01 2006 | FREESCALE HOLDINGS BERMUDA III, LTD | CITIBANK, N A AS COLLATERAL AGENT | SECURITY AGREEMENT | 018855 | /0129 | |
Dec 01 2006 | FREESCALE ACQUISITION HOLDINGS CORP | CITIBANK, N A AS COLLATERAL AGENT | SECURITY AGREEMENT | 018855 | /0129 | |
Dec 01 2006 | FREESCALE ACQUISITION CORPORATION | CITIBANK, N A AS COLLATERAL AGENT | SECURITY AGREEMENT | 018855 | /0129 | |
Dec 01 2006 | Freescale Semiconductor, Inc | CITIBANK, N A AS COLLATERAL AGENT | SECURITY AGREEMENT | 018855 | /0129 | |
Apr 13 2010 | Freescale Semiconductor, Inc | CITIBANK, N A , AS COLLATERAL AGENT | SECURITY AGREEMENT | 024397 | /0001 | |
Jun 03 2010 | CITIBANK, N A AS COLLATERAL AGENT | SIGMATEL, LLC | RELEASE | 024953 | /0190 | |
Jun 03 2010 | CITIBANK, N A AS COLLATERAL AGENT | Freescale Semiconductor, Inc | RELEASE | 024953 | /0190 | |
Jun 03 2010 | CITIBANK, N A AS NOTES COLLATERAL AGENT | SIGMATEL, LLC, | RELEASE | 024953 | /0175 | |
Jun 03 2010 | CITIBANK, N A AS NOTES COLLATERAL AGENT | Freescale Semiconductor, Inc | RELEASE | 024953 | /0175 | |
Jun 09 2010 | Freescale Semiconductor, Inc | TANG SUNG CAPITAL, LLC | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 024662 | /0192 | |
Jul 18 2011 | TANG SUNG CAPITAL, LLC | Intellectual Ventures II LLC | MERGER SEE DOCUMENT FOR DETAILS | 026637 | /0405 | |
Dec 07 2015 | CITIBANK, N A , AS COLLATERAL AGENT | Freescale Semiconductor, Inc | PATENT RELEASE | 037354 | /0225 |
Date | Maintenance Fee Events |
Mar 20 2009 | M1551: Payment of Maintenance Fee, 4th Year, Large Entity. |
Mar 18 2013 | M1552: Payment of Maintenance Fee, 8th Year, Large Entity. |
Mar 27 2017 | M1553: Payment of Maintenance Fee, 12th Year, Large Entity. |
Date | Maintenance Schedule |
Oct 25 2008 | 4 years fee payment window open |
Apr 25 2009 | 6 months grace period start (w surcharge) |
Oct 25 2009 | patent expiry (for year 4) |
Oct 25 2011 | 2 years to revive unintentionally abandoned end. (for year 4) |
Oct 25 2012 | 8 years fee payment window open |
Apr 25 2013 | 6 months grace period start (w surcharge) |
Oct 25 2013 | patent expiry (for year 8) |
Oct 25 2015 | 2 years to revive unintentionally abandoned end. (for year 8) |
Oct 25 2016 | 12 years fee payment window open |
Apr 25 2017 | 6 months grace period start (w surcharge) |
Oct 25 2017 | patent expiry (for year 12) |
Oct 25 2019 | 2 years to revive unintentionally abandoned end. (for year 12) |