A chip rate invariant detector (FIG. 2) is used in a wireless spread spectrum high capacity communications system which can accommodate two or more different chip rates. At a higher chip rate the data blocks are segmented into uniform suitable sizes for the detector which has an increased data block length to prevent loss of information to smearing due to effective overlap of segmented data blocks. The resultant data blocks are cut down to standard size by discarding samples and applied to a matched filter for further standard information processing.
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15. A detection system for use in a communications system using a common detector to process signals comprising at least two different chip rates, said detector comprising:
a pre-processing unit comprising an input to accept digital data bursts of non-uniform size and an output to provide standard data blocks derived from the non-uniform sized digital data bursts and from padding data, wherein the standard data blocks comprise blocks of a uniform size and overlapping data;
the common detector comprising an input coupled to the pre-processing unit output and an output to provide a detection signal derived from the standard data blocks, wherein the common detector is invariant to the at least two different chip rates; and
a post-processing unit comprising an input coupled to the common detector output to accept the detection signal and an output to provide data blocks of a reduced data block size derived from the standard data blocks.
8. A method for detection, in a spread spectrum communications system having at least two different chip rates, said method comprising:
receiving and converting a radio analog signal to digital data bursts;
segmenting said data bursts into standard data block lengths, for providing a pair of data payloads each with two data block segments where segments within respective data payloads overlap, for increasing a data block size of a first of said two data block segments and for padding a second of said two data block segments to match;
detection processing said two data block segments and accommodating an increased length of said first of said two data block segments to produce a detection signal;
post-processing said detection signal to reduce a data block length of said first of two data block segments to a standard data block length to produce post processed signals;
applying matched filtering responsive to said post processed signals for decoding said reduced length data blocks whereby the detection is invariant to changes in said chip rate so that said at least two different chip rates are seamlessly detected.
1. A detector for use in a spread spectrum communications system having at least two different chip rates, said detector comprising:
means for receiving and converting a radio analog signal to digital data bursts;
means for segmenting said digital data bursts into standard data block lengths, for providing a pair of data payloads each with two data block segments where segments within respective data payloads overlap, for increasing a data block size of a first of said two data block segments and for padding a second of said two data block segments to match;
detector means for processing said two data block segments and for accommodating an increased length of said first of said two data block segments to produce a detection signal;
means for post processing said detection signal to reduce a data block length of said first of two data block segments to a standard data block length to produce post processed signals;
matched filter means responsive to said post processed signals for decoding said reduced length data blocks whereby said detector means is invariant to changes in said chip rate and said at least two different chip rates are seamlessly detected.
2. The detector as claimed in
3. User equipment for use in a UMTS system, the user equipment including a detector as claimed in
5. A spread spectrum high capacity digital wireless communications system incorporating a detector as claimed in
9. The method as claimed in
10. The method as claimed in
12. The method as claimed in
14. The method as claimed in
16. The detection system of
a receiver comprising an input to accept an analog signal and an output to provide receiver output signals; and
a converter comprising an input coupled to the receiver output and an output to provide the digital data bursts derived from the receiver output signals;
wherein the pre-processing unit input couples to the converter output.
17. The detection system of
a channel estimator comprising an input coupled to an output of the pre-processing unit to accept midamble data and an output coupled to the common detector to provide an estimate of a channel;
wherein the pre-processing unit extracts the midamble.
18. The detection system of
19. The detector as claimed in
20. The detector as claimed in
21. The detector as claimed in
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The present invention is directed to a chip rate invariant detector, especially in the context of a spread spectrum high capacity digital wireless communications system having at least two different radio frequency chip rates.
There is disclosed in co-pending U.S. Pat. No. 6,865,169 titled “CELLULAR WIRELESS INTERNET ACCESS SYSTEM USING SPREAD SPECTRUM AND INTERNET PROTOCOL”, application Ser. No. 09/432,824, filed Nov. 2, 1999, assigned to the present Applicant, and published in equivalent form as European patent publication EP1098539, a cellular wireless Internet access system which is specifically designed to meet the special and particular requirements of a selected frequency band which has a large amount of available spectrum. As part of the U.S. government requirements for operation in such a system, it must be capable of operating in more than one band or frequency range. For high speed transfer of digital data, of course, the received radio transmission must be digitized. In the above co-pending application, the user has a radio receiving antenna attached to user equipment (UE) which includes conversion means for receiving the wireless radio signal and ultimately transmitting the digital data to the user's personal computer (PC). In addition, the overall wireless system includes a base radio receiving station (‘Node B’) which again digitizes the radio signal to convey it to a radio network controller (RNC).
In a spread spectrum system as described above, information signal bits are transmitted in a sequence of chips at a particular chip rate dependent upon the characteristics of the particular frequency band in which the system is operating. Thus, the design of the system must accommodate varying chip rates. Moreover, as in the system described above, hundreds of thousands or millions of replications of at least the user equipment (UE) is required. Thus, the design of a receiver, which includes a detector, must be carefully chosen. In other words, there should be low cost and at the same time effective operation.
It is therefore an object of the present invention to provide a chip rate invariant detector.
In accordance with the above object, there is provided a spread spectrum high capacity digital wireless communications system having at least two different radio frequency chip rates and a matched filter decoder designed for a standard data block, the system comprising means for receiving and converting a radio analog signal to digital data bursts and means for segmenting the data bursts into standard data block lengths. For the higher chip rate an effective pair of data paths is provided, each with two data block segments, and where segments from respective data paths overlap further including means for increasing the data block size of one of the segments and padding the other overlapped segment to match. Detector means are provided for processing such segments and for accommodating the increased length of the segment data blocks. Means are provided for post processing the signal from the detector means for deleting or discarding sufficient samples of the increased, data block length segments to reduce the data block size to a standard.
Matched filter means responsive to the sample processed signals for decoding the standard data blocks are provided whereby the detector means is invariant to changes in the chip rate and multiple chip rates are seamlessly detected.
Generally, the air-interface protocol is administered from base transceiver sites that are geographically spaced apart—one base site supporting a cell (or, for example, sectors of a cell).
A plurality of subscriber units (0.11–0.13) (user equipment or ‘UE’ in UMTS nomenclature) communicate over the selected air-interface 0.21–0.23 with a plurality of base transceiver stations (‘Node B’ in UMTS nomenclature) 0.31–0.36. A limited number of UEs 0.12–0.13 and Node Bs 0.31–0.36 are shown for clarity purposes only. The Node Bs 0.31–0.36 may be connected to a conventional public-switched telephone network (PSTN) 0.71 through a network core comprising radio network controllers (RNCs) 0.41–0.42, serving GPRS support nodes (SGSNs) 0.51–0.52 and a gateway GPRS support node (GGSN) 0.61. The SGSNs 0.51–0.52 communicate with respective visitor location registers (VLRs) 0.81–0.82 and a central home location register (HLR) 0.83.
Each Node B 0.31–0.36 is principally designed to serve its primary cell or sector thereof, with each Node B 0.31–0.36 containing one or more transceiver units and communicating with the rest of the cellular system infrastructure. Each RNC 0.41–0.42 may control one or more Node Bs 0.31–0.36.
The outputs of data processing unit 14 on line 19 to detector 18 are data blocks of a uniform size. In any case, it would be of a fixed data block length and is indicated in the context of the present invention as (NQ+2Wf−2) (however, normally in a prior art standard system, this data block would contain (NQ+Wf−1) samples). As discussed above, for simplicity in detector design, it is imperative that the detector response be invariant to multiple chip rates (for example as in the context of the present invention such multiple rates might be 3.84 megachips per second and 7.68 megachips per second; alternatively one of the chip rates might be 1.28 megachips per second, as supported in current proposals for UTRA TDD Mode). The output samples of detector 18 drive a post or sample processing unit 21 where the signal segments are further treated so that matched filter 23 is supplied data blocks of a standard length. The matched filter has filter coefficients defined by the code sequence of interest in the spread spectrum communication system. The output of the matched filter has an information data stream which can then be utilized by either a personal computer or a radio network controller in the wireless Internet system described in the above co-pending application.
As a practical example, in a wireless communication system operating at a chip rate of 3.84 Mcps, the following typical values would be A=1, N=69, Q=16, Lm=256, GP =96.
But first referring to the standard technique of handling a data burst 34, again the data symbols and midamble are illustrated as in
In the diagram of
NQ+K; K=1, . . . Wf−1
and similarly, data block #2 is interfered by samples
NQ+K−(Wf−1)
For data blocks #2 and #4 the first samples of those blocks are interfered by samples from data blocks #1 and #3 respectively. Since the detector portion of the receiver has incomplete information, and due to smearing, it means that the signal-to-noise ratio for these samples will suffer, and as a consequence the system performance can degrade.
In order to correct the above deficiency or degradation caused by the segmentation and overlap, and still referring to
For data block #1, the same size of NQ+Wf−1 samples is maintained. For data block #2, however, the size is increased to NQ+2Wf−2. Obviously this can be generalized for any chip rate using the notation defined above. Note that in
For the purpose of illustration the following example is presented:
Let Wf=5, Q=4, N=6, and consider the following received vector ed=(e1,e2, . . . e52), where 2NQ+Wf−1=52. Here we only consider the first data block of the burst. Data block #1 is given by (e1,e2,e3,e4,e5,e6, . . . e28) and data block #2 is given by (e21,e22,e23,e24,e25,e26, . . . e52). The output of the detector for data block 1 is given by S1=(S1,S2, . . . S24) and for data block #2 S2=(S1,S2, . . . S28). Since Q=4, the output of the matched filter produces 6 data symbols for data block #1, so we use S1=(S1,S2, . . . S24). For data block #2, the data post processing removes the first Wf−1 chips, as these are samples from the previous spreading code. The resulting vector applied to the post or sample processing unit 21 is given by S2=(S1,S2, . . . S28).
Using the above example, we can generalize the input and output vectors of the detector for A=2. Let ed=(e1,e2, . . . e2NQ+W
#1=(e1, . . . eNQ+W
#2=(eNQ−W
#3=(e2NQ+2L
#4=(e3NQ+2L
After data post processing, the input vectors to the matched filter are given by
S1=(s1, . . . sNQ)
S2=(sW
S3=(s1, . . . sNQ)
S4=(sW
For any A>1, we can generalize the input data blocks and output data blocks of the detector. After segmentation we can write
#1=(e1, . . . eNQ+W
which yields the set of output vectors of the detector input to matched filter
S1=(s1, . . . sNQ)
Finally, we require the block length applied to the detector to be fixed, in order to keep the implementation of the detector consistent throughout. Therefore, we insert Wf−1 padding zeros at the beginning of data blocks #1 and #A+1, which gives
#1=(0,0, . . . e1, . . . eNQ+W
#A+1=(0,0, . . . ,0,eANQ+AL
This means that all data blocks applied to the detector have a fixed length of NQ+2Wf−2, requiring the detector to be suitably modified to accommodate the increased block length.
The output vector after data post processing is given by
S1=(sW
The operation of the present invention is illustrated in a flow chart at
Thus, a chip rate invariant detector has been provided which is seamless to changes in chip rate.
Jones, Alan Edward, Geers, Steven Nicholas
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