An ALIS system PDP apparatus in which a reduction in the variation in luminance due to ringing has been reduced is disclosed. In an ALIS system PDP apparatus, X (first) electrodes and Y (second) electrodes are arranged in such a way that the X electrodes and the Y electrodes, whose path length, which is the length of each of the signal paths of a sustain discharge pulse from the X and Y electrode to sustain drive circuits, is longer or shorter than that of the peripheral X and Y electrodes, do not exist densely. Specifically, the order of arrangement of the odd and even X sustain drive circuits is reversed to that of odd and even Y sustain drive circuits.
|
1. A plasma display apparatus comprising:
a display panel having a plurality of first and second electrodes arranged alternately and extending in a first direction, and a plurality of third electrodes extending in a second direction perpendicular to the first direction;
a first odd electrode drive circuit for outputting a sustain discharge pulse to be commonly applied to odd-numbered electrodes of the plurality of the first electrodes;
a first even electrode drive circuit for outputting a sustain discharge pulse to be commonly applied to even-numbered electrodes of the plurality of the first electrodes;
a second odd electrode drive circuit for outputting a sustain discharge voltage pulse to be commonly applied to odd-numbered electrodes of the plurality of the second electrodes; and
a second even electrode drive circuit for outputting a sustain discharge pulse to be commonly applied to even-numbered electrodes of the plurality of the second electrodes,
wherein a sustain discharge is caused to occur between the plurality of the first and second electrodes for a light emission display, and
wherein the first odd electrode drive circuit and the first even electrode drive circuit, and the second odd electrode drive circuit and the second even electrode drive circuit, are arranged side by side in the second direction on the display panel, and the order of arrangement in the second direction of the first odd electrode drive circuit and the first even electrode drive circuit is opposite to that of arrangement in the second direction of the second odd electrode drive circuit and the second even electrode drive circuit.
2. A plasma display apparatus, as set forth in
3. A plasma display apparatus, as set forth in
4. A plasma display apparatus, as set forth in
wherein the two connector are arranged in parallel to each other in the second direction, and
wherein one of the two connectors connects the first electrodes and the second electrodes provided on one of substantial half sides in the second direction of the display panel, and the other of the two connectors connects the first electrodes and the second electrodes provided on the other substantial half side in the second direction of the display panel.
|
The present invention relates to a plasma display apparatus (PDP apparatus) having an AC (alternating current) type plasma display panel (PDP). More particularly, the present invention relates to an ALIS system PDP apparatus which carries out an interlaced display in which every gap between neighboring sustain electrodes is utilized as a display line and odd-numbered display lines and even-numbered display lines are displayed alternately for each display frame.
The PDP apparatus using an AC type PDP is put to practical use and widely used as a thin large-screen display apparatus. Japanese Unexamined Patent Publication (Kokai) No. 9-160525 describes the ALIS system PDP apparatus in which the number of display lines is doubled without changing the number of electrodes. Japanese Unexamined Patent Publication (Kokai) No. 11-327503 has disclosed a configuration for an ALIS system PDP apparatus, which realizes a sustain driver for applying a sustain discharge voltage pulse to first electrodes (X electrodes) and second electrodes (Y electrodes) (referred to as sustain electrodes, altogether) by the use of a low maximum rating element. The present invention can be applied to the ALIS system PDP apparatus disclosed in Japanese Unexamined Patent Publication (Kokai) No. 9-160525 and Japanese Unexamined Patent Publication (Kokai) No. 11-327503.
Each address electrode A is driven by an address driver 11 and a voltage pulse is applied independently of the address driver 11. Each X electrode is driven by a first (X) electrode drive circuit 12. The first electrode drive circuit 12 has an odd X sustain driver (X-odd) 13 and an even X sustain driver (X-even) 14. The odd-numbered X electrode is driven by the odd X sustain driver 13 and a sustain discharge pulse is applied at the time of sustain discharge. The even-numbered X electrode is driven by the even X sustain driver 14 and a sustain discharge pulse is applied at the time of sustain discharge. The phase of the sustain discharge pulse to be applied to the odd-numbered X electrode is opposite to that of the sustain discharge pulse to be applied to the even-numbered X electrode. Each Y electrode is driven by a second (Y) electrode drive circuit 15. The second electrode drive circuit 15 has a scan driver 16, an odd Y sustain driver (Y-odd) 17 and an even Y sustain driver (Y-even) 18. Each Y electrode is driven by the scan driver 16 and a scan pulse is applied sequentially at the time of addressing. At the time of sustain discharge, the odd Y sustain driver 17 applies a sustain discharge pulse to the odd-numbered Y electrode via the scan driver 16 and the even Y sustain driver 18 applies a sustain discharge pulse to the even-numbered Y electrode via the scan driver 16. The phase of the sustain discharge pulse to be applied to the odd-numbered Y electrode is opposite to that of the sustain discharge pulse to be applied to the even-numbered X electrode, and the phase of the sustain discharge pulse to be applied to the odd-numbered x electrode is the same as that of the sustain discharge pulse to be applied to the even-numbered Y electrode.
The sustain discharge pulse is a pulse of about 200V, and the phase of the sustain discharge pulse to be applied to the odd-numbered X electrode is opposite to that of the sustain discharge pulse to be applied to the even-numbered X electrode, and the phase of the sustain discharge pulse to be applied to the odd-numbered Y electrode is opposite to that of the sustain discharge pulse to be applied to the even-numbered Y electrode, therefore, as a result, a very large voltage is applied to each part of the drive element and it is necessary to use a high maximum rating element, if the odd X sustain driver 13 and the even X sustain driver 14 are integrated into one chip, or the scan driver 16, the odd Y sustain driver 17 and the even Y sustain driver 18 are integrated into one chip. Because of this, there arises a problem: the cost of the drive circuit is pushed up and a sufficient operation speed is difficult to obtain. To solve this problem, Japanese Unexamined Patent Publication (Kokai) No. 11-327503 has proposed that the scan driver 16 is divided into an odd scan driver for driving the odd-numbered Y electrode and an even scan driver for driving the even-numbered Y electrode, which are formed on separate chips, respectively, the odd Y sustain driver 17 and the even Y sustain driver 18 are formed on separate chips, respectively, and the odd X sustain driver 13 and the even X sustain driver 14 are formed on separate chips, respectively. In this manner, it is possible to reduce the voltage to be applied to the elements in a chip, and low maximum rating elements can be used.
As the ALIS system PDP apparatus shown in
A circuit substrate 31 is provided with a plurality of scan driver elements 32 making up the scan driver 16, a sustain driver (Y-odd) 33 for driving the odd-numbered Y electrodes and a sustain driver (Y-even) 34 for driving the even-numbered Y electrodes. The plurality of scan driver elements 32 are divided into odd driver elements for driving the odd-numbered Y electrodes and even driver elements for driving the even-numbered Y electrodes, and the odd driver elements and the even driver elements are arranged alternately. A signal line 35 of the Y-odd 33 is connected to the odd driver elements and a signal line 36 of the Y-even 34 is connected to the even driver elements. The output lines of the odd driver elements and the even driver elements are connected to the corresponding odd-numbered Y electrodes and even-numbered Y electrodes via the connectors 43 and 44, respectively, in the order of the arrangement. Here, the four odd driver elements and the four even driver elements are provided, respectively, and the output lines of the two odd driver elements and the two even driver elements arranged on the upper half side in the figure are connected to the Y electrodes on the upper half side of the panel 1 via the connector 43. Similarly, the two odd driver elements and the two even driver elements arranged on the lower half side in the figure are connected to the Y electrodes on the lower half side of the panel 1 via the connector 44. The X-odd 22, the X-even 23, the Y-odd 33 and the Y-even 34 are realized by the use of elements having the same specifications.
As the drive circuit is provided on a circuit substrate different from the glass of the panel, a connector is required for connecting the output line of the drive circuit and the electrode terminal of the panel. As there are about 500 X electrodes and 500 Y electrodes, respectively, it is difficult to connect the X electrodes or Y electrodes with one connector, therefore, the X electrodes or the Y electrodes are divided into the upper half group and the lower half group and connected via two connectors.
The PDP apparatus according to the present invention is an ALIS system PDP apparatus, in which, the first electrodes and the second electrodes, whose path lengths, that is, each of the length of the signal path of the sustain discharge pulse from the first and second electrodes to the first odd electrode drive (odd X sustain) circuit, that to the first even electrode drive (even X sustain) circuit, that to the second odd electrode drive (odd Y sustain) circuit, and that to the second even electrode drive (even Y sustain) circuit, is longer or shorter than the path length of the first electrodes and the second electrodes which exist peripherally, do not exist densely. For example, when four or more of the first electrodes and the second electrodes whose path length is different from that of peripheral ones do not exist successively, it can be said that such electrodes do not exist densely.
The first electrodes and the second electrodes of the panel are connected to the odd X sustain circuit, even X sustain circuit, odd sustain circuit, and even Y sustain circuit via two connectors provided at both ends of the panel in the direction in which the first electrodes and the second electrodes extend.
In a specific configuration which realizes the above-mentioned condition, when the odd X sustain circuit and the even X sustain circuit, and the odd Y sustain circuit and the even Y sustain circuit made up of separate elements, are arranged in parallel to the second direction (direction in which the address electrodes extend) perpendicular to the first direction, the order of arrangement of the odd X sustain circuit and the even X sustain circuit is reversed to the order of the arrangement of the odd Y sustain circuit and the even Y sustain circuit.
The features and advantages will be more clearly understood from the following description taken in conjunction with the accompanying drawings, wherein:
The drive circuit for sustain discharge of a conventional PDP apparatus has such a configuration as shown in
Depending on the position of the X electrode and the Y electrode, the length of the signal path and the area of the wiring pattern differ, and a longer signal path has a larger parasitic inductance than a shorter signal path. In
The variations in the intensity of light emission due to ringing are small and rather inconspicuous, but when there is a display line with a large ringing, or when there are several display lines with a small ringing situated rather densely and the state of the ringing of the peripheral display lines differs considerably, the variations become conspicuous and cannot be ignored. In the conventional PDP apparatus, even if there ringing exists, the state of ringing changes gradually across the entire screen and, therefore, the variations in luminance due to the ringing hardly bring about any problem. However, in the conventional ALIS system PDP apparatus shown in
It is assumed that the panel 1 has 501 X electrodes and 500 Y electrodes. Here, the two hundred fiftieth X electrode 51 and Y electrode 52, and the two hundred fifty-first X electrode 53 and Y electrode 54 shown by the arrow are considered. The two hundred fiftieth X electrode 51 is connected to the X-even 23 via the connector 41 as shown by a path L. AS the X-even 23 is arranged far from the connector 41, the signal path (path length) becomes relatively long. The two hundred fiftieth Y electrode 52 also is connected to the Y-even 34 via the connector 43, therefore, the signal path becomes similarly long. As the two hundred fifty-first X electrode 53 is connected to the X-odd 22 via the connector 42, the signal path becomes long, and the two hundred fifty-first Y electrode 54 also is connected to the Y-odd 33 via the connector 44, therefore, the signal path becomes long. As described above, the signal paths of the four X electrodes and Y electrodes at the central part become long.
In contrast to this, a two hundred forty-ninth X electrode adjacent to the four X electrodes and Y electrodes is connected to the X-odd 22, which is situated nearer, via the connector 41 as shown by a path S, therefore, the signal path becomes relatively short. Similarly, the signal paths of a two hundred forty-ninth Y electrode and two hundred fifty-second X electrode and Y electrode become also short.
In
As described above, the signal lengths of the four X electrodes and Y electrodes at the central part are long and the luminance of the three display lines made up of these four electrodes becomes high, but the signal lengths of the X electrodes and Y electrodes adjacent to the four at the central part are short and the luminance of the display lines made up of these electrodes is low, therefore, lines with high luminance appear at the central part of the screen when, for example, the entire screen is lit at the same level, resulting in degradation of the display quality.
At other parts, a set of an X electrode and a Y electrode whose path lengths are long and a set of an X electrode and a Y electrode whose path lengths are short are arranged regularly by turns, therefore, the variations in luminance are inconspicuous.
The case described above is a case where display lines with a long signal path and a large ringing are situated densely, but also in another case where display lines with a small ringing are situated densely and display lines with a large ringing are situated adjacent thereto, the variations in luminance are conspicuous and lines with low luminance appear, resulting in degradation of the display quality.
Japanese Unexamined Patent Publication (Kokai) No. 11-327503, described above, has disclosed a configuration in which a plurality of odd X sustain drivers 22-1, 22-2, . . . and a plurality of even X sustain drivers 23-1, 23-2, . . . are arranged alternately and a plurality of odd Y sustain drivers 33-1, 33-2, . . . and a plurality of even Y sustain drivers 34-1, 34-2, . . . are arranged alternately, as shown in
The present invention has been developed to solve the problem described above, and the object thereof is to suppress the occurrence of the variations in luminance due to ringing with a simplified configuration.
It is also assumed in the first embodiment that the panel has 501 X electrodes and 500 Y electrodes. As the case of
Moreover, the two hundred forty-ninth X electrode adjacent to the four X electrodes and Y electrodes at the central part is connected to the X-odd 13 situated far via the connector 41 as shown by a path V therefore the signal path becomes relatively long. The signal path of a two hundred fifty-second x electrode is long. Similarly, the signal path of the two hundred forty-ninth Y electrode becomes short and that of the two hundred fifty-second Y electrode becomes short.
In
In the first embodiment, as described above, it is possible to suppress the variations in luminance only by changing the order of arrangement of the sustain drivers.
It is desirable that the even X sustain driver (X-even) 14 and the odd X sustain driver (X-odd) 13 are arranged as closely as possible to each other in the vicinity of the display lines at the central part, and also that, in the similarly fashion, the odd Y sustain driver (Y-odd) 17 and the even Y sustain driver (Y-even) 18 are arranged as closely as possible to each other in the vicinity of the display lines at the central part.
As shown in
As described above, according to the present invention, by only changing the order of arrangement of the sustain drivers, it is possible to make the display lines with high or low luminance, due to ringing, inconspicuous and to reduce the variations in luminance.
Kanazawa, Yoshikazu, Yokoyama, Atsushi, Kumakura, Ken, Ohki, Hideaki, Fujisaki, Takashi
Patent | Priority | Assignee | Title |
Patent | Priority | Assignee | Title |
6172465, | Nov 20 1998 | AU Optronics Corporation | Method for driving plasma display |
6373452, | Aug 03 1995 | HITACHI CONSUMER ELECTRONICS CO , LTD | Plasma display panel, method of driving same and plasma display apparatus |
6603446, | May 19 1998 | HITACHI PLASMA PATENT LICENSING CO , LTD | Plasma display device |
6747615, | Nov 14 2000 | Samsung SDI Co., Ltd. | Method of driving plasma display panel including and-logic and line duplication methods, plasma display apparatus performing the driving method and method of wiring the plasma display panel |
6965359, | Aug 03 1995 | HITACHI PLASMA PATENT LICENSING CO , LTD | Method of driving plasma display panel by applying discharge sustaining pulses |
JP11327503, | |||
JP9160525, |
Executed on | Assignor | Assignee | Conveyance | Frame | Reel | Doc |
Feb 12 2003 | KUMAKURA, KEN | Fujitsu Hitachi Plasma Display Limited | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 015092 | /0292 | |
Feb 12 2004 | KANAZAWA, YOSHIKAZU | Fujitsu Hitachi Plasma Display Limited | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 015092 | /0292 | |
Feb 12 2004 | OHKI, HIDEAKI | Fujitsu Hitachi Plasma Display Limited | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 015092 | /0292 | |
Feb 12 2004 | FUJISAKI, TAKASHI | Fujitsu Hitachi Plasma Display Limited | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 015092 | /0292 | |
Feb 12 2004 | YOKOYAMA, ATSUSHI | Fujitsu Hitachi Plasma Display Limited | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 015092 | /0292 | |
Mar 10 2004 | Fujitsu Hitachi Plasma Display Limited | (assignment on the face of the patent) | / | |||
Mar 31 2021 | SoundHound, Inc | Silicon Valley Bank | SECURITY INTEREST SEE DOCUMENT FOR DETAILS | 055807 | /0539 |
Date | Maintenance Fee Events |
Aug 07 2008 | ASPN: Payor Number Assigned. |
Sep 13 2010 | REM: Maintenance Fee Reminder Mailed. |
Feb 06 2011 | EXP: Patent Expired for Failure to Pay Maintenance Fees. |
Date | Maintenance Schedule |
Feb 06 2010 | 4 years fee payment window open |
Aug 06 2010 | 6 months grace period start (w surcharge) |
Feb 06 2011 | patent expiry (for year 4) |
Feb 06 2013 | 2 years to revive unintentionally abandoned end. (for year 4) |
Feb 06 2014 | 8 years fee payment window open |
Aug 06 2014 | 6 months grace period start (w surcharge) |
Feb 06 2015 | patent expiry (for year 8) |
Feb 06 2017 | 2 years to revive unintentionally abandoned end. (for year 8) |
Feb 06 2018 | 12 years fee payment window open |
Aug 06 2018 | 6 months grace period start (w surcharge) |
Feb 06 2019 | patent expiry (for year 12) |
Feb 06 2021 | 2 years to revive unintentionally abandoned end. (for year 12) |