Determination of equivalent series resistance

Abstract

A determination of an equivalent series resistance (esr) effect for high frequency filtering performance of a filtered feed-through assembly is described. A low frequency signal is introduced to a filtered feed-through assembly. esr limit of the filtered feed-through is determined based on the low frequency signal.

Description

RELATED APPLICATION

This application is related to U.S. patent application Ser. No. 11/235,944 filed on Sep. 27, 2005 and entitled “DETERMINATION OF EQUIVALENT SERIES RESISTANCE”.

FIELD OF THE INVENTION

The present invention relates to measurement techniques and, more specifically, to determination of equivalent series resistance (ESR) effect on high frequency filtering performance of a filtered feed-through assembly.

BACKGROUND OF THE INVENTION

Implantable medical devices (IMDs) detect and deliver therapy to correct a variety of medical conditions in patients. Exemplary IMDs include implantable pulse generators (IPGs) or implantable cardioverter-defibrillators (ICDs) that deliver electrical stimulation to tissue of a patient. IMDs typically include, inter alia, a control module, a capacitor, and a battery. These components are housed in a container that is hermetically sealed to prevent liquid from contacting the electronic components therein. To connect with the electronic components, a feed-through assembly is coupled to the container. The feed-through assembly forms an aperture in the container, which allows an electrical lead to pass therethrough.

Electromagnetic interference (EMI) may affect the operation of an IMD. EMI is any electromagnetic disturbance, phenomenon, signal, or emission that causes or can cause an undesired response in an IMD. To address EMI, an EMI filter is incorporated into a feed-through assembly. A typical filtered feed-through assembly consists of a conductive line, a ferrule, an insulator member (e.g. glass, ceramic etc.), at least one capacitor, and a seal. The filtered feed-through assembly is configured such that the seal lines an aperture located in the ferrule. The insulator member is placed in the aperture adjacent to the seal. The conductive line is connected to the ferrule and the capacitor. A lead (e.g. wire) or a terminal pin to the sealed container is inserted through another aperture in the insulator member, which provides an electrical connection to the components within the IMD.

The filtered feed-through assembly capacitor acts as a low pass filter to prevent EMI from affecting the operation of the IMD. A low pass filter allows low frequency signals to pass but prevents high frequency signals from passing therethrough. The performance of the EMI filter is determined by insertion loss. Insertion loss results from the insertion of a device in a transmission line, expressed as the reciprocal of the ratio of the signal power delivered to that part of the line following the device to the signal power delivered to that same part before insertion. Insertion loss depends upon the number of components in the EMI filter, impedance value of each EMI filter component, the frequency at which the insertion loss is measured, equivalent series resistance (ESR), and equivalent series induction (ESL).

Insertion loss measurement at high frequencies is difficult due to increased noise detected for high frequency signals. To determine insertion loss at a high frequency, a radio frequency (RF) shield is welded to the filtered feed-through assembly. The RF shield isolates the input and output ends of the filtered feed-through assembly during the test. The welding operation and the RF shield itself increase the cost of producing an IMD. Additionally, this insertion loss measurement method cannot be used on a large-scale basis.

Alternatively, insertion loss may be measured without a RF shield welded to the filtered feed-through assembly. However, this type of insertion loss measurement is unreliable. It is therefore desirable to overcome the limitations associated with conventional testing systems.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 depicts a block diagram of an exemplary testing system;

FIG. 2 is a perspective side view of an exemplary feed-through assembly;

FIG. 3 is a cross-sectional view of an exemplary filtered feed-through assembly;

FIG. 4 is a perspective side view of an exemplary test fixture and a device under test;

FIG. 5 is a portion of an exemplary test fixture with a pin piercing an oxide layer to connect with a ferrule of a filtered feed-through assembly;

FIG. 6 is a graph illustrating insertion loss versus equivalent series resistance for a device evaluated by the testing system of FIG. 1; and

FIG. 7 is a flow diagram of a method to predict or estimate insertion loss associated with a feed-through assembly.

DETAILED DESCRIPTION

The following description of an embodiment is merely exemplary in nature and is in no way intended to limit the invention, its application, or uses. For purposes of clarity, the same reference numbers are used in the drawings to identify similar elements. As used herein, the term “module” refers to an application specific integrated circuit (ASIC), an electronic circuit, a processor (shared, dedicated, or group) and memory that execute one or more software or firmware programs, a combinational logic circuit, or other suitable components that provide the described functionality.

Generally, the present invention is directed to measurement of insertion loss related to a device (e.g., filtered feed-through assembly) over a certain frequency range. For example, the frequency range of about 450 megahertz (MHz) to about 3 gigahertz (GHz) is used to determine the effectiveness of the low pass filter (e.g., capacitor(s) in the filtered feed-through assembly) disposed in an implantable medical device (IMD). This insertion loss measurement technique may be used over any other appropriate frequency range for a particular device.

Specifically, the present invention relates to measurement of equivalent series resistance (ESR) effect on high frequency filtering performance of a filtered feed-through assembly for a device. A set of insertion loss data at a first high frequency (e.g. 450 MHz to about 3 GHz) is determined for a filtered feed -through assembly. A set of insertion loss data is generated at a second high frequency (e.g. 2450 MHz) for the filtered feed-through assembly. A set of ESR data is generated at a low frequency (e.g. 2 MHz) for the filtered feed-through assembly. The set of ESR data at the low frequency is correlated to the insertion loss generated at a first high frequency. This correlation may be graphically represented or tabulated. A prediction interval that includes upper and lower limits is superimposed on the graph. A specified insertion loss data (e.g. 30 dB) is selected for a particular device. An ESR limit for a low frequency signal is determined based upon the specified insertion loss data and the upper limit of the prediction interval. The ESR limit is compared to ESR values of manufactured filtered feed-through assemblies. Filtered feed-through assemblies are of acceptable quality when their ESR value is below the ESR limit. In contrast, filtered feed-through assemblies are rejected that exhibit an ESR value above the ESR limit.

The present invention increases the accuracy of determining the ESR effect at high frequency signals filtered via a filtered feed-through assembly. Additionally, the present invention reduces the cost of producing an implantable medical device by eliminating welding of a shield to a feed-through assembly. Furthermore, the present invention may be implemented on a mass production scale.

FIG. 1 depicts a test system 10 that determines ESR effect on high frequency filtering performance of a device under test (DUT). Test system 10 includes a control module 12, a switch matrix 14, an inductance, capacitance, resistance (LCR) meter or impedance meter 16 (i.e. measurement meter), and a test fixture 18.

Control module 12 is typically a computer that includes a parallel port (not shown) connected to bus 20a. The parallel port generally includes 32 lines and 16 input/output ports. Since two lines are associated with a single input/output port, multiple busses may be connected to the parallel port. Control module 12 connects to LCR meter 16 and switch matrix 14 via buses 20a, 20b, and 20c respectively. Control module 12 inputs a control signal over buses 20a, 20b to LCR meter 16. LCR meter 16 is configured to measure and transmit to control module 12 the inductance, capacitance, and resistance associated with a DUT that is connected to test fixture 18.

In one embodiment, the DUT is a filtered feed-through assembly 30 depicted in FIGS. 2-3. Filtered feed-through assembly 30 consists of one or more conductive lines 25a-b that include nonpolarized capacitors 26, a ferrule 32, and an insulator member (e.g. glass, ceramic etc.) 33. FIGS. 4-5 depict test fixture's 18 set of pogo pins 34 include spear points 38 that are configured to pierce an oxide layer 36. At least one pogo pin 34 directly contacts ferrule 32 to securely form a ground connection. The secure ground connection assists in detecting and measuring more accurate data than conventional systems. Test system 10 increases measurement accuracy by at least 10% over conventional systems. In addition to providing accurate insertion loss and ESR data, test system 10 also provides more accurate data related to measurement of capacitance, dissipation factor, high voltage resistance, insulation resistance, dielectric withstand voltage, and other suitable factors.

LCR meter 16 inputs a test signal at a certain frequency to switch matrix 14 over conductive lines PH, IH. PH is a positive voltage conductive line whereas IH is a positive current conductive line. Based upon the signal from LCR meter 16, switch matrix 14 selects one of four channels to test one or more conductive lines 25a-d of a feed-through assembly 30. A first channel is formed by conductive lines N−7 and N−6; a second channel is formed by conductive lines N−5 and N−4; a third channel is formed by conductive lines N−3 and N−2; and a fourth channel is formed by conductive lines N−1 and N. Switch matrix 14 then signals a conductive line 25a over the selected channel. A signal is then transmitted from conductive line 25a to LCR meter 16 over negative voltage conductive line PL and negative current conductive line IL. LCR meter 16 determines the ESR for test fixture 18 and the insertion loss at two different high frequencies (e.g. 450 megahertz (MHz) and at 2450 MHz etc.). Generally, a high frequency ranges from about 9 KHz to about 10,000 MHz. The ESR is also measured at 2 MHz for the filtered feed-through assembly. The data is transmitted to control module 12. This process is repeated for a set of filtered feed-through assemblies. Control module 12 then executes regression analysis instructions that correlate insertion loss data obtained at a high frequency to ESR data obtained at a low frequency, as depicted in the graph of FIG. 6. Exemplary regression analysis software is commercially available from Minitab located in State College, Pa. Regression analysis is described in detail by W. Mendenhall and T. Sincich, Statistics For Engineering And the Sciences (4th Ed. 1995), which is incorporated by reference, in relevant parts.

An example of simple regression analysis is presented below. Regression analysis determines the prediction interval (PI) for insertion loss, as depicted in FIG. 6. PI, defined by lower and upper limits 40, 42, is an interval that quantifies the degree of uncertainty in a future prediction relative to insertion loss of a DUT. The formula to calculate the Pi for insertion loss, defined as y, is as follows:

$\hat{y}\pm t\left(n-2,\frac{\alpha }{2}\right)·s_e·\sqrt{1+\frac{1}{n}+\frac{{\left(x_0-\stackrel{\_}{x}\right)}^2}{\mathrm{SSx}}}$
where,

• t is the Student's t-distribution statistic obtained from tabulated data,
• t (df,α) is the critical value for the Student's t-distribution,
• df=(n−2) is the degree of freedom,
• α=probability of type 1 error=0.01,
• n=sample size (i.e. number of pieces of data in one sample)
• x=is the average value for x,
• X₀=ESR measured at a low frequency,

$\begin{array}{c}{s}_e^2=\frac{\left(\sum y^2\right)-\left(b_0\right)\left(\sum y\right)-\left(b_1\right)\left(\sum \mathrm{xy}\right)}{n-2}\\ b_1=\frac{\sum \left(x-\stackrel{\_}{x}\right)\left(y-\stackrel{\_}{y}\right)}{\sum {\left(x-\stackrel{\_}{x}\right)}^2}\end{array}$

• y=the average value of insertion loss data

$b_0=\frac{\sum y-\left(b_1·\sum x\right)}{n}$

• ŷ=predicted value of y for a given x

$\mathrm{SSx}=\sum x^2-\frac{{\left(\sum x\right)}^2}{n}$

The lower and upper PI limits 40, 42 are determined from the confidence level and the standard error of the prediction. The PI is generally wider than a confidence interval because of the added uncertainty involved in predicting a single response versus the mean response. The PI is a discrete determination that is performed at a chosen Xo over a desired ESR range to create a curve. In the present example, Xo is selected over an ESR range such that the upper limit 40 for insertion loss crosses the desired insertion loss specification limit 44 (Y-axis). In this example, the desired insertion loss limit is −30 decibels (dB). From this data, the ESR limit 46 is determined to be 2.8Ω since this is the point at which upper limit 42 crosses the desired insertion loss limit 44.

Using the above formula, the value of the Y interval (i.e., insertion loss) is predicted in an iterative manner for a given X₀ (ESR). Table 1 summarizes ESR data at a lower frequency (e.g. 2 MHz) and the upper and lower limits for insertion loss.

TABLE 1
Tabulated data for a filtered feed-through assembly
	Prediction Limit For	Prediction Limit For
X0 (ESR	Insertion Loss at 450 MHz	Insertion Loss at 450 MHz
at 2 MHz) Ω	(Lower Limit)	(Upper Limit)
2.3	−43.9578	−33.9257
2.4	−43.1368	−33.1196
2.5	−42.3326	−32.3272
2.6	−41.5451	−31.5485
2.7	−40.7741	−30.7837
2.75	−40.3948	−30.4065
2.8	−40.0196	−30.0329
2.85	−39.6484	−29.6628
2.9	−39.2813	−29.2963
2.95	−38.9182	−28.9333
3	−38.5592	−28.5739

The ESR limit is based on a minimum insertion loss requirement. ESR limit 46 is used to accept or reject a part. In particular, ESR limit 46 is compared to the ESR exhibited by the DUT. If the ESR of the DUT is below ESR limit 46, the DUT satisfies quality specifications. However, if the DUT's ESR value exceeds ESR limit 46, the DUT does not meet quality specifications. DUT's are rejected that exceed ESR limit 46. In addition to using the ESR limit 46 to determine the quality of a DUT, the ESR value measured on the DUT can also be used to predict the insertion loss of the DUT using the same method.

FIG. 6 is a flow diagram of one method to determine an ESR limit at a low frequency. At operation 110, a set of insertion loss data at a first high frequency (e.g. 450 MHz) is determined for a filtered feed-through assembly. At operation 120, a set of insertion loss data is generated at a second high frequency (e.g. 2450 MHz) for the filtered feed-through assembly. At operation 130, a set of ESR data is generated at a low frequency (e.g. 2 MHz) for the filtered feed-through assembly. The set of ESR data at a low frequency is correlated to the insertion loss generated at a first high frequency. This correlation may be graphically represented or tabulated. At operation 140, the set of insertion loss data is correlated to the set of ESR data. At operation 150, a prediction interval that includes upper and lower limits is generated and superimposed on the graph. At operation 160, a specified insertion loss value (e.g. 30 dB) is selected. The specified insert in loss value is based upon the desired minimal quality that is sought for a manufactured device (e.g. filtered feed-through assembly). At operation 170, an ESR limit for a low frequency signal is determined. The ESR limit is based upon the first insertion loss data and the upper limit of the prediction interval. The ESR limit is then used to reject or accept manufactured feed-through assemblies.

The present invention has numerous applications. For example, while the figures relate to quadripolar filtered feed-through assemblies, other types of feed-through assemblies may also rely on this process to reliably produce quality feed-through assemblies. Additionally, the operation described herein may be implemented entirely automatically or manually. Moreover, skilled artisans appreciate that measurement techniques are not polarity sensitive. Accordingly, techniques of the invention may be implemented with PH having a negative voltage and PL having a positive voltage. Similarly, IH can possess a negative current and IL can be a positive current. Furthermore, while the present invention describes rejection of a manufactured device (e.g. filtered feed-through assembly etc.) that exceeds an ESR limit, skilled artisans understand that principles of the invention may also be configured in a manner such that a manufactured device is rejected that is below an ESR limit.

The description of the invention is merely exemplary in nature and, thus, variations that do not depart from the gist of the invention are intended to be within the scope of the invention. Such variations are not to be regarded as a departure from the spirit and scope of the invention.

Claims

1. A test system for measurement of an insertion loss of a device under test having a filtered feed-through assembly including a conductive line, a ferrule and an oxide layer over the ferrule, comprising:

a test fixture having a probe pin configured to contact the conductive line and a probe pin configured to pierce the oxide layer of the filtered feed-through assembly to establish a ground connection to the ferrule;

an equivalent series resistance (esr) measurement device coupled to the conductor probe pin of the test fixture and coupled to the ground connection pin of the test fixture, the esr device operating to obtain insertion loss data; and

a control module coupled to the equivalent series resistance measurement device,

wherein the control module inputs a control signal to the equivalent series resistance measurement device and wherein the equivalent series resistance device transmits the obtained insertion loss data to the control module.

2. The test system of claim 1 wherein the test fixture includes a plurality of conductor probe pins arranged to contact each of a plurality of conductive lines in a filtered feed-through assembly of a device under test, and wherein the test system further comprises a switch matrix coupled to the test fixture probe pins via a plurality of selectable channels, the switch matrix being coupled to the equivalent series resistance measurement device and operative to selectively couple the equivalent series resistance measurement device to a selected one of the conductive line probe pins of the test fixture via one of the selectable channels.

3. The test system of claim 1 wherein the equivalent series resistance measurement device provides an alternating current frequency signal to the test fixture probe pin.

4. The test system of claim 1 wherein the control module comprises a processor and executes instructions to analyze the insertion loss data to determine an indicia of a quality of the manufactured filtered feed-through assembly based upon an esr limit.

5. The test fixture of claim 1, wherein the equivalent series resistance (esr) measurement device applies a first test signal to the conductor probe pin at a first test frequency, applies a second test signal to the conductor probe pin at a second test frequency that is higher than the first test signal, and applies a third test signal to the conductor probe pin at a third test frequency that is lower than the first test signal;

wherein the equivalent series resistance (esr) measurement device obtains a first set of insertion loss data in association with the first test signal and obtains a second set of insertion loss data in association with the second test signal;

wherein the equivalent series resistance (esr) measurement device obtains a set of equivalent series resistance (esr) data in association with the third test signal; and

wherein the equivalent series resistance (esr) measurement device transmits each set of data to the control module.

6. The test system of claim 5, wherein the control module correlates the set of esr data with the first set of insertion loss data and determines an esr limit for use to reject or accept a filtered feed-through assembly.

7. A method of acceptance testing a filtered feed-through assembly, comprising:

generating a first set of insertion loss data at a first high frequency for the filtered feed-through assembly;

generating a second set of insertion loss data at a second high frequency for the filtered feed-through assembly;

generating a set of equivalent series resistance (esr) data at a low frequency for the filtered feed-through assembly;

correlating the set of esr data to the first set of insertion loss data;

generating a prediction interval that includes upper and lower limits;

selecting an insertion loss value;

determining an esr limit based upon the selected insertion loss value and the upper limit of the prediction interval; and

using the esr limit to reject or accept a filtered feed-through assembly under test.

8. A method of acceptance testing a filtered feed-through assembly, comprising:

coupling a measurement device to a conductive line of the feed-through assembly;

piercing an oxide layer over a ferrule of the feed-through assembly to establish a ground connection to the ferrule;

generating a first set of insertion loss data at a first high frequency for the filtered feed-through assembly;

generating a second set of insertion loss data at a second high frequency for the filtered feed-through assembly;

generating a set of equivalent series resistance (esr) data at a low frequency for the filtered feed-through assembly;

correlating the set of esr data to the first set of insertion loss data;

generating a prediction interval that includes upper and lower limits;

selecting an insertion loss value;

determining an esr limit for acceptance; and

using the esr limit to reject or accept a filtered feed-through assembly under test.