The present invention generally describes one or more apparatuses and various methods that are used to perform an annealing process on desired regions of a substrate. In one embodiment, an amount of energy is delivered to the surface of the substrate to preferentially melt certain desired regions of the substrate to remove unwanted damage created from prior processing steps (e.g., crystal damage from implant processes), more evenly distribute dopants in various regions of the substrate, and/or activate various regions of the substrate. The preferential melting processes will allow more uniform distribution of the dopants in the melted region, due to the increased diffusion rate and solubility of the dopant atoms in the molten region of the substrate. The creation of a melted region thus allows: 1) the dopant atoms to redistribute more uniformly, 2) defects created in prior processing steps to be removed, and 3) regions that have hyper-abrupt dopant concentrations to be formed.
|
17. A method of thermally processing a substrate, comprising:
delivering a first amount of electromagnetic energy to a first region on a surface of a substrate, wherein the first amount of electromagnetic energy causes the crystalline substrate material within the first region to melt and causes the crystalline substrate material to become amorphous;
implanting a first material within the amorphous first region; and
delivering a second amount of electromagnetic energy to the first region, wherein the second amount of electromagnetic energy causes the amorphous substrate material and the first material within the first regions to melt.
8. A method of thermally processing a semiconductor substrate, comprising:
providing a substrate formed from a substrate material;
forming a buried region made of a first material on a surface of the substrate, wherein the first material has a first thermal conductivity;
depositing a second layer made of a second material over the buried region, wherein the second material has a second thermal conductivity;
forming a semiconductor device on the surface of the substrate, wherein a portion of the formed semiconductor device contains a portion of the second layer; and
delivering an amount of electromagnetic energy to a surface of a substrate which is in thermal communication with the second layer, wherein the amount of electromagnetic energy is adapted to cause a portion of the second material in thermal communication with the buried region to reach its melting point.
12. A method of thermally processing a substrate, comprising:
modifying one or more regions in a substrate formed from a first material by disposing a second material within the one or more regions, wherein modifying one or more regions in a substrate with the second material is adapted to lower the melting point of the first material contained within the one or more regions;
disposing a third material within the one or more regions in the substrate; and
delivering a first amount of electromagnetic energy at one or more desired wavelengths to a rear surface of the substrate to cause the first material in the one or more regions generally adjacent to a front surface of the substrate to melt, wherein the rear surface and the front surface are on opposite sides of the substrate and the front surface of the substrate contains one or more semiconductor devices formed thereon.
24. A method of thermally processing a substrate, comprising:
delivering a first amount of electromagnetic energy to a first region on a surface of a substrate, wherein the first amount of electromagnetic energy causes the substrate material within the first region to melt and cause the crystalline substrate material to become amorphous;
implanting a first material within the amorphous first region;
delivering a second amount of electromagnetic energy to the first region, wherein the second amount of electromagnetic energy causes the substrate material within the first regions to melt; and
depositing a coating over the surface of the substrate before delivering the second amount of electromagnetic energy, wherein the coating generally has a different absorption and reflection coefficient than the surface of the substrate on which the amount of electromagnetic energy is disposed.
1. A method of thermally processing a substrate, comprising:
modifying one or more regions in a substrate formed from a first material by disposing a second material within the one or more regions, wherein modifying one or more regions in a substrate with the second material is adapted to lower the melting point of the first material contained within the one or more regions;
disposing a third material within the one or more regions in the substrate; and
delivering an amount of electromagnetic energy to a surface of a substrate which is in thermal communication with the one or more regions, wherein the amount of electromagnetic energy is adapted to cause the first material within the one or more regions to melt, and the delivered electromagnetic energy is disposed within an anneal region that has at least one edge that is positioned within a boundary that at least partially surrounds the one or more regions.
20. A method of thermally processing a substrate, comprising:
modifying one or more regions in a substrate formed from a first material by disposing a second material within the one or more regions, wherein modifying one or more regions in a substrate with the second material is adapted to lower the melting point of the first material contained within the one or more regions;
disposing a third material within the one or more regions in the substrate;
delivering an amount of electromagnetic energy to a surface of a substrate which is in thermal communication with the one or more regions, wherein the amount of electromagnetic energy is adapted to cause the first material within the one or more regions to melt; and
depositing a coating over the surface of the substrate before delivering the amount of electromagnetic energy, wherein the coating generally has a different absorption and reflection coefficient than the surface of the substrate on which the coating is disposed.
22. A method of thermally processing a semiconductor substrate, comprising
providing a substrate formed from a substrate material;
forming a buried region made of a first material on a surface of the substrate, wherein the first material has a first thermal conductivity;
depositing a second layer made of a second material over the buried region, wherein the second material has a second thermal conductivity;
forming a semiconductor device on the surface of the substrate, wherein a portion of the formed semiconductor device contains a portion of the second layer; and
delivering an amount of electromagnetic energy to a surface of a substrate which is in thermal communication with the second layer, wherein the amount of electromagnetic energy is adapted to cause a portion of the second material in thermal communication with the buried region to reach its melting point; and
depositing a coating over the surface of the substrate on which the semiconductor device is formed before delivering the amount of electromagnetic energy, wherein the coating generally has a different absorption and reflection coefficient than the surface of the substrate on which the semiconductor device is formed.
2. The method of
3. The method of
4. The method of
5. The method of
6. The method of
7. The method of
9. The method of
10. The method of
11. The method of
13. The method of
14. The method of
15. The method of
16. The method of
18. The method of
19. The method of
21. The method of
23. The method of
25. The method of
|
This application claims benefit of U.S. provisional patent application Ser. No. 60/780,745, filed Mar. 8, 2006, which is herein incorporated by reference.
This application is related to U.S. patent application Ser. No. 11/459,852, filed Jul. 25, 2006, and to U.S. patent application Ser. No. 11/459,856 filed Jul. 25, 2006.
1. Field of the Invention
Embodiments of the present invention generally relate to a method of manufacturing a semiconductor device. More particularly, the invention is directed to a method of thermally processing a substrate.
2. Description of the Related Art
The integrated circuit (IC) market is continually demanding greater memory capacity, faster switching speeds, and smaller feature sizes. One of the major steps the industry has taken to address these demands is to change from batch processing silicon wafers in large furnaces to single wafer processing in a small chamber.
During such single wafer processing the wafer is typically heated to high temperatures so that various chemical and physical reactions can take place in multiple IC devices defined in the wafer. Of particular interest, favorable electrical performance of the IC devices requires implanted regions to be annealed. Annealing recreates a more crystalline structure from regions of the wafer that were previously made amorphous, and activates dopants by incorporating their atoms into the crystalline lattice of the substrate, or wafer. Thermal processes, such as annealing, require providing a relatively large amount of thermal energy to the wafer in a short amount of time, and thereafter rapidly cooling the wafer to terminate the thermal process. Examples of thermal processes currently in use include Rapid Thermal Processing (RTP) and impulse (spike) annealing. While such processes are widely used, current technology is not ideal. It tends to ramp the temperature of the wafer too slowly and expose the wafer to elevated temperatures for too long. These problems become more severe with increasing wafer sizes, increasing switching speeds, and/or decreasing feature sizes.
In general, these thermal processes heat the substrates under controlled conditions according to a predetermined thermal recipe. These thermal recipes fundamentally consist of a temperature that the semiconductor substrate must be heated to the rate of change of temperature, i.e., the temperature ramp-up and ramp-down rates and the time that the thermal processing system remains at a particular temperature. For example, thermal recipes may require the substrate to be heated from room temperature to distinct temperatures of 1200° C. or more, for processing times at each distinct temperature ranging up to 60 seconds, or more.
Moreover, to meet certain objectives, such as minimal inter-diffusion of materials between different regions of a semiconductor substrate, the amount of time that each semiconductor substrate is subjected to high temperatures must be restricted. To accomplish this, the temperature ramp rates, both up and down, are preferably high. In other words, it is desirable to be able to adjust the temperature of the substrate from a low to a high temperature, or visa versa, in as short a time as possible.
The requirement for high temperature ramp rates led to the development of Rapid Thermal Processing (RTP), where typical temperature ramp-up rates range from 200 to 400° C./s, as compared to 5-15° C./minute for conventional furnaces. Typical ramp-down rates are in the range of 80-150° C./s. A drawback of RTP is that it heats the entire wafer even though the IC devices reside only in the top few microns of the silicon wafer. This limits how fast one can heat up and cool down the wafer. Moreover, once the entire wafer is at an elevated temperature, heat can only dissipate into the surrounding space or structures. As a result, today's state of the art RTP systems struggle to achieve a 400° C./s ramp-up rate and a 150° C./s ramp-down rate.
To resolve some of the problems raised in conventional RTP type processes various scanning laser anneal techniques have been used to anneal the surface(s) of the substrate. In general, these techniques deliver a constant energy flux to a small region on the surface of the substrate while the substrate is translated, or scanned, relative to the energy delivered to the small region. Due to the stringent uniformity requirements and the complexity of minimizing the overlap of scanned regions across the substrate surface these types of processes are not effective for thermal processing contact level devices formed on the surface of the substrate.
In view of the above, there is a need for an method for annealing a semiconductor substrate with high ramp-up and ramp-down rates. This will offer greater control over the fabrication of smaller devices leading to increased performance.
The present invention generally provide a method of thermally processing a substrate, comprising modifying one or more regions in a substrate formed from a first material by disposing a second material within the one or more regions, wherein modifying one or more regions in a substrate with the second material is adapted to lower the melting point of the first material contained within the one or more regions, disposing a third material within the one or more regions in the substrate, and delivering an amount of electromagnetic energy to a surface of a substrate which is in thermal communication with the one or more regions, wherein the amount of electromagnetic energy is adapted to cause the first material within the one or more regions to melt.
Embodiments of the invention further provide a method of thermally processing a substrate, comprising providing a substrate that has one or more first regions that have been modified so that the melting point of the material contained within each of the first regions melts at a lower temperature than the material contained within a second region of the substrate, wherein the second region and each of the first regions are generally adjacent to a surface of the substrate, depositing a coating over the surface of the substrate, wherein the coating has a different absorption and reflection coefficient than that surface of the substrate, removing a portion of the coating from the surface of the substrate that is generally adjacent to each of the first regions or the second region, and delivering an amount of electromagnetic energy to an area on the surface of the substrate that contains the one or more first regions and the second region, wherein the amount of electromagnetic energy preferentially melts the material within the one or more first regions.
Embodiments of the invention further provide a method of thermally processing a semiconductor substrate, comprising providing a substrate formed from a substrate material, forming a buried region made of a first material on a surface of the substrate, wherein the first material has a first thermal conductivity, depositing a second layer made of a second material over the buried region, wherein the second material has a second thermal conductivity, forming a semiconductor device on the surface of the substrate, wherein a portion of the formed semiconductor device contains a portion of the second layer, and delivering an amount of electromagnetic energy to a surface of a substrate which is in thermal communication with the second layer, wherein the amount of electromagnetic energy is adapted to cause a portion of the second material in thermal communication with the buried region to reach its melting point.
Embodiments of the invention further provide a method of thermally processing a substrate, comprising positioning a substrate on a substrate support, wherein the substrate has a plurality of features formed on a surface of the substrate that contain a first region and a second region, depositing a coating over the first and second regions, wherein the material from which the coating is formed has a desired heat capacity, removing a portion of the coating so that the thickness of the coating over the first region has a desired thickness, wherein the average heat capacity across the substrate surface after removing a portion of the coating is generally uniform, and delivering an amount of electromagnetic energy to an area that contains the first region and the second region, wherein the amount of electromagnetic energy causes the material within the first region to melt.
Embodiments of the invention further provide a method of thermally processing a substrate, comprising providing a substrate that has a first feature and a second feature formed on a surface of the substrate, wherein the second feature contains a first region and a second region, positioning the substrate on a substrate support, depositing a coating over the first and second features, removing a portion of the coating so that the coating is disposed over the second region and a surface of the first feature is exposed, and delivering an amount of electromagnetic energy to an area that contains the first feature and the second feature, wherein the amount of electromagnetic energy causes the material within the first region of the second feature to melt.
Embodiments of the invention further provide a method of thermally processing a substrate, comprising delivering a first amount of electromagnetic energy at one or more desired wavelengths to a rear surface of the substrate to cause a material in one or more regions generally adjacent to a front surface of the substrate to melt, wherein the rear surface and the front surface are on opposite sides of the substrate and the front surface of the substrate contains one or more semiconductor devices formed thereon.
Embodiments of the invention further provide a method of thermally processing a substrate, comprising delivering a first amount of electromagnetic energy to a first region on a surface of a substrate, wherein the first amount of electromagnetic energy causes the substrate material within the first region to melt and cause the crystalline substrate material to become amorphous, implanting a second material within the amorphous first region, and delivering a second amount of electromagnetic energy to the first region, wherein the second amount of electromagnetic energy causes the material within the first regions to melt.
So that the manner in which the above recited features of the present invention can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.
The present invention generally improves the performance of the implant anneal steps used in the process of manufacturing a semiconductor devices on a substrate. Generally, the methods of the present invention may be used to preferentially anneal selected regions of a substrate by delivering enough energy to the selected regions to cause them to re-melt and solidify.
In general the term “substrates” as used herein can be formed from any material that has some natural electrical conducting ability or a material that can be modified to provide the ability to conduct electricity. Typical substrate materials include, but are not limited to semiconductors, such as silicon (Si) and germanium (Ge), as well as other compounds that exhibit semiconducting properties. Such semiconductor compounds generally include group III-V and group II-VI compounds. Representative group III-V semiconductor compounds include, but are not limited to, gallium arsenide (GaAs), gallium phosphide (GaP), and gallium nitride (GaN). Generally, the term semiconductor substrates include bulk semiconductor substrates as well as substrates having deposited layers disposed thereon. To this end, the deposited layers in some semiconductor substrates processed by the methods of the present invention are formed by either homoepitaxial (e.g., silicon on silicon) or heteroepitaxial (e.g., GaAs on silicon) growth. For example, the methods of the present invention may be used with gallium arsenide and gallium nitride substrates formed by heteroepitaxial methods. Similarly, the invented methods can also be applied to form integrated devices, such as thin-film transistors (TFTs), on relatively thin crystalline silicon layers formed on insulating substrates (e.g., silicon-on-insulator [SOI] substrates).
In one embodiment of the invention, an amount of energy is delivered to the surface of the substrate to preferentially melt certain desired regions of the substrate to remove unwanted damage created from prior processing steps (e.g., crystal damage from implant processes), more evenly distribute dopants in various regions of the substrate, and/or activate various regions of the substrate. The preferential melting processes will allow more uniform distribution of the dopants in the melted region, due to the increased diffusion rate and solubility of the dopant atoms in the moltent region of the substrate. The creation of a melted region thus allows: 1) the dopant atoms to redistribute more uniformly, 2) defects created in prior processing steps to be removed, and 3) regions that have hyper-abrupt dopant concentrations to be formed. The gradient in dopant concentration in a region that has a hyper-abrupt dopant concentrations is very large (e.g., <2 nm/decade of concentration) as the concentration rapidly changes from one region to another in the device.
Use of the techniques described herein allows junctions to be formed that contain higher dopant concentrations than conventional devices, since the common negative attributes of the formed junctions, such as an increase in the concentration of defects in the substrate material by the increase in doping level, can be easily reduced to an acceptable level by use of the processing techniques described herein. The higher dopant levels and abrupt changes in the dopant concentration can thus increase the conductivity of various regions of the substrate, thus improving device speed without negatively affecting device yield, while minimizing the diffusion of dopants into various regions of the substrate. The resultant higher dopant concentration increases the conductivity of the formed device and improves its performance. Typically, devices that are formed using an RTP process, will not use a dopant concentration greater than about 1×1015 atoms/cm2, since the higher dopant concentrations cannot readily diffuse into the bulk material of the substrate during typical RTP processes and will instead result in clusters of dopant atoms and other types of defects. Using one or more of the embodiments of the anneal process described herein, much more dopant (up to 5-10 times more dopant, i.e., 1×1016 atoms/cm2) may be successfully incorporated into the desired substrate surface, since regions of the substrate are preferentially melted so that the dopants will become more evenly distributed throughout the liquid before the liquefied regions solidify.
In one aspect, the anneal region 12 is sized to match the size of the die 13 (e.g., 40 “die” are shown in
The energy source 20 is generally adapted to deliver electromagnetic energy to preferentially melt certain desired regions of the substrate surface. Typical sources of electromagnetic energy include, but are not limited to an optical radiation source (e.g., laser), an electron beam source, an ion beam source, and/or a microwave energy source. In one aspect, the substrate 10 is exposed to a pulse of energy from a laser that emits radiation at one or more appropriate wavelengths for a desired period of time. In one aspect, pulse of energy from the energy source 20 is tailored so that the amount of energy delivered across the anneal region 12 and/or the amount of energy delivered over the period of the pulse is optimized to enhance preferential melting of certain desired areas. In one aspect, the wavelength of the laser is tuned so that a significant portion of the radiation is absorbed by a silicon layer disposed on the substrate 10. For laser anneal process performed on a silicon containing substrate, the wavelength of the radiation is typically less than about 800 nm, and can be delivered at deep ultraviolet (UV), infrared (IR) or other desirable wavelengths. In one embodiment, the energy source 20 is an intense light source, such as a laser, that is adapted to deliver radiation at a wavelength between about 500 nm and about 11 micrometers. In either case, the anneal process generally takes place on a given region of the substrate for a relatively short time, such as on the order of about one second or less.
In one aspect, the amount of energy delivered to the surface of the substrate is configured so that the melt depth does not extend beyond the amorphous depth defined by the amorphization implant step. Deeper melt depths facilitate the diffusion of dopant from the doped amorphous layers into the undoped molten layers. Such undesirable diffusion would sharply and deleteriously alter the electrical characteristics of the circuits on the semiconductor substrate. In some anneal processes, energy is delivered to the surface of a substrate for a very short time in order to melt the surface of the substrate to a sharply defined depth, for example less than 0.5 micrometers. The exact depth is determined by the size of the electronic device being manufactured.
Temperature Control of the Substrate During the Anneal Process
In one embodiment, it may be desirable to control the temperature of the thermally substrate during thermal processing by placing a surface of the substrate 10, illustrated in
In one embodiment, the substrate may be preheated prior to performing the annealing process so that the energy required to reach the melting temperature is minimized, which may reduce any induced stress due to the rapid heating and cooling of the substrate and also possibly reduce the defect density in the resolidified areas of the substrate. In one aspect, the heat exchanging device 15 contains resistive heating elements 15A and a temperature controller 15C that are adapted to heat a substrate disposed on a substrate supporting surface 16. The temperature controller 15C is in communication with the controller 21 (discussed below). In one aspect, it may be desirable to preheat the substrate to a temperature between about 20° C. and about 750° C. In one aspect, where the substrate is formed from a silicon containing material it may be desirable to preheat the substrate to a temperature between about 20° C. and about 500° C.
In another embodiment, it may be desirable to cool the substrate during processing to reduce any interdiffusion due to the energy added to substrate during the annealing process and/or increase the regrowth velocity after melting to increase the amorphization of the various regions during processing, such as described in conjunction with
The controller 21 (
Selective Melting
In an effort to minimize inter-diffusion between various regions of a formed device, remove defects in the substrate material, and more evenly distribute dopants in various regions of the substrate, one or more processing steps are performed on various regions of the substrate to cause them to preferentially remelt when exposed to energy delivered from an energy source during the anneal process. The process of modifying the properties of a first region of the substrate so that it will preferentially melt rather than a second region of the substrate, when they are both exposed to about the same amount energy during the annealing process, is hereafter described as creating a melting point contrast between these two regions. In general, the substrate properties that can be modified to allow preferential melting of desired regions of the substrate include implanting, driving-in and/or co-depositing one or more elements within a desired regions of the substrate, creating physical damage to desired regions of the substrate, and optimizing the formed device structure to create the melting point contrast in desired regions of the substrate. Each of these modification processes will be reviewed in turn.
In another embodiment, the modification process includes the step of implanting (see “A” in
In another embodiment, the modification process includes the step of inducing some damage to the substrate 10 material in the various modified areas (e.g., modified area 210) to damage the crystal structure of the substrate, and thus make these regions more amorphous. Inducing damage to the crystal structure of the substrate, such as damaging a single crystal silicon substrate, will reduce the melting point of this region relative to an undamaged region due to the change in the bonding structure of atoms in the substrate and thus induce thermodynamic property differences between the two regions. In one aspect, damage to the modified area 210 in
It should be noted that while
Thermal Isolation Techniques
In another embodiment, the various thermal properties of different regions of the formed device are tailored to preferentially cause the melting in one region versus another region. In one aspect, the melting point contrast is created by forming different regions of the device with materials that have different thermal conductivities (k). It should be noted that heat transferred by conduction is governed by the equation:
Q=kAΔT/Δx
in which Q is the time rate of heat flow through a body, k is the conductivity constant dependent on the nature of the material and the material temperature, A is the area through which the heat flows, Δx is the thickness of the body of matter through which the heat is passing, and ΔT is the temperature difference through which the heat is being transferred. Therefore, since k is a property of the material the selection or modification of the material in various regions of the substrate can allow one to control the heat flow into and out-of the different regions of the substrate to increase the melting point contrast for the various regions. In other words, where the material in a region of a substrate has a higher thermal conductivity than the material in other regions, it will lose more thermal energy via conductive losses during a laser anneal process, and, hence, will not reach the same temperatures that another region that has a lower thermal conductivity will reach. The regions in intimate contact with the higher thermally conductive regions can be prevented from melting, while other regions in intimate contact with lower thermal conductivity regions will reach their melting point during the laser anneal process. By controlling the thermal conductivity of the various regions of the electronic device 200 the melting point contrast can be increased. The creation of regions having varying thermal conductivities may be performed by performing conventional deposition, patterning and etching techniques in various underlying layers of the electronic device 200 to create these regions having different thermal conductivities. The underlying layers having differing thermal conductivities may be formed by use of conventional chemical vapor deposition (CVD) processes, atomic layer deposition (ALD) processes, implant processes, and epitaxial deposition techniques.
Modification of Surface Properties
In one embodiment, the properties of the surface over the various regions 202 of the substrate 10 are altered to change the melting point contrast between one or more desired regions. In one aspect, the emissivity of the surface of the substrate in a desired region is altered to change the amount of energy transferred from the substrate surface during processing. In this case, a region that has a lower emissivity than another region will achieve a higher processing temperature due to its inability to reradiate the absorbed energy received from the energy source 20. When performing an anneal process that involves the melting of the surface of a substrate, the processing temperatures achieved at the surface of the substrate can be quite high (e.g., ˜1414° C. for silicon), and thus the effect of varying the emissivity can have a dramatic effect on the melting point contrast, since radiative heat transfer is the primary heat loss mechanism. Therefore, variations in the emissivity of different regions of the substrate surface may have a significant impact on the ultimate temperatures reached by the various regions of the substrate. Regions with low emissivity may be elevated above the melting point during the annealing process, while regions with high emissivity that have absorbed the same amount of energy may remain substantially below the melting point. Varying the emissivity of the various surfaces, or emissivity contrast, may be accomplished via selective deposition of a low- or high-emissivity coating onto the substrate surface, and/or modifying the surface of the substrate (e.g., surface oxidation, surface roughening).
In one embodiment, the reflectivity of the surface of the substrate in one or more regions is altered to change the amount of energy absorbed when the substrate 10 is exposed to energy from the energy source. By varying the reflectivity of the surface of the substrate the amount of energy absorbed and thus the maximum temperature achieved by the substrate in a region at and below the substrate surface will differ based on the reflectivity. In this case a surface having a lower reflectivity will more likely melt than another region that has a higher reflectivity. Varying the reflectivity of the surface of the substrate may be accomplished via selective deposition of a low- or high-reflectance coating onto the substrate surface, and/or modifying the surface of the substrate (e.g., surface oxidation, surface roughening). A highly absorbing (non-reflective) coating may be selectively applied to regions that are intended to be melted during the anneal process.
In one embodiment, the coating 226 contains one or more deposited layers of a desired thickness that either by themselves or in combination modify the optical properties (e.g., emissivity, absorbance, reflectivity) of various regions of the substrate that are exposed to one or more wavelengths of incident radiation. In one aspect, the coating 226 contains layers that either by themselves or in combination preferentially absorb or reflect one or more wavelengths of the incident radiation “B.” In one embodiment, the coating 226 contains a dielectic material, such as fluorosilicate glass (FSG), amorphous carbon, silicon dioxide, silicon carbide, silicon carbon germanium alloys (SiCGe), nitrogen containing silicon carbide (SiCN), a BLOk™ dielectric material made by a process that is commercially available from Applied Materials, Inc., of Santa Clara, or a carbon containing coating that is deposited on the substrate surface by use of a chemical vapor deposition (CVD) process or atomic layer deposition process (ALD) process. In one aspect, coating 226 contains a metal, such as but not limited to titanium (Ti), titanium nitride (TiN), tantalum (Ta), cobalt (Co), or ruthenium (Ru).
It should be noted that one or more of the various embodiments, discussed herein, may be used in conjunction with each other in order to further increase process window. For example, a selectively deposited, light absorbing coating may be used in conjunction with doping of certain defined regions to broaden the process window of the anneal process.
Tuning the Energy Source Output to Achieve Preferential Melting
As noted above, the energy source 20 is generally adapted to deliver electromagnetic energy to preferentially melt certain desired regions of the substrate 10. Typical sources of electromagnetic energy include, but are not limited to an optical radiation source (e.g., laser (UV, IR, etc. wavelengths)), an electron beam source, an ion beam source, and/or a microwave energy source. In one embodiment of the invention, the energy source 20 is adapted to deliver optical radiation, such as a laser, to selectively heat desired regions of a substrate to the melting point.
In one aspect, the substrate 10 is exposed to a pulse of energy from a laser that emits radiation at one or more appropriate wavelengths, and the emitted radiation has a desired energy density (W/cm2) and/or pulse duration to enhance preferential melting of certain desired regions. For laser annealing processes performed on a silicon containing substrate, the wavelength of the radiation is typically less than about 800 nm. In either case, the anneal process generally takes place on a given region of the substrate for a relatively short time, such as on the order of about one second or less. The desired wavelength and pulse profile used in an annealing process may be determined based on optical and thermal modeling of the laser anneal process in light of the material properties of the substrate.
In one aspect, the shape of the pulse 401 may be varied as a function of time as it is delivered to the substrate 10.
Depending on the properties of the various regions of the device the shape of the delivered pulse of electromagnetic radiation may be tailored to improve the anneal process results. Referring to
Referring to
In another aspect, multiple wavelengths of radiant energy may be combined to improve the energy transfer to the desired regions of the substrate to achieve an improved melting point contrast, and/or improve the anneal process results. In one aspect, the amount of energy delivered by each of the combined wavelengths is varied to improve the melting point contrast, and improve the anneal process results.
In one embodiment, two or more pulses of electromagnetic radiation are delivered to a region of the substrates at differing times so that the temperature of regions on the substrate surface can be easily controlled.
Referring to
Electromagnetic Radiation Pulses
For the purpose of delivering sufficient electromagnetic radiation (light) to the surface of a silicon containing substrate, or substrate comprised of another material requiring thermal processing, the following a process controls may be used.
In one embodiment, two or more electromagnetic energy sources, such as lasers, are operated in sequence so as to shape the thermal profile of the surface being thermally processed and where the lasers are operated in such a manner as to correct for pulse-to-pulse energy variations. In one aspect, the source 20, schematically illustrated in
In one aspect, the two or more energy sources, discussed above, may also be implemented using a single color (wavelength) of laser light with a bandwidth of color frequency, multiple wavelengths, single or multiple temporal and spatial laser modes, and polarization states.
The output of the laser or lasers will likely not have the correct spatial and temporal energy profile for delivery to the substrate surface. Therefore, a system using microlenses to shape the output of the lasers is used to create a uniform spatial energy distribution at the substrate surface. Selection of glass types and geometry of the microlenses may compensate for thermal lensing effects in the optical train necessary for delivering the pulsed laser energy to the substrate surface.
High frequency variations in pulse energy at the substrate surface, known as speckle, is created by neighboring regions of constructive and destructive phase interference of the incident energy. Speckle compensation may include the following: a surface acoustic wave device for rapidly varying the phase at the substrate such that this rapid variation is substantially faster than the thermal processing time of the laser pulse or pulses; pulse addition of laser pulses; alternating polarization of laser pulses for example, delivery of multiple simultaneous or delayed pulses that are linearly polarized but have their polarization states (e-vectors) in a nonparallel condition.
Thermal Stabilizing Structures Formed on a Patterned Substrate
In one embodiment, as shown in
The device structure formed on a surface 102 of the substrate 100 illustrated in
Preferably, the thickness of the homogenizing layer 120 (e.g., d1) is selected so that the heat capacity of the device structure is uniform. In one aspect, the thickness, d1 of the homogenizing layer 120 is governed by:
d1=(α1)0.5×[d2/((α2)0.5)]
where
Absorption Layer Over Homogenous Layer
Referring to
Diffraction Grating
One issue that arises when features of different sizes, shapes and distances apart are exposed to electromagnetic radiation is that depending on the wavelength of the electromagnetic radiation the amount of energy applied to the features may experience constructive or destructive interference due to diffraction effects that undesirably vary the amount of energy, or energy density (e.g., Watts/m2), delivered to a desired region. Referring to
In one embodiment, as shown in
In one embodiment, the design of the devices formed on the surface of a substrate that is exposed to incident electromagnetic radiation is specifically designed and arranged so that a desired diffraction pattern is created to improve the melting point contrast between different zones. The physical arrangement of the various features are thus tailored for a desired wavelength, or wavelengths, of the incident radiation “B” (
Forming Amorphous Region in a Substrate
In one embodiment, one or more processing steps are performed to selectively form an amorphous region 140 in an originally single crystal or polycrystalline material to reduce the amount of damage created during subsequent implantation processing steps and increase the melting point contrast of the amorphous region 140 relative to other areas of the substrate. Implanting dopants in an amorphous region, such as an amorphous silicon layer will tend to homogenize the implantation depth of the desired dopant at a fixed ion energy, due to lack of density variation across the various planes found in crystalline lattice structures (e.g., single crystal silicon). The implantation in an amorphous layer will tend to reduce the crystalline damage commonly found in traditional implantation processes in crystalline structures. Therefore, when the amorphous region 140 is subsequently re-melted using an anneal type process, as discussed above, the formed region can be recrystallized with a more homogenous doping profile and with reduced number of defects. The re-melting process also removes any damage created from the implant process. The formation of the amorphous region 140 will also reduced the melting point of the affected regions, which can thus improve the melting point contrast between the amorphous region 140 and the adjacent single crystal regions 141.
In one embodiment, a short dose of energy (item “B” in
In one aspect, a pulse of energy is delivered to a desired region of a silicon substrate for period of less than about 10−8 seconds. In this aspect, the pulse of energy may be delivered from a laser that delivers a peak power greater than 109 W/cm2, and preferably in a range between about 109 and about 1010 W/cm2 for a period of less than about 10−8 seconds. In one aspect, the power, pulse duration, shape of the delivered dose to create the amorphous silicon layer may be varied to achieve an amorphous region 140 of a desired size, shape and depth. In one aspect, the wavelength of the delivered dose of energy is selected or varied to achieve a desired melt profile. In one aspect, the wavelength may be in the UV or IR wavelengths. In one aspect, the wavelength of the laser may be less than about 800 nm. In another aspect, the wavelength may be about 532 nm or about 193 nm.
In one embodiment, a mask is used to preferentially form the amorphous areas in various regions of the substrate surface.
Electromagnetic Radiation Delivery
In one embodiment, the substrate 10 is positioned in a substrate supporting region 911 formed on a substrate support 910 that has an opening 912 that allows the backside surface 901 of the substrate 10 to receive energy delivered from the energy source 20. In this configuration the radiation “B” emitted from the energy source 20 to heat regions 903 that are adapted to absorb a portion of the emitted energy. The energy source 20 is generally adapted to deliver electromagnetic energy to preferentially melt certain desired regions of the substrate surface. Typical sources of electromagnetic energy include, but are not limited to an optical radiation source (e.g., laser), an electron beam source, an ion beam source, and/or a microwave energy source. In one aspect, the substrate 10 is exposed to a pulse of energy from a laser that emits radiation at one or more appropriate wavelengths for a desired period of time. In one aspect, pulse of energy from the energy source 20 is tailored so that the amount of energy delivered across the anneal region 12 and/or the amount of energy delivered over the period of the pulse is optimized to enhance preferential melting of certain desired areas. In one aspect, the wavelength of the laser is tuned so that a significant portion of the radiation is absorbed by a silicon layer disposed on the substrate 10. For laser anneal process performed on a silicon containing substrate, the wavelength of the radiation is typically less than about 800 nm, and can be delivered at deep ultraviolet (UV), infrared (IR) or other desirable wavelengths. In either case, the anneal process generally takes place on a given region of the substrate for a relatively short time, such as on the order of about one second or less.
In one aspect, the wavelength of the emitted radiation from the energy source 20 is selected so that the bulk material from which the substrate is formed is more transparent to the incident radiation than the areas near the top surface 902 that are to be preferentially melted by the exposure of the incident emitted radiation. In one aspect, the regions that are to be preferentially melted contain a material that absorbs an amount of the energy delivered through the backside of the substrate, such as a dopant material or ionizing crystal damage (e.g., crystal defects, Frenkel defects, vacancies) created during the implantation process. In general the dopant materials may be boron, phosphorous, or other commonly used dopant material used in semiconductor processing. In one embodiment, the bulk material from which the substrate is formed is a silicon containing material and the wavelength of the emitted radiation is greater than about 1 micrometer. In another aspect, the energy source 20 contains a CO2 laser that is adapted to emit principal wavelength bands centering around 9.4 and 10.6 micrometers. In yet another aspect, the energy source 20 is adapted to deliver wavelengths in the infrared region, which is generally between about 750 nm and about 1 mm.
In one embodiment, an absorbing coating (not shown) is disposed over the anneal region 12 on the substrate 10 so that the incident radiation delivered through the back of the substrate can be absorbed before it passes through the substrate. In one aspect, the absorbing coating is a metal, such as titanium, titanium nitride, tantalum, or other suitable metal material. In another aspect, the absorbing coating is a silicon carbide material, amorphous carbon material, or other suitable material that is commonly used in semiconductor device manufacturing.
In one embodiment, two wavelengths of light are delivered to the desired regions of the substrate, so that the first wavelength of light is used to generate free carriers (e.g., electrons or holes) in the substrate from dopants or other ionizing crystal damage found in the desired annealing regions, so that the generated free carriers will absorb the energy delivered through the back of the substrate at a second wavelength. In one aspect, the first wavelength is the wavelength of “green light” (e.g., about 490 nm to about 570 nm) and/or shorter wavelengths. In one embodiment, the first wavelength is delivered at a desirable power density (W/cm2) to the desired region of the substrate from a second source 920 that is on the opposite side of the substrate from the energy source 20, shown in
While the foregoing is directed to embodiments of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.
Jennings, Dean, Yam, Mark, Moffatt, Stephen, Balakrishna, Ajit, Mayur, Abhilash, Carey, Paul, Schaffer, William
Patent | Priority | Assignee | Title |
10141191, | Mar 08 2006 | Applied Materials, Inc. | Method of thermal processing structures formed on a substrate |
10219325, | Jun 11 2012 | Applied Materials, Inc. | Melt depth determination using infrared interferometric technique in pulsed laser annealing |
10840100, | Mar 08 2006 | Applied Materials, Inc. | Method of thermal processing structures formed on a substrate |
11490466, | Jun 11 2012 | Applied Materials, Inc. | Melt depth determination using infrared interferometric technique in pulsed laser annealing |
8518838, | Mar 08 2006 | Applied Materials, Inc. | Method of thermal processing structures formed on a substrate |
Patent | Priority | Assignee | Title |
3633999, | |||
4439245, | Jan 25 1982 | Intersil Corporation | Electromagnetic radiation annealing of semiconductor material |
4475027, | Nov 17 1981 | LASER ENERGETICS | Optical beam homogenizer |
4511220, | Dec 23 1982 | The United States of America as represented by the Secretary of the Air | Laser target speckle eliminator |
4619508, | Apr 28 1984 | Nippon Kogaku K. K. | Illumination optical arrangement |
4744615, | Jan 29 1986 | INTERNATIONAL BUSINESS MACHINES CORPORATION, A CORP OF NEW YORK | Laser beam homogenizer |
4849371, | Dec 22 1986 | Freescale Semiconductor, Inc | Monocrystalline semiconductor buried layers for electrical contacts to semiconductor devices |
4851978, | Dec 24 1986 | Nikon Corporation | Illumination device using a laser |
5061025, | Apr 13 1990 | Eastman Kodak Company | Hologon scanner with beam shaping stationary diffraction grating |
5109465, | Jan 16 1990 | Summit Technology, Inc. | Beam homogenizer |
5182170, | Sep 05 1989 | Board of Regents, The University of Texas System | Method of producing parts by selective beam interaction of powder with gas phase reactant |
5224200, | Nov 27 1991 | The United States of America as represented by the Department of Energy | Coherence delay augmented laser beam homogenizer |
5233460, | Jan 31 1992 | Regents of the University of California, The | Method and means for reducing speckle in coherent laser pulses |
5307207, | Mar 16 1988 | Nikon Corporation | Illuminating optical apparatus |
5315427, | Dec 14 1992 | Xerox Corporation | Pair of binary diffraction optics for use in overfilled raster output scanning systems |
5328785, | Feb 10 1992 | LITEL INTERCONNECT, INC | High power phase masks for imaging systems |
5357365, | Oct 26 1992 | Mitsubishi Denki Kabushiki Kaisha | Laser beam irradiating apparatus enabling uniform laser annealing |
5453814, | Apr 13 1994 | Nikon Precision Inc. | Illumination source and method for microlithography |
5561081, | Feb 04 1993 | Semiconductor Energy Laboratory Co., Ltd. | Method of forming a semiconductor device by activating regions with a laser light |
5591668, | Mar 14 1994 | TOSHIBA MATSUSHITA DISPLAY TECHNOLOGY CO , LTD | Laser annealing method for a semiconductor thin film |
5610733, | Feb 28 1994 | AVAGO TECHNOLOGIES GENERAL IP SINGAPORE PTE LTD | Beam-homogenizer |
5621529, | Apr 05 1995 | General Electric Company | Apparatus and method for projecting laser pattern with reduced speckle noise |
5662410, | Jul 21 1994 | Sony Corporation | Light exposure and illuminating device |
5699191, | Oct 24 1996 | Xerox Corporation | Narrow-pitch beam homogenizer |
5754278, | Nov 27 1996 | Eastman Kodak Company | Image transfer illumination system and method |
5888888, | Jan 29 1997 | ULTRATECH, INC | Method for forming a silicide region on a silicon body |
5956603, | Aug 27 1998 | ULTRATECH, INC | Gas immersion laser annealing method suitable for use in the fabrication of reduced-dimension integrated circuits |
6191887, | Jan 20 1999 | Tropel Corporation | Laser illumination with speckle reduction |
6212012, | Mar 10 1997 | Semiconductor Energy Laboratory Co., Ltd. | Laser optical apparatus |
6265291, | Jan 04 1999 | Advanced Micro Devices, Inc. | Circuit fabrication method which optimizes source/drain contact resistance |
6274488, | Apr 12 2000 | Veeco Instruments INC | Method of forming a silicide region in a Si substrate and a device having same |
6297135, | Jan 29 1997 | ULTRATECH, INC | Method for forming silicide regions on an integrated device |
6300208, | Feb 16 2000 | Veeco Instruments INC | Methods for annealing an integrated device using a radiant energy absorber layer |
6303476, | Jun 12 2000 | Veeco Instruments INC | Thermally induced reflectivity switch for laser thermal processing |
6324195, | Jan 13 1999 | Kaneka Corporation | Laser processing of a thin film |
6348076, | Oct 08 1999 | Cabot Microelectronics Corporation | Slurry for mechanical polishing (CMP) of metals and use thereof |
6365476, | Oct 27 2000 | Veeco Instruments INC | Laser thermal process for fabricating field-effect transistors |
6366308, | Feb 16 2000 | Veeco Instruments INC | Laser thermal processing apparatus and method |
6376806, | May 09 2000 | WAFERMASTERS, INC | Flash anneal |
6383956, | Jun 12 2000 | Veeco Instruments INC | Method of forming thermally induced reflectivity switch for laser thermal processing |
6387803, | Jan 29 1997 | ULTRATECH, INC | Method for forming a silicide region on a silicon body |
6388297, | Apr 12 2000 | Veeco Instruments INC | Structure and method for an optical block in shallow trench isolation for improved laser anneal control |
6420264, | Apr 12 2000 | Veeco Instruments INC | Method of forming a silicide region in a Si substrate and a device having same |
6479821, | Sep 11 2000 | Veeco Instruments INC | Thermally induced phase switch for laser thermal processing |
6495390, | Jun 12 2000 | Veeco Instruments INC | Thermally induced reflectivity switch for laser thermal processing |
6545248, | Mar 16 2001 | Semiconductor Energy Laboratory Co., Ltd.; Ishikawajima-Harima Heavy Industries Co., Ltd. | Laser irradiating apparatus |
6570656, | Apr 10 2000 | Veeco Instruments INC | Illumination fluence regulation system and method for use in thermal processing employed in the fabrication of reduced-dimension integrated circuits |
6577429, | Jan 15 2002 | IMAX Theatres International Limited | Laser projection display system |
6594090, | Aug 27 2001 | IMAX Theatres International Limited | Laser projection display system |
6597430, | May 18 1998 | Nikon Corporation | Exposure method, illuminating device, and exposure system |
6635541, | Sep 11 2000 | Veeco Instruments INC | Method for annealing using partial absorber layer exposed to radiant energy and article made with partial absorber layer |
6635588, | Jun 12 2000 | Veeco Instruments INC | Method for laser thermal processing using thermally induced reflectivity switch |
6645838, | Apr 10 2000 | Veeco Instruments INC | Selective absorption process for forming an activated doped region in a semiconductor |
6717105, | Nov 27 2002 | Trivale Technologies | Laser annealing optical system and laser annealing apparatus using the same |
6728039, | Mar 10 1997 | Semiconductor Energy Laboratory Co., Ltd | Laser optical apparatus |
6747245, | Nov 06 2002 | Veeco Instruments INC | Laser scanning apparatus and methods for thermal processing |
6750424, | Jul 13 1998 | Semiconductor Energy Laboratory Co., Ltd. | Beam homogenizer, laser irradiation apparatus, laser irradiation method, and method of manufacturing semiconductor device |
6777317, | Aug 29 2001 | Veeco Instruments INC | Method for semiconductor gate doping |
6825101, | Mar 27 2000 | Veeco Instruments INC | Methods for annealing a substrate and article produced by such methods |
6844250, | Mar 13 2003 | Veeco Instruments INC | Method and system for laser thermal processing of semiconductor devices |
6849831, | Mar 29 2002 | MATTSON TECHNOLOGY, INC; BEIJING E-TOWN SEMICONDUCTOR TECHNOLOGY, CO , LTD | Pulsed processing semiconductor heating methods using combinations of heating sources |
6936505, | May 20 2003 | Intel Corporation | Method of forming a shallow junction |
6951996, | Mar 29 2002 | MATTSON TECHNOLOGY, INC; BEIJING E-TOWN SEMICONDUCTOR TECHNOLOGY, CO , LTD | Pulsed processing semiconductor heating methods using combinations of heating sources |
6956878, | Feb 07 2000 | Silicon Light Machines Corporation | Method and apparatus for reducing laser speckle using polarization averaging |
6982476, | Feb 02 2001 | SanDisk Technologies LLC | Integrated circuit feature layout for improved chemical mechanical polishing |
6987240, | Apr 18 2002 | Applied Materials, Inc | Thermal flux processing by scanning |
7005601, | Apr 18 2002 | Applied Materials, Inc | Thermal flux processing by scanning |
7097709, | Nov 27 2002 | Mitsubishi Denki Kabushiki Kaisha | Laser annealing apparatus |
7098155, | Sep 29 2003 | Veeco Instruments INC | Laser thermal annealing of lightly doped silicon substrates |
7105048, | Nov 30 2001 | SEMICONDUCTOR ENERGY LABORATORY CO , LTD | Laser irradiation apparatus |
7135392, | Jul 20 2005 | Applied Materials, Inc. | Thermal flux laser annealing for ion implantation of semiconductor P-N junctions |
7145104, | Feb 26 2004 | ULTRATECH, INC | Silicon layer for uniformizing temperature during photo-annealing |
7154066, | Nov 06 2002 | ULTRATECH, INC | Laser scanning apparatus and methods for thermal processing |
7157660, | Nov 06 2002 | Veeco Instruments INC | Laser scanning apparatus and methods for thermal processing |
7276457, | Oct 01 2003 | WaferMasters, Inc. | Selective heating using flash anneal |
7319056, | May 28 1996 | The Trustees of Columbia University in the City of New York | Methods for producing uniform large-grained and grain boundary location manipulated polycrystalline thin film semiconductors using sequential lateral solidification |
20010039098, | |||
20020067918, | |||
20020111043, | |||
20030040130, | |||
20030138988, | |||
20030146458, | |||
20040108588, | |||
20040115793, | |||
20050139961, | |||
20060102607, | |||
20060222041, | |||
20070032004, | |||
EP206764, | |||
WO2005104265, |
Executed on | Assignor | Assignee | Conveyance | Frame | Reel | Doc |
Jul 25 2006 | Applied Materials, Inc. | (assignment on the face of the patent) | / | |||
Jul 27 2006 | MAYUR, ABHILASH J | Applied Materials, Inc | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 018298 | /0825 | |
Jul 28 2006 | BALAKRISHNA, AJIT | Applied Materials, Inc | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 018298 | /0825 | |
Jul 28 2006 | YAM, MARK | Applied Materials, Inc | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 018298 | /0825 | |
Jul 30 2006 | JENNINGS, DEAN | Applied Materials, Inc | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 018298 | /0825 | |
Jul 31 2006 | CAREY, PAUL | Applied Materials, Inc | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 018298 | /0825 | |
Aug 01 2006 | SCHAFFER, WILLIAM | Applied Materials, Inc | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 018298 | /0825 | |
Sep 05 2006 | MOFFATT, STEPHEN | Applied Materials, Inc | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 018298 | /0825 |
Date | Maintenance Fee Events |
Jan 25 2013 | M1551: Payment of Maintenance Fee, 4th Year, Large Entity. |
Jan 26 2017 | M1552: Payment of Maintenance Fee, 8th Year, Large Entity. |
Sep 22 2020 | M1553: Payment of Maintenance Fee, 12th Year, Large Entity. |
Date | Maintenance Schedule |
Aug 04 2012 | 4 years fee payment window open |
Feb 04 2013 | 6 months grace period start (w surcharge) |
Aug 04 2013 | patent expiry (for year 4) |
Aug 04 2015 | 2 years to revive unintentionally abandoned end. (for year 4) |
Aug 04 2016 | 8 years fee payment window open |
Feb 04 2017 | 6 months grace period start (w surcharge) |
Aug 04 2017 | patent expiry (for year 8) |
Aug 04 2019 | 2 years to revive unintentionally abandoned end. (for year 8) |
Aug 04 2020 | 12 years fee payment window open |
Feb 04 2021 | 6 months grace period start (w surcharge) |
Aug 04 2021 | patent expiry (for year 12) |
Aug 04 2023 | 2 years to revive unintentionally abandoned end. (for year 12) |