A method of correcting phase error of a phase shift keyed (PSK) signal includes (a) receiving a signal modulated by a spreading sequence; (b) despreading the received signal using a receiver spreading sequence similar to the spreading sequence of step (a); (c) calculating a crosscorrelation profile between the receiver spreading sequence and the received signal; and (d) calculating an autocorrelation profile of the receiver spreading sequence to determine a spreading code property (scp). The method also includes (e) estimating a timing error in alignment between the autocorrelation and the crosscorrelation profiles; and (f) correcting a phase error of the signal despread in step (c), by using the scp and the estimated timing error.
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1. In a receiver, a method of correcting phase error of a phase shift keyed (PSK) signal, comprising the steps of:
(a) receiving a signal modulated by a spreading sequence;
(b) despreading the received signal using a receiver spreading sequence similar to the spreading sequence of step (a);
(c) calculating a crosscorrelation profile between the receiver spreading sequence and the received signal;
(d) calculating an autocorrelation profile of the receiver spreading sequence to determine a spreading code property (scp);
(e) estimating a timing error in alignment between the autocorrelation and the crosscorrelation profiles; and
(f) correcting a phase error of the signal despread in step (c), by using the scp and the estimated timing error.
18. A receiver comprising
a despreading module for despreading a baseband signal, using a spreading sequence generated by a code generator,
a crosscorrelation module for calculating a crosscorrelation profile between the baseband signal and the spreading sequence,
an autocorrelation module for calculating an autocorrelation profile of the spreading sequence to determine a scp value of the spreading sequence,
an error timing estimating module, coupled to the crosscorrelation and autocorrelation modules, for estimating an alignment error between the autocorrelation profile and the crosscorrelation profile, and
a phase correction module, coupled to the error timing estimating module and the despreading module, for correcting a phase error in the despread baseband signal; wherein the phase correction module is configured to extract phase error correction values from a look-up-table (LUT),
the LUT including the phase error correction values based on scp values and alignment errors between the autocorrelation and crosscorrelation profiles.
2. The method of
step (a) includes:
demodulating the received signal with a carrier signal to form a baseband signal,
sampling the baseband signal at a rate greater than the chip rate, and
step (b) includes:
despreading the baseband signal at a rate that is the same as the chip rate.
3. The method of
demodulating includes forming inphase (I) and quadrature (Q) baseband signals, and
despreading includes despreading the I and Q baseband signals using only one receiver spreading sequence.
4. The method of
between step (a) and step (b) the following steps are performed:
phase rotating the received signal to form serially demodulated I and Q baseband signals, each sampled at a rate greater than the chip rate,
reducing the sampled I and Q baseband signals by at least a factor of ½ to form decimated I and Q baseband signals, each sampled at the chip rate, and
despreading the decimated I and Q baseband signals using the receiver spreading sequence at the chip rate.
5. The method of
despreading the decimated I and Q baseband signals is performed using a single receiver spreading sequence.
6. The method of
step (a) includes demodulating the received signal to form I and Q baseband signals, and
step (c) includes separately crosscorrelating the I and Q baseband signals with a sequence of chips of the receiver spreading sequence to form an I correlated signal and a Q correlated signal.
7. The method of
the I and Q correlated signals are summed to form the crosscorrelation profile.
8. The method of
prior to summing, the I and Q correlated signals are individually squared.
9. The method of
step (d) includes time shifting the receiver spreading sequence against the same receiver spreading sequence by a maximum time of two chip periods of the receiver spreading sequence.
11. The method of
the received signal includes data symbols, each symbol including an integer number of chips, and
step (d) includes determining the scp for at least one symbol.
12. The method of
13. The method of
step (e) includes the steps of:
locating a peak value of the crosscorrelation profile as COR (nTc), where Tc is a chip period and n is a sample number;
determining a value of a sample of the crosscorrelation profile after the peak value, as COR ([n+1]Tc) and a value of another sample of the crosscorrelation profile before the peak value, as COR ([n−1]Tc); and
using the values of COR (nTc), COR ([n−1]Tc) and COR ([n+1]Tc) to estimate the timing error.
14. The method of
an estimated timing error, estimated in step (e), and the scp, determined in step (d), are used to select a phase error stored in a look-up-table (LUT), and
step (f) uses the selected phase error to correct the phase error of the signal despread in step (c).
15. The method of
step (f) includes using values of degrees, or values of sine/cosine terms, stored in a look-up-table (LUT) to correct the phase error of the signal despread in step (c).
16. The method of
step (b) includes despreading the received signal into a despread I and Q baseband signals, and
step (f) includes correcting the phase error of the despread I and Q baseband signals using values of sine and cosine terms stored in a look-up-table (LUT) to form phase corrected I and Q symbols for quadrature PSK (QPSK) detection.
17. The method of
the received signal includes one of QPSK, differential QPSK, QBL-MSK, 8-PSK, differential 8-PSK, π/4-QPSK, differential π/4-QPSK, BPSK, or differential BPSK.
19. The receiver of
a demodulator for mixing a carrier signal with a received signal, including a chipping rate of pulses, to form a demodulated signal,
an analog-to-digital converter (ADC) configured to sample the demodulated signal, at a sampling rate greater than the chipping rate, to form a sampled signal,
a phase rotator for phase rotating the sampled signal to form a serially demodulated signal at the same sampling rate, and
a decimator for reducing the sampling rate of the serially demodulated signal to form the baseband signal.
20. The receiver of
the same spreading sequence is used to despread the baseband I and Q signals.
21. The receiver of
the phase correction module includes multipliers for multiplying the despread baseband signal with sine and cosine values extracted from the (LUT).
22. The receiver of
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This application claims priority of U.S. Provisional Patent Application Ser. No. 60/703,316, filed Jul. 28, 2005.
This invention was made with Government Support Under Agreement No. DAAB07-03-9-K601 awarded by the United States Army. The Government has certain rights in the invention.
The present invention relates, in general, to communication systems. More specifically, it relates to enhanced QPSK or DQPSK data demodulation for direct sequence spreading (DSS) system waveforms using orthogonal or near-orthogonal spreading sequences.
Quadrature Phase Shift Keying (QPSK) data modulation is used to increase the data rate capability over Binary Phase Shift Keying (BPSK) data modulation. To improve data performance in multi-path channel conditions and to reduce the transmit power spectral density, direct sequence spreading is applied to the data modulation. Differential data detection is performed to simplify the demodulation process, resulting in differential QPSK (DQPSK) reception. The existing 802.11b waveform provides both DBPSK and DQPSK data modulation using a BPSK signal for the direct sequence spreading to provide 1 and 2 Mbps data capability.
To achieve the 1 and 2 Mbps data rates, 11 chips are used to spread the data modulated signal. An 11 chip Barker sequence is used for the spreading sequence. The 11 chip Barker sequence possesses excellent autocorrelation properties, providing a maximum correlation sidelobe level of 1/11 the peak correlation value. To achieve this excellent correlation property on each data symbol, the same 11 chip Barker sequence is used to spread each data symbol.
As an alternative to using short repeated sequences, BPSK modulation may be used to spread the data. BPSK provides a simple straight forward means to spread either the BPSK or QPSK data. To meet the 802.11 spectral requirements, the BPSK spread signal is passed through a lowpass filter to reduce the power spectrum sidelobe level. The filtered BPSK signal is operated within the linear region of the power amplifier to minimize spectral regrowth output from the RF power amplifier.
There are, however, some limitations to using the aforementioned techniques. First, waveforms using short spreading sequences, such as the 11 chip Barker sequence used for 802.11b waveforms, limit the delay spread range for channel multi-path equalization, because two adjacent symbols can be opposite in polarity. Further, short, repeated, spreading sequences also enable unauthorized listeners to easily recover the data symbol stream. Longer sequences remove these limitations. However, longer spreading sequences do not provide excellent autocorrelation properties across short sections (11 chips for the 802.11b waveforms) of the spreading sequence. Degradation in the autocorrelation property directly degrades the bit-error-rate (BER) system performance.
Second, BPSK spreading waveforms limit power efficiency at the RF power amplifier, because they require the amplifier to operate in a linear mode to prevent spectral sidelobe regrowth. Spreading data using constant envelope modulation signals, like Minimum Shift Keying (MSK) or near constant envelope modulation, like Quasi-bandlimited MSK (QBL-MSK) and Raised Cosine filtered Offset Quadrature Phase Shift Keying (RC-OQPSK), however, enable the RF power amplifier to operate in the nonlinear mode, increasing power efficiency.
Standard parallel demodulation techniques for MSK, QBL-MSK, and RC-OQPSK despread the signal using independent I and Q sequences, and require two orthogonal or near orthogonal spreading sequences. Gold codes are typically used because of their good autocorrelation and cross-correlation properties. However, Gold codes also require, at minimum, 31 chips (lowest length Gold code) of spreading on both the I and Q data, and increasing the number of chips results in a reduced data rate for the same operational chip rate. To reduce the number of spreading chips required for these constant or near constant envelope modulation signals, serial formatting is applied to the spreading waveform. Serial formatting combined with serial demodulation enables these waveforms to be demodulated similarly to BPSK.
For a serial despread MSK, QBL-MSK, or RC-OQPSK signal, the repeating 11 chip Barker sequence can be used for the spreading sequence. Autocorrelation properties for the 11 chip Barker sequence are excellent, providing suppression of the undesired serial demodulation term. To avoid the limitations associated with the short spreading sequence, a longer spreading sequence is used. As described previously, longer spreading sequences do not provide excellent autocorrelation properties across short sections (11 chips for the 802.11b waveforms) of the spreading sequence. The poor autocorrelation properties associated with the long spreading sequence result in the undesired serial demodulation term not being suppressed.
A BER performance curve with a maximum of a quarter chip timing error (sampling at twice the chip rate) for DQPSK data modulations with QBL-MSK spreading for a short 8 chip Neuman-Hoffman sequence (00001101) is shown in
The BER performance curve with a maximum of a quarter chip timing error (sampling at twice the chip rate) for DQPSK data modulations with QBL-MSK spreading for a long, random spreading sequence is shown in
To minimize demodulator complexity and power consumption, the present invention provides a compensation approach, among other features.
To meet this and other needs, and in view of its purposes, the present invention provides a method of correcting phase error of a phase shift keyed (PSK) signal, in a receiver. The method includes the steps of (a) receiving a signal modulated by a spreading sequence; (b) despreading the received signal using a receiver spreading sequence similar to the spreading sequence of step (a); (c) calculating a crosscorrelation profile between the receiver spreading sequence and the received signal; (d) calculating an autocorrelation profile of the receiver spreading sequence to determine a spreading code property (SCP); (e) estimating a timing error in alignment between the autocorrelation and the crosscorrelation profiles; and (f) correcting a phase error of the signal despread in step (c), by using the SCP and the estimated timing error.
Another embodiment of the present invention provides a method of serially demodulating a phase shift keyed (PSK) signal, in a receiver. The method includes (a) receiving a PSK signal modulated by a spreading sequence at a chip rate; (b) dividing the PSK signal into an inphase (I) signal and a quadrature (Q) signal at a sampling rate greater than the chip rate; (c) rotating phases of the I signal and the Q signal at the sampling rate of step (b) to obtain serially demodulated I and Q signals; (d) determining chip synchronization time for the serially demodulated I and Q signals; (e) decimating the serially demodulated I and Q signals, based on the determined chip synchronization time, so that the serially demodulated I and Q signals are sampled at the chip rate; and (f) despreading both the decimated I and Q signals by mixing both the decimated I and Q signals with a single spreading sequence.
Yet another embodiment of the invention is a receiver. The receiver includes a despreading module for despreading a baseband signal, using a spreading sequence generated by a code generator, a crosscorrelation module for calculating a crosscorrelation profile between the baseband signal and the spreading sequence, an autocorrelation module for calculating an autocorrelation profile of the spreading sequence to determine a SCP value of the spreading sequence. The receiver also includes a timing error estimating module, coupled to the crosscorrelation and autocorrelation modules, for estimating an alignment error between the autocorrelation profile and the crosscorrelation profile; and a phase correction module, coupled to the timing error estimating module and the despreading module, for correcting a phase error in the despread baseband signal.
It is understood that the foregoing general description and the following detailed description are exemplary, but are not restrictive, of the invention.
The invention is best understood from the following detailed description when read in connection with the accompanying drawing. Included in the drawing are the following figures:
To enable operation of a serial demodulator with long spreading sequences, the serial demodulator spreading operation takes advantage of knowing the long spreading sequence. The spreading properties for the long spreading sequence are determined for each short spreading sequence used to despread the data. By knowing the spreading sequence property for the despread data symbol along with an estimate of the chip timing error from the synchronization correlation function, a proper phase correction is applied to the despread I and Q signals, significantly reducing the undesired serial demodulation term.
It will be understood that as used herein, a “summer” includes functions of addition and subtraction.
Removing the undesired serial demodulation term results in significant improvement in the bit rate error (BER) performance.
An embodiment of the present invention uses serial QBL-MSK for spreading modulation to provide near constant RF envelope modulation and to enable use of serial despreading. Although QBL-MSK is selected as the spreading waveform for this particular embodiment, other constant or near constant envelope modulations, such as MSK, Gaussian MSK, OQPSK, and RC-OPSK may be used.
Serial despreading, as opposed to parallel despreading, utilizes a simplified BPSK despreading operation and separates despreading into inphase (I) and quadrature (Q) codes. Serial despreading reduces the chip to symbol rate to 8 chips per symbol. Lower spreading ratios, such as 8 chips/symbol, are desirable for obtaining higher data rates when the communications channel can support it. For BPSK or QPSK data modulation on SQBL-MSK, a spread modulation waveform may be written as follows:
where Tc represents the chip period, ci represents the chip at time iTc, 2M is the number of chips per data symbol in the modulated signal, p(t) is the QBL pulse-shaping function, fo is the carrier center frequency, and the (−1)i terms, which multiply the chip value, represent the serial formatting. The chips (ci), which spread the data modulated symbols (BPSK or QPSK), are either +1 or −1.
The data modulation (BPSK or QPSK), represented by the θk carrier phase term, is either 0 or π for BPSK data modulation and −0.5π, 0, 0.5π, or π for QPSK data modulation. Applying differential encoding to the BPSK or QPSK data modulation does not impact this equation, only the mapping to the carrier phase term given by the following equation:
where Δθ is the phase change introduced by the differential encoding.
For BPSK data modulation, the SQBL-MSK spreading signal is not impacted by the data modulation. For QPSK data modulation, however, the SQBL-MSK spreading signal is impacted by the data modulation at the symbol boundary conditions when either a −0.5π (−90 degree) or 0.5π (90 degree) phase change between symbols occurs. Two different 90 degree phase change boundaries associated with QPSK data modulation, where the past QPSK symbol is at 0 degrees and the present QPSK symbol is at 90 degrees, may be examined to show two significantly different RF envelope effects. Severe RF envelope distortion is shown in
As shown in
s(t)=x(t)cos(2πfot)+y(t)sin(2πfot).
Transmitter 30 transmits an RF modulated signal s(t). The RF modulated signal s(t) is then received by receiver 40 shown in
The equations for the I {x(t)} and Q {y(t)} signals modulating the carrier may be obtained from equation 1 as follows:
Since the data symbol phase for QPSK or DQPSK is equal to −90, 0, 90, or 180 degrees over each symbol period, either the even spreading sequence chips are on I with the odd chips on Q (0 and 180 degree symbol conditions) or the odd spreading sequence chips are on I with the even chips on Q (−90 and 90 degree symbol conditions).
The QBL-MSK chip matched filter coefficients are based on the QBL-MSK pulse-shaping function defined by:
where Tc corresponds to the chip or symbol period.
Since the QBL-MSK pulse-shaping function is non-zero over a four chip period interval, the digital QBL-MSK chip matched filter operating at twice the chip rate may include 9 samples, defined by the following equation:
Recognizing that the filter value for k equal to 0 and 8 is zero, the digital QBL-MSK chip matched filter response may be simplified to 7 samples, as defined by the following equation:
Convolution of the QBL-MSK chip pulse shape with the QBL-MSK chip matched filter results in a QBL-MSK autocorrelation function {g(t)}.
Using the QBL-MSK autocorrelation function {g(t)}, the I and Q signals, shown in
where φ is the carrier phase error and θk is the phase introduced by data symbol modulation.
Thus, the present invention enables despreading of both the I and Q signals using the same spreading sequence, eliminating the requirement of separating the spreading sequence into even and odd chips, as required by parallel despreaders. As shown in
The two samples per chip I and Q signals output from the phase rotator are sent to the SYNC detection module shown in
The despread I and Q signals are then accumulated, over the data symbol period, which may consist of 2M chips per symbol, for example, by accumulators 70 and 72. In this example, with 8 chips per symbol, M is equal to 4, which corresponds to 4 even and 4 odd chips per symbol. Switches 74 and 76 are closed at the symbol rate, kTs, providing the detected I and Q symbol signals. The detected symbols are sent to the phase correction module shown in
The phase rotator module shown in
The serial I {sx(n)} and Q {sy(n)} signals output from the phase rotator for N samples per chip are related to the input I {x2(n)} and Q{y2(n)} signals by the following complex equation:
As shown by this equation, the phase rotator provides a rotating exponential vector at the desired frequency −0.25*Rc, represented by the exponential term. Since Rc·Tc=1, the equation for the serial I and Q signal output from the phase rotator may be rewritten, as follows, for N equal to 2:
When the present invention uses a receiver sampling rate equal to twice the chip rate, the rotating vector changes by −45 degrees for each sample. For a receiver with a sampling rate equal to the chip rate, the rotating exponential vector changes by −90 degrees for each sample. For N=1, the phase rotator operation requires only a +1, or −1 multiplication operation on the I and Q input signals, followed by a mapping module to the appropriate I or Q output. This phase rotator structure may easily be implemented in hardware.
The present invention may use a sampling rate that is twice the data rate, corresponding to N=2. For N=2, the phase rotator for even samples is the is same as described for N=1. Odd samples require a 0.7071 or −0.7071 multiplication along with an addition operation, which results in a more complicated phase rotator structure.
Since the serial I and Q signals output from the phase rotator are decimated by 2 before despreading by selecting either the even or odd samples, the same phase rotation may be applied to both the even and odd samples. The present invention simplifies the phase rotator module for N=2 by introducing a phase term, as shown in the following equation:
where INT represents a function that takes only the integer value of its argument. Separating the samples into even and odd samples results in the following two equations:
Comparing the modified phase rotator of equations 14 and 15 to the phase rotator shown in
As shown in
The modified phase rotator 60B provides a repetitive mapping structure of 8 samples on both the serial I and Q signals, as shown below:
sx(0.5nTc)={x2(0), x2(0.5Tc), y2(Tc), y2(1.5Tc), −x2(2Tc), −x2(2.5Tc), −y2(3Tc), −y2(3.5Tc), . . . } (eqn 16)
and
sy(0.5nTc)={y2(0), y2(0.5Tc), −x2(Tc), −x2(1.5Tc), −y2(2Tc), −y2(2.5Tc), x2(3Tc), x2(3.5Tc), . . . }. (eqn 17)
Following the phase rotator operation is the sample rate reduction by decimator 62 of
The SYNC detection operation used to determine the proper timing will now be described with reference to
Reduction in the complexity of the SYNC detection I and Q correlators is achieved by decimating the I and Q samples by a factor of 2. Decimation reduces the I and Q sampling rate so that it equals the chip rate. This decimation is achieved by selecting either the even or odd samples to be sent to the SYNC detection.
As shown in
The chip sliding correlators 120 and 142 for the input I and Q signals, as exemplified in
As shown in
Typically, the correlation output is selected by switch 152, because it may be easily implemented with the following approximation:
where Max{ } is the maximum value of its two arguments, Min{ } is the minimum value of its two arguments, and Mag[ ] is the magnitude of its argument.
The signal used as an input signal to peak detection module 154, for each of the two different correlation outputs are shown in
Since the correlation response is different depending on the input signal, the time error estimation is also dependent on which input signal is used. By comparing the amplitude of three adjacent samples, peak detection module 154 determines if a peak has occurred at the center sample. If the center sample is declared to be a peak, the magnitude of that sample (peak sample) is compared to the SYNC threshold by SYNC detection comparison module 156. If the magnitude of the peak sample is greater than the SYNC threshold, SYNC is declared by the SYNC detect signal sent to sample timing selection module 162.
SYNC determines the time location of the first chip and whether even or odd samples are processed in the despreader. If the SYNC process is operated at twice the chip rate, a SYNC point within ±0.25●Tc is determined directly by the peak detection. For the SYNC process operating at the chip rate, the SYNC detection point along with the correlation profile is used to establish the SYNC point within a resolution of ±0.25●Tc, as described below.
Using the correlation output based on the QBL-MSK autocorrelation response of
The timing error estimate provided by estimate timing error module 160, shown in
These seven different correlation conditions are further processed using the following three digital relationships:
Y1=X2 OR X3, (eqn 26)
Y2=X4 OR X5, (eqn 27)
and
Y3=X6 OR X7. (eqn 28)
The four phase correction parameters X1, Y1, Y2, and Y3 are sent to phase correction table 186, shown in
It will be understood that SYNC establishes initial timing for the despreading and demodulation processes. To maintain timing throughout the waveform, either chip tracking or serial probes may be used. Chip tracking uses early, late, and on-time despreading to estimate the timing error and perform the proper timing correction. For the chip tracking implementation, information from the early, late, and on-time despreaders may also be used to provide the timing error estimation to the phase correction module.
The serial probe approach is easily implemented, since it is performed in the same manner as SYNC detection process shown in
During SYNC detection, a correlation profile based on peak correlation levels are determined about the SYNC point established by correlation memory module 158. The time interval over which this profile is generated is referred to as the multi-path window. Based on magnitude peak level of the correlation profile, multi-path RAKE taps are selected with chip timing and timing error estimation for the phase correction module for each tap.
Returning now to
A general description of the phase error correction process, implemented by the present invention, will now be described. The serial I and Q outputs from phase rotator 60 and decimator 62 may be rewritten as follows:
where ΔTc is the timing error (±Tc/4 maximum) not removed by the SYNC timing correction when, selecting the even or odd samples, based on timing selection module 162 of
From these expressions, two key features of serial demodulation may be seen. First, the serial formatting factor (−1)i shown in the modulation equation (eqn 1) is removed. Second, the I and Q baseband signals consist of the filtered spreading sequence multiplied by either a cosine or sine weighting function. For coherent detection, the cosine weighted filtered spreading sequence is the desired term on both the I and Q signals.
The QBL-MSK autocorrelation function is nonzero for ±2.5 Tc about the ideal SYNC time of zero (see
Similarly, the sine weighting function forces the QBL-MSK autocorrelation function to zero at times −Tc+ΔTc, ΔTc, and 2Tc+ΔTc, so only the QBL-MSK terms at −Tc+ΔTc and Tc+ΔTc are considered for each sine-weighted QBL-MSK autocorrelation chip response. Using this information, the equations for the serial I and Q signal may be rewritten as follows:
where δ(n) is the unit impulse function, which is equal to 1 for n equal to zero and equal to 0 for all other values of n. Despreading the serial I and Q signals and accumulating over a symbol, results in the following equation for the despread I and Q symbol signals:
These equations show that the cross-correlation properties of the spreading sequence across the signal impact both the despread I and Q symbol signals. As shown in these equations, the spreading code property for 1 and 2 chip delay cross-correlation property for the 2M chips impact the despread I and Q signals. Detecting the first symbol and dropping the cross symbol spreading terms results in the following equations for the first despread I and Q symbol signals:
These equations show that the spreading sequence properties and the chip timing error, which impacts the αn terms, affect the magnitude and phase of the despread I and Q symbol signals. The 2 chip delay cross-correlation for the spreading sequence reduces the magnitude of the desired term on both the I and Q signals. The 1 chip delay cross-correlation for the spreading sequence introduces a phase shift since it is orthogonal to the desired term on both the I and Q signals. From
Computer simulation results for 8 chips per symbol (M=4) verified that the α−2 and α2 terms may be dropped without significant degradation in performance. Therefore, the phase correction process used by the present invention is based on only the α−1 and α1 terms. In another embodiment, however, this phase correction process may be easily modified to incorporate the α−2 and α2 terms.
Using only the α−1 and α1 terms (assuming α0 is approximately 1) in this exemplary embodiment reduces the despread first I and Q symbol signals to the following:
Applying the first symbol I and Q equations to the despread I and Q symbol signals results in the following equations for the despread I and Q symbol signals:
The phase term γ(k) represents the phase shift produced by the chip timing error and the spreading sequence property. Referring now to
As shown, the despread I and Q signals are first phase corrected using the spreading code property (SCP) and the chip timing error estimate for the SYNC/serial probe function. For QPSK data modulation, the detected I and Q symbols are obtained directly from the I and Q output of phase correction module 171. This assumes that coherent carrier phase tracking is performed on the signal to remove carrier frequency error and phase error. For DQPSK data modulation, differential detection is performed by differential detection module 182 to recover the I and Q symbols. DQPSK demodulation does not require the carrier frequency and phase tracking needed for QPSK.
Phase correction module 171 uses spreading code property (SCP) and chip timing estimates to determine the proper phase correction term. The spreading code property (SCP) is determined at spreading sequence autocorrelation determination module 184 by generating a 1 chip delay cross-correlation property for the 2M chips used to spread the symbol. For symbol k, the spreading code property is the following:
where the chip values (ci) equal −1 or +1 and the spreading is 2M chips per symbol as shown in
The spreading code property {SCP(k)} determined at module 184 along with the chip timing error information {X1, Y1, Y2, and Y3} from the SYNC/serial probe function of
As an example, for 8 chips per symbol spreading, for a given symbol k, the value of SCP(k) takes on the value of −7, −5, −3, −1, 1, 3, 5, or 7. Using the spreading code property value for each symbol along with the chip timing estimation {X1, Y1, Y2, and Y3}, the proper phase correction for the symbol is selected based on a look up table, such as TABLE 1, designated as correction table 186 in
The phase corrected I and Q symbol signals {Ic(k) and Qc(k)} are given by the following equations:
As these equations show, if γ1(k) equals γ(k), the phase error term goes to zero. Since phase correction table 186 has finite values, there is a small phase error term as shown in the improved BER performance curve of
Implementation of the phase correction for each symbol is performed by phase correction module 171 using phase rotators, as shown in
Returning to
After phase correction, the I and Q data symbols are determined. For QPSK data modulation, the detected I and Q symbols are obtained directly from the I and Q outputs of phase correction module 171. This assumes that coherent carrier phase tracking is performed on the signal to remove carrier frequency error and phase error (φ given in equations 48 and 49). The corrected I and Q symbol signals {Ic(k) and Qc(k)} are each independently compared against zero to determine if a +1 (logic 0) or −1 (logic 1) was received for that corresponding symbol. For DQPSK demodulation, the corrected I and Q symbol signals {Ic(k) and Qc(k)} are processed by DQPSK differential detector 182 to determine the detected I and Q symbol signals {Id(k) and Qd(k)}. The I and Q detected symbol signals output from the differential detector are each independently compared against zero to determine if a +1 (logic 0) or −1 (logic 1) was received for that corresponding symbol.
In summary, an aspect of the present invention reduces the BER performance degradation associated with QPSK or DQPSK data modulation on serial direct sequence spread waveforms, such as QBL-MSK, by providing a phase correction term based on the spreading sequence property and an estimate of the chip timing error. The phase correction term may also be used to enhance QPSK or DQPSK data detection for receivers operating at a sampling rate equal to the chip rate or for receivers operating at sampling rates greater than twice the chip rate. Operation at different sampling rates simply requires an appropriate change in the phase correction table.
The phase correction process described herein for QPSK/DQPSK may be expanded to include higher orders of phase modulation, such as 8-PSK and Differential 8-PSK. Also, the phase correction technique may be used to reduce the BER performance degradation associated with using π/4-QPSK or differential π/4-QPSK data modulation on a serial direct sequence spread waveform, such as QBL-MSK.
In addition to enabling changes to the data modulation type, the phase correction process may be used by applying serial formatting to other quadrature spreading modulation waveforms, such as Offset Quadrature Phase Shift Keying (OQPSK), Minimum Shift Keying (MSK), Gaussian MSK, Tamed Frequency Modulation (TFM), Intersymbol Jitter Free Offset Quadrature Phase Shift Keying (IJF-OQPSK), Raised Cosine Filtered Offset Quadrature Phase Shift Keying (RC-OQPSK), and bandwidth efficient Continuous Phase Modulation (CPM) schemes.
For other similar and non-similar disclosures, please refer to the following five applications filed on the same day as this application. These five applications are TBD (and, respectively, correspond to the following five provisional applications 60/703,180; 60/703,179; 60/703,373; 60/703,320 and 60/703,095). These applications are all incorporated herein by reference in their entireties.
Although illustrated and described herein with reference to certain specific embodiments, the present invention is nevertheless not intended to be limited to the details shown. Rather, various modifications may be made in the details within the scope and range of equivalents of the claims and without departing from the spirit of the invention.
TABLE 1
Correction Phase (degrees) for Different Spreading Code Properties
Correction Phase (degrees) for the
Y1 = X2
Y2 = X4
Y3 = X6
Different 1*Tc Delay Summation Values
ΔTc
X1
OR X3
OR X5
OR X7
7
5
3
1
−1
−3
−5
−7
−0.5000
0
1
1
0
−5
−3
−2
0
0
2
3
5
−0.4375
0
1
1
0
−5
−3
−2
0
0
2
3
5
−0.3750
0
1
0
0
−15
−10
−5
−2
2
5
10
15
−0.3125
0
1
0
0
−15
−10
−5
−2
2
5
10
15
−0.2500
0
1
0
0
−15
−10
−5
−2
2
5
10
15
−0.1875
0
0
0
1
15
10
5
2
−2
−5
−10
−15
−0.1250
0
0
0
1
15
10
5
2
−2
−5
−10
−15
−0.0625
0
0
0
0
5
3
2
0
0
−2
−3
−5
0.0000
0
0
0
0
5
3
2
0
0
−2
−3
−5
0.0625
1
0
0
0
−5
−3
−2
0
0
2
3
5
0.1250
1
0
0
1
−15
−10
−5
−2
2
5
10
15
0.1875
1
0
0
1
−15
−10
−5
−2
2
5
10
15
0.2500
1
1
0
0
15
10
5
2
−2
−5
−10
−15
0.3125
1
1
0
0
15
10
5
2
−2
−5
−10
−15
0.3750
1
1
0
0
15
10
5
2
−2
−5
−10
−15
0.4375
1
1
1
0
5
3
2
0
0
−2
−3
−5
0.5000
1
1
1
0
5
3
2
0
0
−2
−3
−5
TABLE 2
Correction Phase (Simplified Cosine Terms) for Different Spreading Code Properties
Simplified Cosine Phase Correction Term for the
Chip Timing
Y1 = X2
Y2 = X4
Y3 = X6
Different Spreading Code Properties
ΔTc
X1
OR X3
OR X5
OR X7
7
5
3
1
−1
−3
−5
−7
−0.5000
0
1
1
0
1
1
1
1
1
1
1
1
−0.4375
0
1
1
0
1
1
1
1
1
1
1
1
−0.3750
0
1
0
0
0.96875
0.984375
1
1
1
1
0.984375
0.96875
−0.3125
0
1
0
0
0.96875
0.984375
1
1
1
1
0.984375
0.96875
−0.2500
0
1
0
0
0.96875
0.984375
1
1
1
1
0.984375
0.96875
−0.1875
0
0
0
1
0.96875
0.984375
1
1
1
1
0.984375
0.96875
−0.1250
0
0
0
1
0.96875
0.984375
1
1
1
1
0.984375
0.96875
−0.0625
0
0
0
0
1
1
1
1
1
1
1
1
0.0000
0
0
0
0
1
1
1
1
1
1
1
1
0.0625
1
0
0
0
1
1
1
1
1
1
1
1
0.1250
1
0
0
1
0.96875
0.984375
1
1
1
1
0.984375
0.96875
0.1875
1
0
0
1
0.96875
0.984375
1
1
1
1
0.984375
0.96875
0.2500
1
1
0
0
0.96875
0.984375
1
1
1
1
0.984375
0.96875
0.3125
1
1
0
0
0.96875
0.984375
1
1
1
1
0.984375
0.96875
0.3750
1
1
0
0
0.96875
0.984375
1
1
1
1
0.984375
0.96875
0.4375
1
1
1
0
1
1
1
1
1
1
1
1
0.5000
1
1
1
0
1
1
1
1
1
1
1
1
TABLE 3
Correction Phase (Simplified Sine Terms) for Different Spreading Code Properties
Chip
Simplified Sine Phase Correction Term for the
Timing
Y2 = X4
Y3 = X6
Different Spreading Code Properties
ΔTc
X1
Y1 = X2 OR X3
OR X5
OR X7
7
5
3
1
−1
−3
−5
−7
−0.5000
0
1
1
0
−0.09375
−0.0625
−0.03125
0
0
0.03125
0.0625
0.09375
−0.4375
0
1
1
0
−0.09375
−0.0625
−0.03125
0
0
0.03125
0.0625
0.09375
−0.3750
0
1
0
0
−0.25
−0.1875
−0.09375
0.03125
0.03125
0.09375
0.1875
0.25
−0.3125
0
1
0
0
−0.25
−0.1875
−0.09375
−0.03125
0.03125
0.09375
0.1875
0.25
−0.2500
0
1
0
0
−0.25
−0.1875
−0.09375
−0.03125
0.03125
0.09375
0.1875
0.25
−0.1875
0
0
0
1
0.25
0.1875
0.09375
0.03125
−0.03125
−0.09375
−0.1875
−0.25
−0.1250
0
0
0
1
0.25
0.1875
0.09375
0.03125
−0.03125
−0.09375
−0.1875
−0.25
−0.0625
0
0
0
0
0.09375
0.0625
0.03125
0
0
−0.03125
−0.0625
−0.09375
0.0000
0
0
0
0
0.09375
0.0625
0.03125
0
0
−0.03125
−0.0625
−0.09375
0.0625
1
0
0
0
−0.09375
−0.0625
−0.03125
0
0
0.03125
0.0625
0.09375
0.1250
1
0
0
1
−0.25
−0.1875
−0.09375
−0.03125
0.03125
0.09375
0.1875
0.25
0.1875
1
0
0
1
−0.25
−0.1875
−0.09375
−0.03125
0.03125
0.09375
0.1875
0.25
0.2500
1
1
0
0
0.25
0.1875
0.09375
0.03125
−0.03125
−0.09375
−0.1875
−0.25
0.3125
1
1
0
0
0.25
0.1875
0.09375
0.03125
−0.03125
−0.09375
−0.1875
−0.25
0.3750
1
1
0
0
0.25
0.1875
0.09375
0.03125
−0.03125
−0.09375
−0.1875
−0.25
0.4375
1
1
1
0
0.09375
0.0625
0.03125
0
0
−0.03125
−0.0625
−0.09375
0.5000
1
1
1
0
0.09375
0.0625
0.03125
0
0
−0.03125
−0.0625
−0.09375
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