A plasma display device (PDP) and method of driving it (during an address period) are provided. Such a PDP has an address electrode for receiving an address pulse and a capacitor. Such an address pulse has states including a first voltage and a smaller second voltage smaller. Such a capacitor stores a third voltage that is between the first and third voltages. Such a method includes: coupling the capacitor to the address electrode via the inductor; firstly energizing, via the inductor, the address electrode with the third voltage stored in the capacitor; secondly energizing the address electrode with the first voltage; thirdly energizing, via the inductor, the capacitor with voltage on the address electrode; and fourthly energizing the address electrode with the second voltage. Real power transfer during the first and third energizations is facilitated via reactive power transfer arising from LC resonance.
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1. A plasma display device comprising:
an electrode for receiving a pulse having states that include a first voltage and a second voltage smaller than the first voltage;
a printed circuit board;
a driving circuit including a plurality of switches coupled between the printed circuit board and the electrode, and applying the pulse to the electrode;
a capacitor for storing a third voltage, the third voltage being between the first voltage and the second voltage, the capacitor being provided on the printed circuit board;
an inductor for coupling the driving circuit and the capacitor, the inductor being provided by at least one wire pattern on the printed circuit board;
a first switch directly coupled between a first power source and the electrode;
a second switch directly coupled between a second power source and the electrode; and
a third switching having a first terminal directly coupled to the electrode, and a second terminal coupled to the capacitor through the inductor;
wherein the third switch is turned on in a first period during an address period,
the voltage at the electrode is increased from the second voltage to the third voltage in the first period, with the increase being facilitated by resonance between the panel capacitor and the inductor,
the first switch is turned on to increase the voltage at the electrode from the third voltage to the first voltage in a second period after the first period,
the third switch is turned on in a third period after the second period and the voltage at the electrode is reduced form the first voltage to the third voltage, with the reduction being facilitated by the resonance of the panel capacitor and the inductor, and
the second switch is turned on to maintain the voltage at the electrode to be the second voltage in a fourth period after the third period,
wherein the second voltage is about ground voltage;
the first voltage is an address voltage va; and
the third voltage has a range of:
where V3 is the third voltage, δ denotes a non-negligible amount, and (Va−δ) represents a difference whose magnitude is a non-negligible amount smaller than va.
2. The plasma display device as claimed in
the printed circuit board includes a plurality of substrate layers; and
the at least one wire pattern of the inductor is provided on at least one of the substrate layers of the printed circuit board.
3. The plasma display device as claimed in
4. The plasma display device as claimed in
5. The plasma display device as claimed in
6. The plasma display device as claimed in
7. The plasma display device as claimed in
8. The plasma display device as claimed in
9. The plasma display device as claimed in
there are multiple instances of the electrode;
the capacitor, via the inductor, can be coupled to at least two of the multiple instances of the electrode.
10. The plasma display device as claimed in
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1. Field of the Invention
Embodiments relate to a plasma display device and a driving method thereof.
2. Description of the Related Art
A plasma display device may be a flat panel display for displaying characters or images by using plasma generated by gas discharges, and several to hundreds of millions of pixels are arranged in the matrix format thereon according to their sizes.
A frame (1 TV field) in the plasma display device is divided into a plurality of subfields which are weighted and driven accordingly. Each subfield has a reset period, an address period, and a sustain period with respect to time.
The reset period is for initializing the status of each discharge cell so as to facilitate an addressing operation on the discharge cell, and the address period is for applying an address voltage to a cell that is to be turned on (an addressed cell) and accumulating wall charges therein. That is, in the address period, a scan pulse is sequentially applied to a plurality of scan electrodes, and an address pulse is applied to the address electrode. In this instance, an address discharge is generated at the cell to which the scan pulse and the address pulse are simultaneously applied. In the sustain period, sustain discharges are generated corresponding in number to the weight of the corresponding subfield in the given cell that is to be turned on so that an image is displayed.
Significant amounts of reactive power may be required to provide a reference voltage to a plasma display panel (PDP) that represents a capacitive load in addition to discharging an address voltage from the PDP when performing an address operation. In this instance, further address power is consumed when there are many switching times for the switch for applying address data to the address electrode.
Embodiments of the present invention are therefore directed to a plasma display device and a driving method thereof which substantially overcomes one or more of the disadvantages of the related art.
It is therefore a feature of an embodiment of the present invention to provide a plasma display device exhibiting an advantage of reduced power consumption during an address period.
It is therefore a feature of an embodiment of the present invention to provide a plasma display device and a driving method thereof having an advantage of increasing an efficiency of power consumption.
At least one of the above and other features and advantages of embodiments may be realized by providing a plasma display device including an electrode, a printed circuit board, an driving circuit, a capacitor, and an inductor. The electrode receives a pulse having states that include a first voltage and a second voltage smaller than the first voltage. The driving circuit includes a plurality of switches coupled between the PCB and the electrode and applies the pulse to the electrode, the driving circuit being provided on the printed circuit board. The capacitor stores a third voltage that is between the first voltage and the second voltage, the capacitor being provided on the printed circuit board. The inductor couples the driving circuit and the capacitor, the inductor being provided by at least one wire pattern on the printed circuit board.
At least one of the above and other features and advantages of embodiments may be realized by providing a method for driving a plasma display device (PDP) during an address period. Such a PDP includes an address electrode for receiving an address pulse and a capacitor coupled to the address electrode. Such an address pulse has a first voltage and a second voltage smaller than the first voltage. Such a capacitor stores a third voltage that is between the first voltage and the second voltage. Such a method includes: coupling the capacitor to the address electrode of the PDP via the inductor (which can be realized as a wire pattern on at least one substrate layer of a multi-substrate-layer of a printed circuit board); firstly energizing, via the inductor, the address electrode with the third voltage stored in the capacitor to the address electrode, real power transfer during the first energization being facilitated via reactive power transfer arising from LC resonance; secondly energizing, after the first energization, the address electrode with the first voltage by coupling a power source for the first voltage to the address electrode; thirdly energizing, after the second energization and via the inductor, the capacitor with voltage on the address electrode, real power transfer during the third energization being facilitated via reactive power transfer arising from LC resonance; and fourthly energizing, after the third energization, the address electrode with the second voltage by coupling a power source for the second voltage to the address electrode.
The above and other features and advantages of the present invention will become more apparent to those of ordinary skill in the art by describing in detail example embodiments thereof with reference to the attached drawings, in which:
Korean Patent Application No. 10-2006-0107744 filed on Nov. 2, 2006, in the Korean Intellectual Property Office and entitled: “Plasma Display and Driving Method Thereof,” is incorporated by reference herein in its entirety.
Example embodiments of the present invention will hereinafter be described in detail with reference to the accompanying drawings.
In the following detailed description, only certain example embodiments of the present invention have been shown and described, simply by way of illustration. As those skilled in the art would realize, the described example embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention. To simplify the drawings, parts that are not related to descriptions are omitted, and the same or similar parts over the specification have the same or similar reference numerals.
A plasma display device and a driving method according to example embodiments of the present invention will now be described with reference to drawings.
As depicted in
The plasma display panel (PDP) 100 may include a plurality of address electrodes A1-Am in the column direction, and a plurality of sustain electrodes X1-Xn and scan electrodes Y1-Yn in pairs in the row direction. The sustain electrodes X1-Xn may be provided to correspond to the respective scan electrodes Y1-Yn, and the sustain electrodes X1-Xn and the scan electrodes Y1-Yn perform a display operation for displaying images in the sustain period. The address electrodes A1-Am may be arranged to cross the sustain electrodes X1-Xn and the scan electrodes Y1-Yn. In this instance, a discharge space at the crossing regions of the address electrodes A1-Am, the scan electrodes Y1-Yn, and the sustain electrodes X1-Xn form a cell 12. The above-described plasma display panel (PDP) 100 is but one example, and panels of different configurations to which subsequent driving methods are applicable can be applied to the present invention.
The controller 200 may receive a video signal to output an address electrode drive control signal, a sustain electrode drive control signal, and a scan electrode drive control signal. The controller 200 may divide a frame into a plurality of subfields and drives the subfields. Each subfield may have a reset period, an address period, and a sustain period with respect to time.
The address electrode driver 300 may receive an address electrode drive control signal from the controller 200 and applies a display data signal for selecting a discharge cell to be displayed to the respective address electrodes.
The scan electrode driver 400 may receive a scan electrode drive control signal from the controller 200 and applies a driving voltage to the scan electrode.
The sustain electrode driver 500 may receive a sustain electrode drive control signal from the controller 200 and applies a driving voltage to the sustain electrode.
The scan and sustain electrode drivers 400 and 500 may be formed, e.g., on a board (not illustrated) on the rear part of the plasma display panel 100. For example, part of the address electrode driver 300 may be incorporated into the tape carrier package integrated circuit (TCP IC) (e.g., 700 in
As depicted in
The respective address driving circuits 310 may include switches (S1, S2, S3). In
The switch (S1) may be coupled between a terminal that supplies an address voltage Va and an address electrode (called out in
A signal for turning on the switch (S1) may be applied to a control terminal of the switch (S1) when an on data signal is applied to the address electrode, and a signal for turning on the switch (S2) may be applied to a control terminal of the switch (S2) when an off data signal is applied to the address electrode. Also, the switch (S3) may be coupled between an address electrode of the panel capacitor (Cp) and a recovery capacitor (C1).
At least one capacitor (C1) may be coupled in common to the address electrodes A1-Am, e.g., a given recovery capacitor (C1) may be coupled to a subset of the address electrodes. The capacitor (C1) supplies a voltage, e.g., between a Va voltage and 0V, e.g., about Va/2 voltage.
An operation by the address electrode driver 300 in
It is assumed in the driving waveforms depicted in
It is assumed that the switch (S1) and the switch (S3) are turned off and the switch (S2) may be turned on to maintain the voltage at the panel capacitor (Cp) to be 0V and the capacitor (C1) may be pre-charged with about half the address voltage (≈Va/2) before a period (M1) starts.
In the period (M1), the switch (S1) remains turned off, the switch (S3) may be turned on and the switch (S2) may be turned off. As depicted in
In the period (M2), the switch (S2) remains turned off, the switch (S3) may be turned off and the switch (S1) may be turned on. As depicted in
In the period (M3), the switch (S2) remains turned off, the switch (S1) may be turned off and the switch (S3) may be turned on. As depicted in
In the period (M4), the switch (S1) remains turned off, the switch (S3) may be turned off and the switch (S2) may be turned on. As depicted in
Accordingly, the period (M1) is for supplying the reactive power from the power recovery capacitor (C1) to the panel capacitor (Cp), and the period (M3) is for recovering the reactive power from the panel capacitor (Cp) to the power recovery capacitor (C1).
Accordingly, address power consumption caused by switching can be reduced and power consumption of the plasma display device can be reduced by turning on or off the switch (S3) to recover the power to the power recovery capacitor (C1).
As depicted in
As depicted in
As depicted in
It is noted that wire patterns of the inductor (L) are not restricted to the whirling pattern or the horseshoe pattern of
Also, the wire patterns 320, 320′, 320″ of the inductor (L) are depicted in
As depicted in
An operation by the address electrode driver 300′ of
It is assumed in
It is assumed that the switch (S1) and the switch (S3) are turned off and the switch (S2) is turned on to maintain the voltage at the panel capacitor (Cp) to be about 0V and the power recovery capacitor (C1) is pre-charged with about half the address voltage (≈Va/2) before a period (T1) starts.
In the period (T1), the switch (S1) remains turned off, the switch (S3) may be turned on and the switch (S2) may be turned off. As depicted in
where δ denotes a non-negligible amount such that (Va−δ) represents a difference whose magnitude is a non-negligible amount smaller than Va.
In the period (T2), the switch (S2) remains turned off, the switch (S3) may be turned off and the switch (S1) may be turned on. As depicted in
In the period (T3), the switch (S2) remains turned off, the switch (S1) may be turned off and the switch (S3) may be turned on. As depicted in
In the period (T4), the switch (S1) remains turned off, the switch (S3) may be turned off and the switch (S2) may be turned on. As depicted in
Accordingly, the address driving circuit 310′ can achieve greater power recovery efficiency than, e.g., the address driving circuit 310. That is, by including the inductor (L) as part of a current path between the power recovery capacitor (C1) and the panel capacitor (Cp), real power transfer between the power recovery capacitor (C1) and the panel capacitor (Cp) is facilitated via reactive power transfer therebetween using LC resonance during the periods (T1 and T3).
Also, address power consumption caused by switching may be reduced and power consumption of the plasma display device may be reduced by recovering or supplying the power to the power recovery capacitor (C1) by turning on or off the switch (S3).
As described above, power consumption in the address period can be reduced and power efficiency of the plasma display device may be increased by using reactive power transfer, e.g., LC resonance between an inductor and a panel capacitor, (where, e.g., the inductor can be realized as wire patterns on the PCB) to facilitate applying an address voltage to the address electrode.
While it has been described that the driving circuits 310 & 310′ depicted in
Example embodiments of the present invention have been disclosed herein, and although specific terms are employed, they are used and are to be interpreted in a generic and descriptive sense only and not for purpose of limitation. Accordingly, it will be understood by those of ordinary skill in the art that various changes in form and details may be made without departing from the spirit and scope of the present invention as set forth in the following claims.
Kim, Myoung-Kwan, Jeong, Jae-Seok
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