A photodetector is formed from a body of semiconductor material substantially surrounded by dielectric surfaces. A passivation process is applied to at least one surface to reduce the rate of carrier generation and recombination on that surface. Photocurrent is read out from at least one electrical contact, which is formed on a doped region whose surface lies entirely on a passivated surface. Unwanted leakage current from un-passivated surfaces is reduced through one of the following methods. (a) The un-passivated surface is separated from the photo-collecting contact by at least two junctions (b) The un-passivated surface is doped to a very high level, at least equal to the conduction band or valence band density of states of the semiconductor (c) An accumulation or inversion layer is formed on the un-passivated surface by the application of an electric field. Electrical contacts are made to all doped regions, and bias is applied so that a reverse bias is maintained across all junctions.
|
9. A method of detecting light, comprising:
using a semiconductor structure as a photodetector to detect incident light and generate an electrical signal representative of the detected incident light, the semiconductor structure comprising:
a first dielectric material comprising a cavity; and
a semiconductor material disposed at least partially in the cavity and comprising a surface comprising a first portion contacting the first dielectric material and a second portion not in contact with the first dielectric material;
wherein the semiconductor material comprises a first region having a first doping, a second region having a second doping, and a third region having a third doping;
wherein the first doping of the first region and the second doping of the second region forms a first p-n junction between the first region and the second region;
wherein the second doping of the second region and the third doping of the third region forms a second p-n junction between the second region and the third region;
wherein the first p-n junction and the second p-n junction are reverse biased, and
wherein the third region is noncontiguous from the first region.
1. A method of detecting light, comprising:
using a semiconductor structure as a photodetector to detect incident light and generate an electrical signal representative of the detected incident light, the semiconductor structure comprising:
a dielectric material;
a body of semiconductor material disposed at least partially within the dielectric material, the body of semiconductor material comprising:
a top surface configured to receive incident radiation, the top surface comprising a passivated portion;
a first region doped to a first type of conductivity (p or n);
a second region peripherally around the first region doped to a second type of conductivity (n or p) opposite the type of conductivity of the first region, the second region forming a first p-n junction with the first region; and
a third region doped to the first type of conductivity (p or n) and disposed peripherally around the second region, the third region forming a second p-n junction with the second region, the third region being noncontiguous from the first region;
wherein the first p-n junction intersects the top surface of the body of semiconductor material at a first intersection location on the passivated portion of the top surface and the second p-n junction intersects the top surface of the body of semiconductor material at a second intersection location on the passivated portion of the top surface; and
a plurality of ohmic contacts comprising a first ohmic contact to the first region, a second ohmic contact to the second region, and a third ohmic contact to the third region, the first, second, and third ohmic contacts collectively configured to collect photogenerated current and bias the first and second p-n junctions.
2. The method of
4. The method of
5. The method of
6. The method of
7. The method of
|
This application is a continuation of U.S. patent application Ser. No. 11/210,223 filed by Rafferty et al. on Aug. 23, 2005 and entitled: “Low-Noise Semiconductor Photodetectors.” The foregoing application Ser. No. 11/210,223 is incorporated herein by reference.
The United States Government has certain rights to this invention pursuant to NSF Award DMI-0450487.
This invention relates to semiconductor photodetectors for visible and infrared light, and in particular, to low-noise semiconductor photodetectors and methods for making them.
Semiconductor photodiodes are widely used for the detection of light, both visible and infrared. They exploit the internal photoelectric effect, where electron-hole pairs are generated in the semiconductor by photon absorption and contribute to electrical conduction inside the device, leading to a corresponding current at the contacts of the detector. Such detectors are fabricated singly, or in linear arrays for spectroscopy, or in two-dimensional (2-D) arrays for imaging.
To create highly sensitive detectors, low noise is desired. Low noise requires that all sources of leakage current in the photodiode should be suppressed to the greatest degree possible. Leakage currents in a semiconductor photodiode arise by a variety of mechanisms, including leakage at surface traps, leakage through bulk traps or defects, quantum-mechanical tunneling between the valence and conduction bands in the semiconductor, spontaneous electron-hole generation through thermal energy, impact ionization, and junction diffusion current.
Tunneling leakage can be reduced by employing moderate doping levels and low voltages. Bulk leakage can be reduced by using high-purity materials and by using growth techniques which avoid the formation of crystal defects such as stacking faults, twins, and dislocations. Spontaneous electron-hole generation and impact ionization are negligible in detectors made of an indirect bandgap material such as silicon or germanium. When all these leakage mechanisms have been reduced, surface leakage and diffusion current remain as the dominant leakage mechanisms.
Surface leakage is caused by traps at the interface between the semiconductor and any dielectric surfaces which contact it. The traps typically originate due to dangling bonds which result when the semiconductor lattice is terminated. Two types of surface leakage can be distinguished: leakage arising where a depletion region intersects a surface, and leakage where the semiconductor adjoining the interface is doped and charge-neutral. In both cases, leakage will arise whenever an electron-hole pair is generated at a trap on the surface, and the electron and hole make their way to different junctions, causing current to flow in an external circuit. Leakage at a depleted surface is proportional to the intrinsic carrier concentration and therefore depends on temperature as exp (−Eg/2kT) where Eg is the semiconductor bandgap. Leakage at a doped interface varies as exp (−Eg/kT) and is typically much lower. A semiconductor photodetector using the photoelectric effect, such as a P-N photodiode, cannot avoid having a depletion layer intersecting the semiconductor surface. The larger the depletion layer, the more surface leakage. The un-depleted surfaces will also give rise to leakage current even if some means is found to suppress leakage at the depleted surface.
Diffusion current is an intrinsic aspect of a diode and cannot be eliminated, though it can be reduced. It arises whenever voltage bias is applied to the diode. The applied voltage disturbs the minority carrier concentrations at the edge of the diode junction from their equilibrium values. The minority carrier concentrations at the contacts are always equal to their equilibrium values. Consequently there is a gradient of minority carriers between the junction and the contacts, giving rise to a steady diffusion current of minority carriers. Under reverse bias, the condition where a photodiode is normally operated, minority carriers flow from the contacts to the junction, where they are continuously swept away by the field to become majority carriers on the other side of the junction.
All these sources of leakage current compete with the photocurrent generated by incoming light, and therefore compete with the signal and reduce the signal-to-noise ratio.
Photodiodes formed in silicon exploit the highly optimized silicon/silicon dioxide surface. These surfaces, which have extremely low surface recombination velocities, are referred to as passivated surfaces. Such photodiodes are widely used in CCDs and CMOS imagers. However it is desirable to form photodetectors in other materials besides silicon, in order to form images using light of wavelengths to which silicon is not sensitive, e.g., infrared light.
Germanium is one material which can be used to form infrared-sensitive photodiodes. Germanium photodiodes have been reported to have undesirably high dark current for many applications. Reported leakage current densities for germanium diodes grown on silicon are of order 1 mA/cm2. See references designated [1][2] in the attached Appendix. This is approximately equal to the photocurrent that would be generated by bright sunlight, and represents a high level of leakage. Germanium photodiodes formed in bulk germanium have reported leakage 10-100 times lower [3][4], but this is still not sufficient for imaging indoors or in twilight conditions. To form low leakage detectors, improved devices and processes are needed.
In accordance with the invention, a low noise photodetector comprises a body of semiconductor material substantially surrounded by dielectric material. A portion of the body surface is passivated by a high quality dielectric and a portion is unpassivated. The semiconductor body includes a p-n junction for operation as a photodetector to minimize leakage, the p-n junction (including its depletion region) intersects the semiconductor surface within the passivated portion of the surface, and leakage from the unpassivated surface is minimized by one or more of the following: 1) the body includes opposite polarity p-n junctions (n-p and p-n) in the electrical path between the surface and the photocurrent collector, 2) the body includes a highly doped region in contact with the dielectric, 3) a doped semiconductor outside a thin dielectric provides a charge accumulation region adjacent the interface.
The nature, advantages and various additional features of the invention will appear more fully upon consideration of the illustrative embodiments now to be described in connection with the accompanying drawings:
And
It is to be understood that these drawings are for illustration of the concepts of the invention and are not to scale.
The p-n junctions 22, 24 including their respective depletion regions intersect the surface of the body 10 in respective intersection regions 22A, 24A. Leakage is minimized by keeping these intersection regions within the passivated portion of the semiconductor surface.
Moreover, in this embodiment, any carrier generated at the interior unpassivated dielectric surfaces 40 must cross two junctions of opposite polarity (p to n and n to p) in order to reach region 16 and the contact 30. If the carrier is a hole, it will preferentially stay in the p-type layer 10 and be collected at contact 34. If it is an electron, it will enter the n-type layer 14 and will then preferentially stay there, to be collected at contact 32. Thus both types of carriers generated at the unpassivated surface will be prevented from reaching the photo-collecting contact 30.
A further optimization of the structure to improve the quantum efficiency is to grade the middle doped layer (n-type in this example) so that the doping is lower near the center of the well and higher near the edge. This creates a barrier for photocarriers generated in the n-type region so that the photogenerated holes from the n-region 14 will preferentially be collected at the center “p” contact 30 rather than at the perimeter “p” contact 34. Such a graded doping profile is likely to arise naturally if the doping is created by ion implantation, but the effect can be enhanced by judicious choice of implant energy and dose.
Although the device has been described as p-n-p, it should be appreciated that a corresponding n-p-n implementation is equally practical by appropriate choice of doping.
A process sequence to create the
Referring to
As shown in
A process sequence to create the
As shown in
An alternative process sequence for this device is illustrated in
If the surface doping layer 244 is not wide enough to allow a contact to be easily formed, a supplementary mask 272 and ion implantation (
Although the device has been described as p-n, it should be appreciated that a corresponding n-p implementation is equally practical by appropriate choice of doping.
A third embodiment of a low noise photodetector is illustrated in
A process sequence for creating the detector of
Although the
It will also be appreciated that the scope of the invention also includes a corresponding device similar to
A further feature of the photodiodes described herein is can be seen by comparing
It is also possible to combine two or more of the approaches described in connection with
It can now be seen that one aspect of the invention is a low noise photodetector comprising a body of semiconductor material. The body has a surface substantially surrounded by dielectric material and comprising a first portion that is passivated and a second portion that is unpassivated. The body also comprises a first region doped to a first type of conductivity (p or n) and a second region doped to the second type of conductivity (n or p), the two regions forming a first p-n junction.
The first p-n junction intersects the surface of the body in an intersection region that is within the passivated portion of the body surface, and the device is adapted to minimize leakage current from the unpassivated second portion of the body surface by one or more of the following:
1) the body includes a third doped region to form a second p-n junction in the path between the unpassivated surface (or a part thereof) and the first region, the second p-n junction having a polarity opposite the first junction,
2) the region of the semiconductor body that is adjacent the unpassivated surface portion is highly doped to suppress carrier generation at the unpassivated surface, and
3) a highly doped semiconductor is disposed around and in contact with the dielectric adjacent the unpassivated portion of the semiconductor surface to form an accumulation layer or an inversion layer on the unpassivated surface.
While the above description contains many specific examples, these should not be construed as limitations on the scope of the invention, but rather as examples of several preferred embodiments. Accordingly, the scope of the invention should be determined not by the embodiments illustrated, but by the appended claims and their legal equivalents.
Rafferty, Conor S., King, Clifford A.
Patent | Priority | Assignee | Title |
Patent | Priority | Assignee | Title |
4318115, | Jul 24 1978 | Sharp Kabushiki Kaisha | Dual junction photoelectric semiconductor device |
5189297, | Aug 29 1988 | Raytheon Company | Planar double-layer heterojunction HgCdTe photodiodes and methods for fabricating same |
5212395, | Mar 02 1992 | AT&T Bell Laboratories | P-I-N photodiodes with transparent conductive contacts |
5360987, | Nov 17 1993 | AT&T Bell Laboratories | Semiconductor photodiode device with isolation region |
5371033, | Jun 12 1992 | Intellectual Ventures II LLC | Method of making charge coupled device image sensor |
5467204, | Dec 09 1991 | Sharp Kabushiki Kaisha | Liquid crystal light valve with dual function as both optical-to-electrical and optical-to-optical transducer |
5880482, | Jan 29 1997 | Board of Trustees of the University of Illinois, The | Low dark current photodetector |
5883421, | Mar 13 1997 | LG SEMICON CO , LTD | Photodetector based on buried junctions and a corresponding method of manufacture |
6541836, | Feb 21 2001 | CMR Naviscan Corporation | Semiconductor radiation detector with internal gain |
6606120, | Apr 24 1998 | FOVEON, INC | Multiple storage node full color active pixel sensors |
6656760, | Mar 09 2000 | Novagali Pharma SA | Solid state imaging sensor in a submicron technology and method of manufacturing and use of a solid state imaging sensor |
6759694, | Sep 10 2003 | Industrial Technology Research Institute | Semiconductor phototransistor |
6846740, | Jun 14 2003 | Intel Corporation | Wafer-level quasi-planarization and passivation for multi-height structures |
7683449, | Nov 12 2003 | AUSTRIAMICROSYTEMS AG | Radiation-detecting optoelectronic component |
20040117834, | |||
20050127275, | |||
JP394478, | |||
JP4276666, | |||
JP60151940, | |||
JP6045076, | |||
JP7202254, | |||
WO2005048355, |
Executed on | Assignor | Assignee | Conveyance | Frame | Reel | Doc |
Aug 09 2005 | RAFFERTY, CONOR S | Noble Device Technologies Corporation | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 024135 | /0503 | |
Aug 09 2005 | KING, CLIFFORD ALAN | Noble Device Technologies Corporation | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 024135 | /0503 | |
Mar 09 2007 | Noble Device Technologies Corporation | NOBLE PEAK VISION CORP | CHANGE OF NAME SEE DOCUMENT FOR DETAILS | 024135 | /0542 | |
Oct 29 2007 | Infrared Newco, Inc. | (assignment on the face of the patent) | / | |||
Dec 30 2010 | NOBLEPEAK VISION CORP | INFRARED NEWCO, INC | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 025855 | /0453 | |
May 09 2019 | INFRARED LABORATORIES, INC | SEMIKING LLC | NOTICE OF EXCLUSIVE LICENSE AND PURCHASE OPTION | 049149 | /0252 | |
Sep 01 2021 | INFRARED LABORATORIES INCORPORATED | TRUSTEES OF TRUST B UNDER THE FRANK J AND EDITH M LOW TRUST DATED APRIL 26, 2007 | SECURITY INTEREST SEE DOCUMENT FOR DETAILS | 060091 | /0186 | |
Nov 09 2023 | INFRARED LABORATORIES INCORPORATED | TRUST B UNDER THE FRANK J AND EDITH M LOW TRUST, DATED APRIL 26, 2007 | RELEASE BY SECURED PARTY SEE DOCUMENT FOR DETAILS | 065645 | /0974 | |
Nov 20 2023 | INFRARED LABORATORIES, INC | ARKTONICS, LLC | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 065645 | /0801 |
Date | Maintenance Fee Events |
May 22 2015 | REM: Maintenance Fee Reminder Mailed. |
Oct 06 2015 | M2551: Payment of Maintenance Fee, 4th Yr, Small Entity. |
Oct 06 2015 | M2554: Surcharge for late Payment, Small Entity. |
Jun 03 2019 | REM: Maintenance Fee Reminder Mailed. |
Oct 10 2019 | M2552: Payment of Maintenance Fee, 8th Yr, Small Entity. |
Oct 10 2019 | M2555: 7.5 yr surcharge - late pmt w/in 6 mo, Small Entity. |
May 29 2023 | REM: Maintenance Fee Reminder Mailed. |
Oct 11 2023 | M2553: Payment of Maintenance Fee, 12th Yr, Small Entity. |
Oct 11 2023 | M2556: 11.5 yr surcharge- late pmt w/in 6 mo, Small Entity. |
Date | Maintenance Schedule |
Oct 11 2014 | 4 years fee payment window open |
Apr 11 2015 | 6 months grace period start (w surcharge) |
Oct 11 2015 | patent expiry (for year 4) |
Oct 11 2017 | 2 years to revive unintentionally abandoned end. (for year 4) |
Oct 11 2018 | 8 years fee payment window open |
Apr 11 2019 | 6 months grace period start (w surcharge) |
Oct 11 2019 | patent expiry (for year 8) |
Oct 11 2021 | 2 years to revive unintentionally abandoned end. (for year 8) |
Oct 11 2022 | 12 years fee payment window open |
Apr 11 2023 | 6 months grace period start (w surcharge) |
Oct 11 2023 | patent expiry (for year 12) |
Oct 11 2025 | 2 years to revive unintentionally abandoned end. (for year 12) |