Treating light emitting elements 2 in all the display pixels in a light emitting display panel as objects, a maximum value of the forward voltages is drawn by a multi-input comparator 3a and a peak hold circuit 3b. Based on the maximum value of the forward voltages, a voltage boost circuit 6 switching operates a power FET to supply a boosted output by this operation to a constant current circuit 1 as the operational voltage VH. In the case where the maximum value of the forward voltages increases due to trouble or the like and based on this increment the operational voltage VH excessively increases, the operation of the voltage boost circuit 6 is stopped by a control output from an analog comparator 7a which functions as voltage limiter.
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1. A self light emitting type display device comprising:
light emitting elements which are respectively connected between a plurality of data lines and a plurality of scan lines at respective intersecting positions between the data lines and the scan lines;
a voltage detection circuit that obtains a maximum value of forward voltages drawn from the light emitting elements through the respective data lines;
a power supply circuit which controls an operational voltage given to the light emitting elements based on the maximum value of the forward voltages; and
a voltage limiter which can set an upper limit value of the operational voltage outputted from the power supply circuit.
2. The self light emitting type display device according to
3. The self light emitting type display device according to
4. The self light emitting type display device according to
5. The self light emitting type display device according to
6. The self light emitting type display device according to any one of
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This application is a continuation of application Ser. No. 10/919,347 filed Aug. 17, 2004, now U.S. Pat. No. 7,557,802, the entire contents of which are incorporated herein by reference, which is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2003-338104, filed on Sep. 29, 2003, the entire contents of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to an active drive type or passive drive type light emitting display device in which a large number of light emitting elements, for example represented by organic EL (electroluminescent) elements, are arranged, and particularly to a self light emitting type display device in which light emitting elements can be efficiently driven to be lit by controlling a drive voltage supplied from a power supply circuit which is for driving and lighting the light emitting elements based on the forward voltages of the respective light emitting elements.
2. Description of the Related Art
A display employing a display panel constructed by arranging light emitting elements in a matrix pattern has been developed widely. As the light emitting element employed in such a display panel, an organic EL element in which an organic material is employed in a light emitting layer has attracted attention. This is because of backgrounds one of which is that by employing, in the light emitting layer of the EL element, an organic compound which enables an excellent light emission characteristic to be expected, a high efficiency and a long life which make an EL element satisfactorily practicable have been advanced.
The organic EL element can be electrically shown by an equivalent circuit as shown in
Meanwhile, it has been known that physical properties of the organic EL element change due long-term use so that the forward voltage VF becomes higher. Thus, as shown in
Further, it has been known that the intensity property of the organic EL element changes due to changes in environmental temperature roughly as shown by broken lines in
In general, a constant current drive is performed for the organic EL element due to the reason that the voltage vs. intensity characteristic is unstable with respect to temperature changes while the current vs. intensity characteristic is stable with respect to temperature changes, the reason that it is necessary to prevent the EL element from being deteriorated by an excess current, and the like. In this case, an operational voltage VH, for example produced from a DC/DC converter or the like, which is supplied to a constant current circuit, has to be set, considering the following respective factors.
That is, as the factors, it is possible to enumerate the forward voltage VF of an EL element, a variation part VB of the VF of an EL element, a change-with-time part VL of the VF, a temperature change part VT of the VF, a drop voltage VD necessary for allowing a constant current circuit to perform a constant current operation, and the like. Even when these factors interact synergistically, in order to fully ensure the constant current characteristic of a constant current circuit, the operational voltage VH has to be set at a value obtained by adding maximum values of respective voltages shown as the respective factors.
However, a case where a voltage value obtained by adding maximum values of respective voltages as described above is needed as the operational voltage VH supplied to the constant current circuit hardly occurs, and in a usual state, a large power loss as a voltage drop part in the constant current circuit is brought about. Therefore, this becomes a primary factor of generation of heat, thereby putting stress on organic EL elements, peripheral circuit parts, and the like.
Japanese Patent Application Laid-Open No. H7-36409 (paragraphs 0007 to 0009 and FIG. 1) discloses a countermeasure for dissolving the above-described problems by measuring the forward voltage VF of an EL element and by appropriately controlling the value of the operational voltage VH given to the constant current circuit based on this VF.
In the structure disclosed in Japanese Patent Application Laid-Open No. H7-36409 (paragraphs 0007 to 0009 and FIG. 1), the forward voltage VF of one light emitting element (EL element) arranged in a display panel is detected so that an operational voltage given to a constant current circuit which drives respective light emitting elements is controlled based on the forward voltage of this light emitting element.
A voltage setting circuit 5 generating a predetermined voltage (reference voltage) that is a comparison object is connected to the comparison/calculation circuit 4. In the comparison/calculation circuit 4, the reference voltage supplied from the voltage setting circuit 5 and a voltage corresponding to the forward voltage VF supplied from the voltage detection circuit 3 are compared to generate a control voltage corresponding to the difference part of these voltages. The control voltage corresponding to the difference part is supplied to a voltage boost circuit 6 for example made of a switching regulator as a power supply circuit to control the value of an operational voltage (power supply voltage) VH outputted from the voltage boost circuit 6.
In the structure shown in
In the structure shown in
The present invention has been developed as attention to the above-described problems has been paid, and it is an object of the present invention to provide a self light emitting type display device by which a power loss generated in a constant current circuit which drives and lights light emitting elements can be reduced and further by which an excessive increment of the operational voltage outputted from a power supply circuit due to damage, breakdown, or the like of detection means of the forward voltage of a light emitting element as described above can be restricted effectively.
A self light emitting type display device according to the present invention which has been developed in order to carry out the above-described object is an active drive type light emitting display device comprising a plurality of light emitting display pixels which are arranged at intersecting positions between a plurality of data lines and a plurality of scan lines and which are provided with at least light emitting elements and drive TFTs that give drive current to the light emitting elements, characterized by being constructed in such a manner that respective forward voltages of the light emitting elements constituting the respective pixels are drawn and that a maximum value of the drawn forward voltages in the respective light emitting elements can be obtained.
A self light emitting type display device according to the present invention which has been developed in order to carry out the above-described object is a passive drive type light emitting display device comprising light emitting elements which are respectively connected between a plurality of data lines and a plurality of scan lines at respective intersecting positions between the data lines and the scan lines, characterized by being constructed in such a manner that forward voltages of the light emitting elements are drawn through the respective data lines and that a maximum value of the drawn forward voltages in the respective light emitting elements can be obtained.
A self light emitting type display device according to the present invention will be described below with reference to embodiments shown in the drawings. First,
For the respective light emitting display pixels, a structure by a conductance control method is shown as an example. That is, as reference numerals are put to respective elements constituting the pixel p11 of the upper left in the display panel 10 shown in
The source of the drive transistor Tr2 is connected to the other terminal of the capacitor C1 and to the power supply line v1. The anode terminal of the organic EL element E1 as a light emitting element is connected to the drain of the drive transistor, and the cathode terminal of this EL element E1 is connected to a reference potential point (ground). Thus, a large number of light emitting display pixels of the above-described structure are arranged in a matrix pattern in the vertical and horizontal directions on the display panel 10 as described above.
The respective data lines m1, m2, . . . arranged in the vertical direction are drawn from the data driver 11, and the control lines n1, n2, . . . arranged in the horizontal direction are drawn from the scan driver 12 as shown in
For example, when an ON voltage is supplied from the scan driver 12 via the control line n1 to the gate of the control transistor Tr1 in the light emitting display pixel p11, the control transistor Tr1 allows current corresponding to a data voltage from the data line m1 supplied to the source thereof to flow from the source to the drain thereof. Accordingly, during a period in which the gate of the control transistor Tr1 is the ON voltage, a voltage corresponding to the data voltage is charged in the capacitor C1, and this voltage is supplied to the gate of the drive transistor Tr2. Accordingly, the drive transistor Tr2 allows current based on the gate voltage and the source voltage (Vgs) thereof to flow in the EL element E1 so that the EL element is driven to emit light. That is, the drive transistor Tr2 operates so that the EL element E1 is driven to emit light by driving the EL element E1 by a constant current.
Meanwhile, when the gate of the control transistor Tr1 becomes an OFF voltage, although the control transistor Tr1 becomes a so-called cutoff so that the drain of the control transistor Tr1 becomes in an open state, the gate voltage of the drive transistor Tr2 is maintained by electrical charges accumulated in the capacitor C1. Therefore, drive current of the drive transistor is maintained until a next scan, whereby light emission of the EL element E1 is also maintained.
In the respective light emitting display pixels of the above-described structure, the drive transistor Tr2 functions as a constant current circuit which drives the respective EL element E1 so that the EL element E1 emits light. This embodiment is constructed in such a manner that the electrical potential of the connection point of the drain of the drive transistor Tr2 functioning as the constant current circuit and of the anode terminal of the EL element is drawn in order to obtain the forward voltage VF of the respective EL element. For convenience of explanation,
Next,
That is, anode lines a1 to an as n data lines are arranged in the vertical direction, cathode lines k1 to km as m scan lines are arranged in the horizontal direction, and organic EL elements E11 to Enm denoted by symbols/marks of diodes are connected at portions at which the respective anode lines and cathode lines intersect one another (in total, n×m portions) to construct a display panel 20.
In the respective EL elements E11 to Enm constituting pixels, one ends (anode terminals in equivalent diodes of the EL elements) are connected to the anode lines, and the other ends (cathode terminals in the equivalent diodes of the EL elements) are connected to the cathode lines, corresponding to the respective intersection positions between the anode lines a1 to an provided along the vertical direction and the cathode lines k1 to km provided along the horizontal direction. Further, the respective anode lines a1 to an are connected to an anode line drive circuit 21, and the respective cathode lines k1 to km are connected to a cathode line scan circuit 22, so that the respective anode and cathode lines are driven.
In the anode line drive circuit 21, constant current circuits I1 to In which perform a constant current operation, utilizing an operational voltage VH supplied from a later-described power supply circuit and drive switches SX1 to SXn are provided. The anode line drive circuit 21 operates in such a manner that the drive switches SX1 to SXn are connected to the constant current circuits 11 to In side so that current from the constant current circuits I1 to In is supplied to the respective EL elements E11 to Enm arranged corresponding to the cathode lines. The drive switches SX1 to SXn are constructed so as to be connected to a ground side provided as a reference potential point in the case where the current from the constant current circuits I1 to In is not supplied to the respective EL elements.
The cathode line scan circuit 22 is provided with scan switches SY1-SYm corresponding to the respective cathode lines k1 to km and operates so that either a reverse bias voltage source VM or the ground potential as a scan reference potential point is connected to a corresponding cathode line. Thus, the constant current circuits I1 to In are connected to desired anode lines a1 to an while the cathode lines are set at the scan reference potential point (ground potential) at a predetermined cycle so that the respective EL elements can be allowed to emit light selectively.
The anode line drive circuit 21 and the cathode line scan circuit 22 operate to receive commands from a light emission control circuit 23 constituted by a controller IC to allow the display panel 20 to display an image corresponding to an image signal, in accordance with this image signal supplied to the light emission control circuit 23.
The structure shown in
Thus, the forward voltage VF of the EL element E1 generated at the connection portion of the drive transistor Tr2 and the EL element E1 which constitute a light emitting display pixel is supplied to one input terminal of the multi-input comparator 3a. Therefore, in the structure shown in
Meanwhile, in the case where the display device of the passive matrix structure shown in
As shown in
The maximum value of the forward voltages VF outputted from the peak hold circuit 3b is sent to a comparison/calculation circuit 4. As already described with reference to
That is, in the case where the maximum value of the forward voltages VF outputted from the peak hold circuit 3b is “VFmax” and the reference voltage produced from the voltage setting circuit 5 is “Vconstant” in the structure shown in
With the above-described structure, the operational voltage VH from the power supply circuit is controlled taking a voltage margin of the “Vconstant” based on the maximum value “VFmax” of the forward voltages VF of the respective light emitting elements. Therefore, a voltage drop part generated in the constant current circuit 1 shown in
Meanwhile, in the embodiment shown in
Here, as shown in
This voltage boost circuit 6 performs for example PWM (pulse width modulation) control, taking the control voltage from the comparison/calculation circuit 4 as an input to function as a switching regulator which switches the power FET Q11. The voltage boost circuit 6 can also utilize a well-known PFM (pulse frequency modulation) control or PSM (pulse skip modulation) control instead of the PWM control.
A PWM wave based on the control voltage from the comparison/calculation circuit 4 is outputted from the voltage boost circuit 6 functioning as a switching regulator, and the power FET Q11 is controlled to be turned on by the PWM wave. Thus, electrical power energy from the battery 8 of the primary side is accumulated in the inductor L11. The electrical power energy accumulated in the inductor L11 is accumulated in a smoothing capacitor C12 via a diode D11, accompanied by an OFF operation of the power FET Q11. The power FET Q11 repeats the ON/OFF operation in accordance with the duty cycle of PWM based on the control voltage from the comparison/calculation circuit 4, and a direct current output boosted by this operation is outputted as the operational voltage VH.
Meanwhile, the operational voltage VH is divided by resistance elements R13, R14 and is supplied to one input terminal of an analog comparator 7a as an analog value A. A voltage obtained by dividing a standard voltage VDD by resistance elements R15, R16 is supplied as an analog value B to the other input terminal of the analog comparator 7a. The analog comparator 7a compares the analog value B as a standard with the analog value A and operates so as to allow the voltage boost circuit 6 to continue the switching operation thereby in a state of A<B. The analog comparator 7a operates so as to stop the switching operation by the voltage boost circuit 6 in the case where a state of A>B is detected. Thus, the ON/OFF operation of the power FET Q11 is stopped, and the boost operation for the operational voltage VH is stopped.
Therefore, in the structural example shown in
Next,
The operational voltage VH is divided by the resistance elements R13, R14 to be supplied to the first A/D converter 7c, and digital data A outputted from this A/D converter 7c is supplied to one input terminal of the digital comparator 7b. The voltage obtained by dividing the standard voltage VDD by the resistance elements R15, R16 is supplied to the second A/D converter 7d, and digital data B outputted from this A/D converter 7d is supplied to the other input terminal of the digital comparator 7b.
The digital comparator 7b compares the data B as a reference with the data A and operates so as to continue the switching operation performed by the voltage boost circuit 6 in a state that A<B. The digital comparator 7b operates so as to stop the switching operation performed by the voltage boost circuit 6 in the case where a state of A>B is detected. Thus, the ON/OFF operation of the power FET Q11 is stopped, and the boost operation for the operational voltage VH is stopped.
Therefore, in the structural example shown in
This generation circuit 7e outputs predetermined digital limit data, that is, digital data B that is to be a comparison object in the digital comparator 7b by a command from an unillustrated CPU (central processing unit). In the structural example shown in this
Next,
In the form shown in this
With the form shown in this
That is, the resistors R18 and R19 connected in series are connected in parallel to the smoothing capacitor C12 through which the operational voltage VH is generated, and the base of the npn type bipolar transistor Q12 is connected to the connection midpoint thereof. The collector of the transistor Q12 is connected to the output terminal of the operational voltage VH in the capacitor C12 via the resistor R20, and the emitter of the transistor Q12 is connected to the reference potential point.
With the above-described structure, when the base voltage which is obtained by division by means of the resistors R18, R19 and which is applied to the transistor Q12 becomes approximately 0.3 volts that is the threshold voltage, the transistor Q12 is turned on, and an operation that current is sucked via the resistor R20 is performed. Thus, an upper limit value of the operational voltage VH can be set. Accordingly, with this structure, by selecting the resistor ratio of the resistors R18 and R19, it becomes possible to set the upper limit value of the operational voltage VH.
Accordingly, with the form shown in this
Next,
The structure shown in this
Meanwhile, in the case where the “VFmax” becomes extremely high due to any of the above-described several causes and as a result the output state of the analog comparator 7a becomes the relationship that A>B, the switch SW is switched to a state opposite to the state shown in
The structure shown in
Accordingly, with the form shown in this
In the embodiment shown in
Although the embodiments described above are explained based on a case where a structure of a conductance control method as shown in
Although a cathode line scan/anode line drive method is exemplified in a passive drive type light emitting display device shown in
Kanauchi, Katsuhiro, Hayafuji, Akinori
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