An embodiment of a wireless galvanic isolator device is formed by a transmitter circuit, a receiver circuit, and a wireless coupling structure, arranged between the transmitter circuit and the receiver circuit. The wireless coupling structure is formed by a pair of antennas each arranged on an own die and integrated together with the respective transmitter and receiver circuit. The two dice may be arranged adjacent to each other in a planar configuration or arranged on top of each other and bonded together.
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37. An integrated circuit, comprising:
a first die;
a receiver disposed on the first die;
a receive antenna disposed on the first die and coupled to the receiver;
a second die;
a transmitter disposed on the second die, wherein at least a portion of the transmitter is disposed on top of at least a portion of the receiver;
a transmit antenna disposed on the second die; and
an isolator disposed between the first die and the second die.
16. An integrated circuit, comprising:
a first die;
a transmitter disposed on the first die;
a transmit antenna disposed on the first die and coupled to the transmitter;
a second die;
a receiver disposed on the second die, wherein at least a portion of the receiver is disposed on top of at least a portion of the transmitter;
a receive antenna disposed on the second die; and
an isolator disposed between the first die and the second die.
32. A method, comprising:
generating a signal on a first die in an integrated circuit including the first die and a second die, and the first die includes a transmitter, the second die includes a receiver wherein the transmitter and the receiver are arranged on top of one another and galvanically isolated from one another by an isolating layer;
transmitting the signal via a transmit antenna disposed on the first die; and
receiving the transmitted signal with a receive antenna disposed on the second die.
26. A system, comprising:
a first integrated circuit, comprising
a first die,
a transmitter disposed on the first die,
a transmit antenna disposed on the first die and coupled to the transmitter,
a second die,
a receiver disposed on the second die, and
a receive antenna disposed on the second die; and
a second integrated circuit coupled to the first integrated circuit;
wherein the transmitter and receiver are arranged on top of one another and galvanically isolated from one another by an isolating layer arranged between the first die and the second die.
29. A system, comprising:
a first integrated circuit, comprising
a first die,
a transmitter disposed on the first die,
a transmit antenna disposed on the first die and coupled to the transmitter,
a second die,
a receiver disposed on the second die, and
a receive antenna disposed on the second die; and
a second integrated circuit coupled to the first integrated circuit;
wherein the first die and the second die are arranged on to of one another and galvanically isolated from one another by an isolating layer arranged between the first die and the second die; and
wherein the second integrated circuit is disposed on a third die.
1. A wireless galvanic-isolator device comprising:
a transmitter circuit;
a receiver circuit; and
a wireless coupling circuit arranged between said transmitter circuit and said receiver circuit, wherein said wireless coupling circuit includes an antenna;
wherein the antenna is formed by a transmitting antenna and a receiving antenna; said transmitter circuit and said transmitting antenna being integrated in a first die; said receiver circuit and said receiving antenna being integrated in a second die; said first and second dice being encapsulated in a single package; and
wherein the transmitter circuit and the receiver circuit are arranged on top of one another and galvanically isolated from one another by an isolating layer, arranged between said first and second dice.
31. A system, comprising:
a first integrated circuit, comprising
a first die,
a transmitter disposed on the first die,
a transmit antenna disposed on the first die and coupled to the transmitter,
a second die,
a receiver disposed on the second die, and
a receive antenna disposed on the second die; and
a second integrated circuit coupled to the first integrated circuit;
wherein the first die and the second die are arranged on top of one another and galvanically isolated from one another by an isolating layer arranged between the first die and the second die; and
further comprising:
a package;
wherein the first and second dies of the first integrated circuit are disposed within the package; and
the second integrated circuit comprises a third die disposed within the package.
30. A system, comprising:
a first integrated circuit, comprising
a first die,
a transmitter disposed on the first die,
a transmit antenna disposed on the first die and coupled to the transmitter,
a second die,
a receiver disposed on the second die, and
a receive antenna disposed on the second die; and
a second integrated circuit coupled to the first integrated circuit;
wherein the first die and the second die are arranged on top of one another and galvanically isolated from one another by an isolating layer arranged between the first die and the second die; and
wherein the first integrated circuit comprises a first package within which the first and second dies are disposed; and
the second integrated circuit comprises
a second package, and
a third die disposed within the second package.
9. A wireless galvanic-isolator device comprising:
a transmitter circuit;
a receiver circuit; and
a wireless coupling circuit arranged between said transmitter circuit and said receiver circuit, wherein said wireless coupling circuit includes an antenna;
wherein the antenna is formed by a transmitting antenna and a receiving antenna; said transmitter circuit and said transmitting antenna being integrated in a first die; said receiver circuit and said receiving antenna being integrated in a second die; said first and second dice being encapsulated in a single package;
wherein the first and second dice are arranged on top of one another and galvanically isolated from one another by an isolating layer, arranged between said first and second dice; and
wherein said first and second dice each comprise a semiconductor material substrate and a passivation region, the semiconductor material substrates of said first and second dice integrating, respectively, said transmitter circuit and said receiver circuit, said transmitting antenna and receiving antenna being formed in a top metal layer within the passivation region of said first die and of said second die, respectively.
11. A wireless galvanic-isolator device comprising:
a transmitter circuit;
a receiver circuit; and
a wireless coupling circuit arranged between said transmitter circuit and said receiver circuit, wherein said wireless coupling circuit includes an antenna;
wherein the antenna is formed by a transmitting antenna and a receiving antenna; said transmitter circuit and said transmitting antenna being integrated in a first die; said receiver circuit and said receiving antenna being integrated in a second die; said first and second dice being encapsulated in a single package;
wherein the first and second dice are arranged on to of one another and galvanically isolated from one another by an isolating layer, arranged between said first and second dice;
wherein said transmitter circuit comprises a data input configured to receive an input signal and an on-off modulation stage connected between said data input and said transmitting antenna and said receiver circuit comprises a data output and a demodulation stage connected between said receiving antenna and said data output; and
wherein said input signal comprises a first logic level and a second logic level, and said on-off modulation stage generates a radiofrequency signal comprising a first amplitude and a second amplitude associated, respectively, with said first and said second logic levels of said input signal.
2. The device according to
3. The device according to
4. The device according to
said transmitter circuit comprises a data input configured to receive an input signal and an on-off modulation stage connected between said data input and said transmitting antenna; and
said receiver circuit comprises a data output and a demodulation stage connected between said receiving antenna and said data output.
5. The device according to
6. The device according to
7. The device according to
8. The device according to
10. The device according to the
12. The device according to
13. The device according to
14. The device according to
15. The device according to
17. The integrated circuit of
a package; and
wherein the first and second dies are disposed within the package.
18. The integrated circuit of
19. The integrated circuit of
20. The integrated circuit of
21. The integrated circuit of
22. The integrated circuit of
the transmit antenna has a transmit frequency band in which the gain of the transmit antenna ranges from a maximum transmit gain to a lower transmit gain that is an amount less than the maximum transmit gain; and
the receive antenna has a receive frequency band in which the gain of the receive antenna ranges from a maximum receive gain to a lower receive gain that is substantially the amount less than the maximum receive gain, the receive frequency band overlapping the transmit frequency band.
23. The integrated circuit of
the transmit antenna has a transmit frequency band in which the gain of the transmit antenna ranges from a maximum transmit gain to a lower transmit gain that is an amount less than the maximum transmit gain; and
the receive antenna has a receive frequency band in which the gain of the receive antenna ranges from a maximum receive gain to a lower receive gain that is substantially the amount less than the maximum receive gain, the receive frequency band being substantially the same as the transmit frequency band.
24. The integrated circuit of
28. The system of
33. The method of
34. The method of
generating a common-mode-rejection compensating current; and
coupling the compensating current to the receive antenna.
35. The method of
36. The method of
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This application claims priority from Italian patent application No. TO2007A000325, filed May 11, 2007, which is incorporated herein by reference.
An embodiment of the present disclosure relates to an integrated galvanic isolator, in particular to a galvanic isolator for the transfer of numeric signals.
As is known, integrated isolators are today divided into three main classes. The first class includes optical couplers, which use a LED-phototransistor pair for performing a double electro-optical conversion. Some problems linked to this class of devices are due to the low efficiency of the fabrication process and to the limited bit rate that can be achieved, given the signal conversion, mentioned above, from the optical domain to electrical one, and vice versa.
Belonging to the second class are devices with a capacitive interface, wherein a pair of capacitors transfer the electrical signal; these devices are characterized by a galvanic isolation typically of approximately 10 kV. The devices with capacitive interface may be limited by a reduced immunity to common-mode voltage transients.
The third class comprises devices using transformers.
A device 30 of this type is shown in
The transmitter circuit/embedded in the first die 7a has the purpose of processing a data signal supplied on input pins and to be transmitted to the primary stage 3a of the transformer 3. The transmitter circuit/is coupled to the primary stage 3 via first connection wires 5a. The secondary stage 3b is coupled via second connection wires 5b to the third die 7c embedding the receiver circuit 2. In the example considered, the primary stage 3a is formed by depositing a layer of gold above the moulding compound 4; the secondary stage 3b is formed in the top metal layer provided for in a CMOS fabrication process. The transmitter circuit/and the receiver circuit 2 operate typically in base-band and thus enable transmission of only one data channel.
The known device described above may require some constructional post-processing steps to provide the primary stage 3a and the secondary stage 3b of the transformer 3, which may entail a high cost of the device.
In addition, none of the devices mentioned above enables a proper radiofrequency wireless transmission, and they require complex structures or wires for connection of different parts of the device.
An embodiment of the present disclosure provides an integrated galvanic isolator that solves problems of known devices and, in particular, may not require constructional post-processing steps or wires for connection of the various parts.
One or more embodiments of the disclosure are now described, purely by way of non-limiting example with reference to the attached drawings, wherein:
According to
The transmitter circuit 31 comprises a data input 34, receiving an input signal 100, a reference input 35, coupled to a ground potential, and an output 36, coupled to the transmitting antenna 33a. The transmitter circuit 31 processes the input signal 100, translates it into radiofrequency and supplies it to the transmitting antenna 33a.
The receiving antenna 33b is coupled to the transmitting antenna 33a and is coupled to an input 37 of the receiver circuit 32, which processes the signal received, translates it into base-band and supplies it to an output 38. The receiver circuit 32 moreover has a reference terminal 39, coupled to a ground potential which may be different from the ground potential to which the transmitter circuit 31 is coupled.
The transmitting and receiving antennas 33a, 33b may be formed by dipoles, bent dipoles, or loop antennas. The transmitting and receiving antennas 33a, 33b generate a near-field or far-field electromagnetic coupling according to the operating conditions, i.e., according to the ratio between the wavelength and the distance between the two antennas, i.e., the transmitting antenna 33a and the receiving antenna 33b. In fact, on the hypothesis that:
where r is the distance between the two antennas, D is the largest dimension of the radiant parts of the antennas 33a, 33b, and λ is the wavelength of the radiofrequency signal, the antennas 33a, 33b operate in far-field conditions, otherwise they operate in near-field conditions. In this connection see: Antenna Theory, Constantine A. Balanis, 2nd Ed. John Wiley & Sons. Inc., Chapters 4 and 5, this reference being incorporated herein in its entirely.
According to a first embodiment (illustrated in
In the considered embodiment, the transmitting and receiving antennas 33a, 33b have a square-loop shape, are mounted on a same plane and surround, respectively, active areas, integrating, respectively, the transmitter circuit 31 and the receiver circuit 32, as shown in
The embodiment of
Instead, the common-mode coupling is directly proportional to the coupling capacity of the antennas. As is known, the coupling capacity is proportional to the common area of the two plates of a capacitor, here formed by the area of the mutually facing sides 33c, of very small dimensions.
In the embodiment of
In simulations of the device of
In detail, the dice 25, 26 comprise a respective substrate 48, 49, of semiconductor material, accommodating regions 50 with different types of conductivity, forming the transmitter circuit 31 and receiver circuit 32. Respective passivation regions 44 and 45 extend on top of the substrates 48, 49 and accommodate different metal levels, which form electrical connections and the antennas 33a, 33b. For simplicity,
The second die 26 may have a greater thickness than the first die 25a; for example, the first die 25 may have a thickness of approximately 150 μm, the second die 26 may have a thickness of approximately 500 μm, and the isolating layer 41 may have a thickness of approximately 300 μm.
In the embodiment of
In the embodiment of
The arrangement shown enables a simple bonding of the dice 25, 26, as well as a simple accessibility by the connection wires 29 to the terminals forming the data input 34, the ground terminal 35, and the output terminal 38 of the transmitter circuit 31 and of the receiver circuit 32.
As may be noted clearly in
With the circuit of
where S11, S12, S21, and S22 are scattering parameters. As is known, S11, defined as the ratio between b1 and a1 calculated with a2=0, i.e., with load adapted on the second port, determines the coefficient of reflection on the first port of the quadrupole. A low value of S11 implies that the transmitting antenna 33a is well designed and protects the transmitter circuit 31 from possible damage deriving from reflections of radiofrequency signal transmitted by the transmitting antenna 33a. In the described embodiment, the measured scattering parameter S11 is approximately equal to −33 dB.
The integrated galvanic isolators 30 shown in
In particular,
For example, the logic level 1 of the data signal 100 may be associated with an amplitude of the radiofrequency signal 300 approximately equal to 6 Vpp, while the logic level 0 may be associated with an amplitude of the radiofrequency signal 300 approximately equal to 4 Vpp.
The radiofrequency signal 300 is then supplied to a first buffer 14 for adapting the radiofrequency signal 300 to the antenna 33a.
The receiving antenna 33b is coupled to an amplifier stage 16 belonging to the receiver circuit 32 and coupled to a mixer stage 17. In turn, the mixer stage 17 is coupled to a RC-type, lowpass filter 18, which eliminates the double-frequency components generated by the mixer stage 17, outputting an envelope signal 400, shown as an example in
The envelope signal 400 is then squared by a first and a second trigger circuits 19a, 19b operating so as to output respective signals, the logic level whereof is 1 only if the signal at their inputs exceeds a respective threshold voltage Vth, Vtl, which are different from one another and are linked to a respective amplitude of the radiofrequency signal 300.
In detail, for the first trigger circuit 19a we have:
Vth≦Vh±Vn
where Vth is the threshold voltage of the first trigger circuit 19a, Vh is the first amplitude of the radiofrequency signal 300, and Vn is a noise component.
The second trigger circuit 19b has a threshold voltage Vtl, which is linked to the second amplitude Vl of the radiofrequency signal 300. In this case:
Vtl≧VI±Vn
where Vl is the second amplitude of the radiofrequency signal 300, and Vn the noise component.
In practice, the signal generated by the second trigger circuit 19b is a delayed replica of the first clock signal CKT.
The output signals of the trigger circuits 19a, 19b are supplied to a second buffer 15 and from this to a D flip-flop (DFF) 20, which outputs a reconstructed signal 500, supplied to a serial-to-parallel converter 12b, synchronized with the replica of the second clock signal CKT extracted from the second trigger circuit 19b. A chain of inverters 40 delays the signal at output of the second trigger circuit 19b by approximately 2 ns with respect to the signal at output of the first trigger circuit 19a. Thereby, this allows that, during the rising edge of the clock input CK of the flip-flop 20, the input D sees the correct logic level to be outputted.
The serial-to-parallel converter 12b then divides the data in serial format so as to obtain a plurality of output channels Ch1′-Ch4′, which are transferred to the outside of the circuit via the output 38. The format of the output channels Ch1′-Ch4′ may be identical to the format of the input channels Ch1-Ch4, apart from the temporal translation given by the propagation and processing delays.
The embodiment shown in
As may be noted, the pulse distortion, defined as
PD=|TLH−THL|,
where TLH is the pulse delay of the reconstructed signal 500 with respect to the data signal 100 during a transition from the logic level 0 to the logic level 1, while THL is the pulse delay of the reconstructed signal 500 with respect to the data signal 100 during a transition from the logic level 1 to the logic level 0 TLH and THL are comprised between approximately 0.5 and 1 ns.
The embodiment shown in
In fact, the common-mode voltage transient (dV/dt) in the transmitter circuit 31 with respect to the receiver circuit 32 produces a parasitic current Ip, proportional to the parasitic electrical coupling, which is equal to:
where C is the parasitic capacitance between the two antennas.
As is shown in
The protection circuit 50 is sized so that, in the presence of very intense common-mode transients (for example, 50 kV/μs), the following condition is verified:
Ip≈Ip′
While
Ip″=0
Consequently, in the receiving antenna 33b, the parasitic common-mode current no longer flows to the receiver. This current is instead “captured” in a more or less high percentage (depending upon the sizing of the components of the circuit shown in
The solution proposed in
Advantages of the described isolator are clarified hereinafter. In particular, an embodiment of the galvanic isolator described above may be formed using process steps per se known, without requiring particular steps after forming the passivation region 44 and 45 or after forming the top metal level.
In addition, an embodiment of the described galvanic isolator 30 provides a radiofrequency structure for multichannel wireless transfer of data, characterized by a high transceiving rate and by a single interface, and thus not costly and highly reliable.
Finally, it is evident that modifications and variations can be made to the described embodiments of the galvanic isolator 30, without departing from the spirit and scope of the present disclosure. In particular, the components of the transmitter circuit 31 and receiver circuit 32 may vary with respect to what illustrated; for example, the type of filter used may be different. In addition, in the embodiment illustrated in
In another embodiment, the transmitter, transmit antenna, receiver, and receive antenna may be disposed on a same die.
Furthermore, the transmit/receive device may be coupled to another IC, such as a controller, to form a system.
Moreover, although described as binary signals, the signals input to the transmitter and output from the receiver may be other than binary signals.
Girlando, Giovanni, Palmisano, Giuseppe, Smerzi, Santo Alessandro, Spina, Nunzio
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