A circuit board having a removing area is provided. The circuit board includes a first dielectric layer, a first laser resistant structure disposed on the first dielectric layer and located at the periphery of the removing area, a second dielectric layer disposed on the first dielectric layer, a circuit layer disposed on the second dielectric layer, a second laser resistant structure disposed on the second dielectric layer and located at the periphery of the removing area, and a third dielectric layer disposed on the second dielectric layer. The second laser resistant structure is insulated from the circuit layer. There is a gap between the second laser resistant structure and the circuit layer, and the vertical projection of the gap on a first surface overlaps the first laser resistant structure. The third dielectric layer exposes the portion of the circuit layer within the removing area.
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8. A circuit board, having a removing area, the circuit board comprising:
a first dielectric layer;
a circuit layer, disposed on a surface of the first dielectric layer, wherein a portion of the circuit layer is extended from outside of the removing area into the removing area;
a laser resistant structure for blocking a laser beam to prevent the laser beam from etching a dielectric layer below the laser resistant structure, disposed on the surface, located at the periphery of the removing area, and insulated from the circuit layer, wherein the second laser resistant structure is an annular structure, there is at least one gap between the laser resistant structure and the circuit layer, and the circuit layer is extended from the gap into the removing area; and
a second dielectric layer, disposed on the first dielectric layer, and having an opening corresponding to the removing area, wherein the opening exposes a portion of the circuit layer located within the removing area.
1. A circuit board, having a removing area, the circuit board comprising:
a first dielectric layer;
a first laser resistant structure for blocking a laser beam to prevent the laser beam from etching a dielectric layer below the first laser resistant structure, disposed on a first surface of the first dielectric layer and located at a periphery of the removing area;
a second dielectric layer, disposed on the first dielectric layer and covering the first laser resistant structure;
a circuit layer, disposed on a second surface of the second dielectric layer, wherein a portion of the circuit layer is extended from outside of the removing area into the removing area;
a second laser resistant structure for blocking the laser beam to prevent the laser beam from etching a dielectric layer below the second laser resistant structure, disposed on the second surface, located at the periphery of the removing area, and insulated from the circuit layer, wherein the second laser resistant structure is an annular structure, there is at least one gap between the second laser resistant structure and the circuit layer, the circuit layer is extended from the gap into the removing area, and a vertical projection of the gap on the first surface overlaps the first laser resistant structure; and
a third dielectric layer, disposed on the second dielectric layer, and having an opening corresponding to the removing area, wherein the opening exposes a portion of the circuit layer located within the removing area and the third dielectric layer covers a portion of the second laser resistant structure.
2. The circuit board according to
3. The circuit board according to
4. The circuit board according to
5. The circuit board according to
6. The circuit board according to
7. The circuit board according to
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This application claims the priority benefit of Taiwan application serial no. 98111066, filed on Apr. 2, 2009. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.
1. Field of the Invention
The present invention generally relates to a circuit board and a manufacturing method thereof, and more particularly, to a circuit board and a manufacturing method thereof with effective laser machining depth control.
2. Description of Related Art
Today's market demands electronic products to be designed small, slim, light, and highly portable. Accordingly, electronic parts in these electronic products have to be designed small and thin too. Thereby, a conventional technique for reducing the thickness of a portion of a circuit board is provided.
First, referring to both
Then, referring to
However, it is difficult to control the depth of the laser machining when the third dielectric layer 140 and the fourth dielectric layer 150 are removed through laser machining. As a result, the second dielectric layer 120 or even the first dielectric layer 110 may be over trenched.
Accordingly, the present invention is directed to a circuit board, and more particularly, to a circuit board structure with effective laser machining depth control.
The present invention is further directed to a manufacturing method of a circuit board, wherein the laser machining depth is effectively controlled.
The present invention provides a circuit board having a removing area. The circuit board includes a first dielectric layer, a first laser resistant structure, a second dielectric layer, a circuit layer, a second laser resistant structure, and a third dielectric layer. The first laser resistant structure is disposed on a first surface of the first dielectric layer and located at the periphery of the removing area. The second dielectric layer is disposed on the first dielectric layer and covers the first laser resistant structure. The circuit layer is disposed on a second surface of the second dielectric layer, and a portion of the circuit layer is extended from outside of the removing area into the removing area. The second laser resistant structure is disposed on the second surface and located at the periphery of the removing area, and the second laser resistant structure is insulated from the circuit layer. There is at least one gap between the second laser resistant structure and the circuit layer, and the vertical projection of the gap on the first surface overlaps the first laser resistant structure. The third dielectric layer is disposed on the second dielectric layer and has an opening corresponding to the removing area, wherein the opening exposes the portions of the circuit layer located within the removing area. The third dielectric layer covers a portion of the second laser resistant structure.
According to an embodiment of the present invention, the second laser resistant structure is an annular structure, wherein the annular structure has at least one nick, and the circuit layer is extended from the nick into the removing area.
According to an embodiment of the present invention, the first laser resistant structure includes a plurality of punctual structures independent from each other when there are multiple gaps between the second laser resistant structure and the circuit layer.
According to an embodiment of the present invention, the first laser resistant structure includes a strip structure.
According to an embodiment of the present invention, the strip structure overlaps the vertical projection of the second laser resistant structure on the first surface.
According to an embodiment of the present invention, the second dielectric layer has at least one cavity located below the gap.
According to an embodiment of the present invention, the cavity exposes the first laser resistant structure.
According to an embodiment of the present invention, the circuit board further includes a third laser resistant structure, wherein the third laser resistant structure is disposed on the second surface and located at the periphery of the pre-removing area, and the third laser resistant structure is connected with the portion of the circuit layer located at the periphery of the removing area and is insulated from the second laser resistant structure.
According to an embodiment of the present invention, the circuit board further includes a protection layer, wherein the protection layer covers the portion of the circuit layer located within the removing area.
According to an embodiment of the present invention, the opening exposes a portion of the second laser resistant structure located within the removing area.
The present invention provides a manufacturing method of a circuit board. First, a substrate having a pre-removing area is provided. The substrate includes a first dielectric layer, a first laser resistant structure, a second dielectric layer, a circuit layer, a second laser resistant structure, and a third dielectric layer. The first laser resistant structure is disposed on a first surface of the first dielectric layer and located at the periphery of the pre-removing area. The second dielectric layer is disposed on the first dielectric layer and covers the first laser resistant structure. The circuit layer is disposed on a second surface of the second dielectric layer, and a portion of the circuit layer is extended from outside of the pre-removing area into the pre-removing area. The second laser resistant structure is disposed on the second surface and located at the periphery of the pre-removing area, and the second laser resistant structure is insulated from the circuit layer. There is at least one gap between the second laser resistant structure and the circuit layer, and the vertical projection of the gap on the first surface overlaps the first laser resistant structure. The third dielectric layer is disposed on the second dielectric layer and covers the circuit layer and the second laser resistant structure. Then, a laser machining process is performed to etch the third dielectric layer located at the periphery of the pre-removing area. Next, the portion of the third dielectric layer located within the pre-removing area is removed.
According to an embodiment of the present invention, the laser machining process further includes etching the portion of the second dielectric layer located below the gap.
According to an embodiment of the present invention, the laser machining process does not etch the first dielectric layer.
According to an embodiment of the present invention, the technique of removing the third dielectric layer includes a lift-off technique.
According to an embodiment of the present invention, the second laser resistant structure is an annular structure, wherein annular structure has at least one nick, and the circuit layer is extended from the nick into the pre-removing area.
According to an embodiment of the present invention, the first laser resistant structure includes a plurality of punctual structures independent from each other when there are multiple gaps between the second laser resistant structure and the circuit layer.
According to an embodiment of the present invention, the first laser resistant structure includes a strip structure.
According to an embodiment of the present invention, the strip structure overlaps the vertical projection of the second laser resistant structure on the first surface.
According to an embodiment of the present invention, the substrate further includes a third laser resistant structure, the third laser resistant structure is disposed on the second surface and located at the periphery of the pre-removing area, and the third laser resistant structure is connected with the portion of the circuit layer located at the periphery of the removing area and is insulated from the second laser resistant structure.
According to an embodiment of the present invention, the substrate further includes a protection layer, wherein the protection layer covers the portion of the circuit layer located within the pre-removing area.
According to an embodiment of the present invention, the manufacturing method further comprises performing an etching process to remove the second laser resistant structure.
According to an embodiment of the present invention, the manufacturing method further comprises performing a mechanical processing to remove a portion of the second laser resistant structure located within the pre-removing area.
According to an embodiment of the present invention, the manufacturing method further comprises performing an etching process to remove the first laser resistant structure.
According to an embodiment of the present invention, the manufacturing method further comprises performing a mechanical processing to remove the first laser resistant structure.
The present invention provides a circuit board having a removing area. The circuit board comprises a first dielectric layer, a circuit layer, a laser resistant structure, and a second dielectric layer. The circuit layer is disposed on a surface of the first dielectric layer, wherein a portion of the circuit layer is extended from outside of the removing area into the removing area. The laser resistant structure is disposed on the surface, located at the periphery of the removing area, and insulated from the circuit layer, wherein there is at least one gap between the laser resistant structure and the circuit layer. The second dielectric layer is disposed on the first dielectric layer, and has an opening corresponding to the removing area, wherein the opening exposes a portion of the circuit layer located within the removing area.
As described above, in the present invention, the circuit board has a first laser resistant structure and a second laser resistant structure such that the depth of laser machining can be controlled through the second laser resistant structure, and the first dielectric layer under the first laser resistant structure is protected by the first laser resistant structure from the laser machining process.
In order to make the above and other features and advantages of the present invention more comprehensible, several embodiments accompanied with figures are described in detail below.
The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.
FIGS. 3A-3D′ and
Reference will now be made in detail to the present preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts.
FIGS. 3A-3D′ and
It should be noted that the position of the line I-I′ in
First, referring to
The first laser resistant structure 320 is disposed on a first surface 312 of the first dielectric layer 310 and located at the periphery of the pre-removing area L. The second dielectric layer 330 is disposed on the first dielectric layer 310 and covers the first laser resistant structure 320. The circuit layer 340 is disposed on a second surface 332 of the second dielectric layer 330, and a portion of the circuit layer 340 is extended from outside of the pre-removing area L into the pre-removing area L.
The second laser resistant structure 350 is disposed on the second surface 332 and located at the periphery of the pre-removing area L and is insulated from the circuit layer 340. A portion of the second laser resistant structure 350 is located in the pre-removing area L and another portion of the second laser resistant structure 350 is located outside of the pre-removing area L. There is a plurality of gaps G between the second laser resistant structure 350 and the circuit layer 340, and the vertical projection of the gaps G on the first surface 312 overlaps the first laser resistant structure 320.
The third dielectric layer 360 is disposed on the second dielectric layer 330 and covers the circuit layer 340 and the second laser resistant structure 350. In the present embodiment, the substrate S further includes a fourth dielectric layer 370 disposed on the third dielectric layer 360.
In the present embodiment, the substrate S further includes a protection layer 380. The protection layer 380 covers the portion of the circuit layer 340 located within the pre-removing area L so that the circuit layer 340 will not be affected by the subsequent removal of the third dielectric layer 360 and the fourth dielectric layer 370.
Next, referring to
To be specific, the laser machining takes place at the periphery of the pre-removing area L (i.e., the area L marked with dotted lines in
In addition, to improve the performance of the second laser resistant structure 350 in laser machining blocking, in the present embodiment, the width D of the second laser resistant structure 350 is designed to be greater than the radian of the laser beam. Thus, ideally, the cavities T only expose the portion of the second laser resistant structure 350 located at the periphery of the pre-removing area L.
It should be noted that in the present embodiment, the substrate S has the first laser resistant structure 320, and when a laser beam passes through the second dielectric layer 330 below the gaps G, the laser beam is blocked by the first laser resistant structure 320 below the gaps G. Thus, the first laser resistant structure 320 can protect the first dielectric layer 310 below the first laser resistant structure 320 from the laser machining and help to control the depth of the laser machining. Herein the laser machining process may form cavities 334 on the second dielectric layer 330 below the gaps G.
Thereafter, referring to
Referring to
Referring to FIG. 3D′, in the other embodiment, the second laser resistant structure 350 is removed through an etching processing. In addition, the first laser resistant structure 320 is removed through an etching processing.
Below, the structure of the circuit board 300 will be described in detail.
Referring to
The first laser resistant structure 320 is disposed on a first surface 312 of the first dielectric layer 310 and located at the periphery of the removing area L1. The second dielectric layer 330 is disposed on the first dielectric layer 310 and covers the first laser resistant structure 320. The circuit layer 340 is disposed on a second surface 332 of the second dielectric layer 330, and a portion of the circuit layer 340 is extended from outside of the removing area L1 into the removing area L1.
In the present embodiment, the circuit board 300 includes a plurality of third laser resistant structures 390. The third laser resistant structures 390 are disposed on the second surface 332 and located at the periphery of the removing area L1. The third laser resistant structures 390 are connected with the portion of the circuit layer 340 located at the periphery of the removing area L1 and are insulated from the second laser resistant structure 350.
The second laser resistant structure 350 is disposed on the second surface 332 and located at the periphery of the removing area L1, and the second laser resistant structure 350 is insulated from the circuit layer 340. There are a plurality of gaps G between the second laser resistant structure 350 and the circuit layer 340, and the vertical projection of the gaps G on the first surface 312 overlaps the first laser resistant structure 320.
In order to improve the performance of the first laser resistant structure 320 in the laser machining blocking, in the present embodiment, the size of the first laser resistant structure 320 is designed to be larger than the area of the vertical projection of the gaps G on the first surface 312 so that the vertical projection of the gaps G on the first surface 312 can completely fall on the first laser resistant structure 320. Additionally, in the present embodiment, the second dielectric layer 330 may have multiple cavities 334 located below the gaps G. The cavities 334 expose the first laser resistant structure 320.
To be specific, in the present embodiment, the second laser resistant structure 350 is an annular structure. The annular structure has a plurality of nicks B, and a portion of the circuit layer 340 is extended from the nicks B into the removing area L1. Besides, in the present embodiment, the first laser resistant structure 320 may be a plurality of punctual structures independent from each other. In other embodiments, the first laser resistant structure 320 may be a strip structure or an annular structure, and the strip structure or the annular structure may overlap the vertical projection of the second laser resistant structure 350 on the first surface 312.
The third dielectric layer 360 is disposed on the second dielectric layer 330 and has an opening O corresponding to the removing area L1. In the present embodiment, the circuit board 300 further includes a fourth dielectric layer 370. The fourth dielectric layer 370 is disposed on the third dielectric layer 360 and has an opening O1 corresponding to the opening O. The openings O and O1 expose the portions of the circuit layer 340 and the second laser resistant structure 350 located within the removing area L1. Moreover, in the present embodiment, a protection layer 380 may be disposed within the removing area L1, wherein the protection layer 380 covers the portion of the circuit layer 340 located within the removing area L1 to protect the circuit layer 340 exposed by the openings O and O1.
It should be noted that even though one removing area L1 is described as an example in the present embodiment, the present invention is not limited thereto. For example, in other embodiments, the circuit board may also have multiple removing areas, and these removing areas may be selectively located at the same side or two opposite sides of the circuit board.
As described above, a circuit board provided by the present invention has a first laser resistant structure and a second laser resistant structure such that the depth of the laser machining can be controlled through the second laser resistant structure. Besides, the first dielectric layer below the first laser resistant structure is protected by the first laser resistant structure from the laser machining.
It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.
Patent | Priority | Assignee | Title |
10039184, | Nov 30 2016 | Unimicron Technology Corp. | Circuit board structure and manufacturing method thereof |
10804205, | Aug 22 2019 | BRIDGE SEMICONDUCTOR CORP. | Interconnect substrate with stiffener and warp balancer and semiconductor assembly using the same |
9997442, | Dec 14 2016 | Advanced Semiconductor Engineering, Inc. | Semiconductor device and method of manufacturing the same |
Patent | Priority | Assignee | Title |
4714516, | Sep 26 1986 | Lockheed Martin Corporation | Method to produce via holes in polymer dielectrics for multiple electronic circuit chip packaging |
6787398, | May 24 2000 | COLLABO INNOVATIONS, INC | Method of fabricating a high frequency signal amplification device |
JP11154789, | |||
JP2001358247, | |||
JP2006019441, | |||
JP2006128207, | |||
JP2007266196, | |||
JP7336055, | |||
TW200636943, |
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