A dc offset component that occurs in a quadrature modulation system, and that is contained in a modulated transmit signal, is compensated for with good accuracy. In a dc offset compensation method according to the present invention, a dc offset correction value obtained from the transmit signal is weighted in accordance with the signal level of an input signal which is transmit data input to the quadrature modulation system, and the dc offset component contained in the transmit signal is compensated for by using the thus weighted dc offset correction value.
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25. A dc offset compensation method used in a transmitter for compensating for an offset component, which is contained in a transmit signal produced by modulating two quadrature carriers in accordance with an input signal to be transmitted by said transmitter comprising an in-phase component signal and a quadrature component signal and derived from dc offset contained in the in-phase component signal and the quadrature component signal, the dc offset compensation method comprising:
generating a dc offset correction value based on the input signal to be transmitted by said transmitter and the output signal; and
compensating the offset component based on the dc offset correction value which is multiplied by a weighting factor reflecting an effect of a variation of an input signal level of the input signal to be transmitted by said transmitter on the offset component.
1. A dc offset compensation method used in a transmitter for compensating for a component which is contained in a transmit signal produced by modulating two quadrature carriers in accordance with an input signal to be transmitted by said transmitter comprising an in-phase component signal and a quadrature component signal and derived from dc offset contained in said in-phase component signal and said quadrature component signal, said compensation being performed using a dc offset correction value obtained from said transmit signal, wherein:
generating a dc offset correction value based on the transmit signal;
detecting signal levels of the input signal to be transmitted by the transmitter;
weighting the dc offset correction value by multiplying the dc offset correction by a weighting factor reflecting an effect of a variation of detected input signal levels of the input signal to be transmitted by said transmitter on dc offset components; and
compensating the dc offset components using the weighted dc offset correction value.
13. A dc offset compensation device used in quadrature modulation which produces a transmit signal in a transmitter by modulating two quadrature carriers in accordance with an input signal to be transmitted by said transmitter comprising an in-phase component signal and a quadrature component signal, for compensating for a component which is contained in said transmit signal and derived from dc offset contained in said in-phase component signal and said quadrature component signal by using a dc offset correction value obtained from said transmit signal, comprising:
a dc offset generating unit which generates a dc offset correction value based on the transmit signal;
a signal level detecting unit which detects signal level of said input signal to be transmitted by said transmitter;
a weighting unit which weights said dc offset correction value by multiplying the dc offset correction by a weighting factor reflecting an effect of a variation of detected input signal levels of the input signal to be transmitted by said transmitter on dc offset components; and
a compensating unit which compensates the dc offset components using the weighted dc offset correction value.
2. The dc offset compensation method as claimed in
3. The dc offset compensation method as claimed in
4. The dc offset compensation method as claimed in
5. The dc offset compensation method as claimed in
a weighting factor to be applied to said dc offset correction value is stored, and
said dc offset correction value is weighed in accordance with said stored weighting factor.
6. The dc offset compensation method as claimed in
an offset amount is measured for said dc offset component contained in said transmit signal, and
said stored weighting factor is updated so as to minimize said offset amount.
7. The dc offset compensation method as claimed in
a weighting factor to be applied to said dc offset correction value is set and stored in advance for each signal level of said input signal, and
said dc offset correction value is weighted in accordance with said set weighting factor.
8. The dc offset compensation method as claimed in
an offset amount is measured for said component contained in said transmit signal modulated when arbitrary transmit data is input as said input signal,
an offset amount is measured for said component contained in said transmit signal modulated when a training signal of a signal level corresponding to said each signal level is input as said input signal, and
the weighting factor to be applied to said dc offset correction value is calculated for each signal level of said input signal, based on the difference between the offset amount for said arbitrary transmit data and the offset amount for said training signal of said each signal level.
9. The dc offset compensation method as claimed in
10. The dc offset compensation method as claimed in
11. The dc offset compensation method as claimed in
12. The dc offset compensation method as claimed in
14. The dc offset compensation device as claimed in
said weighting factor calculating unit calculates said weighting factor in accordance with said average value.
15. The dc offset compensation device as claimed in
said weighting unit weights said dc offset correction value in accordance with said average value.
16. The dc offset compensation device as claimed in
17. The dc offset compensation device as claimed in
said weighting unit weights said dc offset correction value in accordance with said stored weighting factor.
18. The dc offset compensation device as claimed in
an offset amount measuring unit which measures from said transmit signal an offset amount for the dc offset component contained in said transmit signal; and
a weighting factor updating unit which minimizes said measured offset amount by updating said weighting factor stored for said dc offset correction value.
19. The dc offset compensation device as claimed in
a weighting factor setting unit which sets each weighting factor to be applied to said dc offset correction value for each signal level of said input signal, wherein
said weighting factor storing unit stores said each weighting factor preset by said weighting factor setting unit.
20. The dc offset compensation device as claimed in
an offset amount measuring unit which measures from said transmit signal an offset amount for the component contained in said transmit signal, wherein
said weighting factor calculating unit calculates said each weighting factor based on the difference between the offset amount of the component measured in said transmit signal modulated when arbitrary transmit data is input as said input signal and the offset amount of the component measured in said transmit signal modulated when a training signal of a signal level corresponding to said each signal level is input as said input signal.
21. The dc offset compensation device as claimed in
22. The dc offset compensation device as claimed in
23. The dc offset compensation device as claimed in
24. The dc offset compensation device as claimed in
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This application is a continuation application and is based upon PCT/JP2005/00002, filed on Jan. 4, 2005. TECHNICAL FIELD. The Substitute Specification contains no new matter.
The present invention relates generally to quadrature modulation in which a transmit signal is produced by modulating two quadrature carriers in accordance with an input signal comprising an in-phase component signal and a quadrature component signal, and more particularly to a DC offset compensation method and DC offset compensation device for compensating for a DC offset contained in the transmit signal. More specifically, the invention relates to a DC offset compensation method and DC offset compensation device which performs the DC offset compensation by using a DC offset correction value obtained from the transmit signal.
A quadrature modulation system, which produces a transmit signal by modulating two quadrature carriers in accordance with an input signal comprising an in-phase component signal and a quadrature component signal, can flexibly achieve a variety of modulation schemes and signal constellations, and is therefore employed in many communication apparatuses and electronic appliances.
These input signal components are converted by D/A converters 13I and 13Q, provided in the I and Q channels respectively, into analog signals for the respective channels. Then, the transmit signal is formed by modulating the two carriers with the respective analog signals in a quadrature modulator 14, and the thus formed transmit signal is fed via a power amplifier 15 to an antenna (not shown) for transmission.
In such a quadrature modulation system, when frequency-converting the transmit signal, i.e., the complex baseband signal, by the analog quadrature modulator (QMOD), a DC offset may be added to the transmit signal in analog device circuits in the quadrature modulation system as a whole, for example, in the analog device circuits between the quadrature modulator 14 and the digital/analog converters 13I and 13Q (hereinafter called the “D/A converters”), due to differences or variations in the characteristics of multiplier circuits in the analog domain.
This DC offset manifests itself as a carrier leakage (unwanted carrier) in the frequency-converted analog transmit signal, causing an adjacent channel leakage and thus leading to a degradation of the transmit signal quality.
In one method practiced in the prior art to compensate for the DC offset, a component inverse in polarity to the DC offset expected to be added during the process between the D/A converters 13I and 13Q and the quadrature modulator 14 is added in advance to the transmit signal before input to the D/A converters 13I and 13Q, thereby canceling out the DC offset.
To generate such a DC offset canceling signal, there is proposed a method in which a portion of the quadrature-modulated transmit signal is fed back and the feedback signal is analyzed to measure and correct the DC offset (refer, for example, to patent document 1 listed below), and also a method in which the transmit signal is subtracted from the feedback signal to extract an error component and then the DC offset is measured and corrected.
For this purpose, a directional coupler 16 is inserted between the power amplifier 15 and the antenna (not shown), and a portion of the transmit signal is fed back through a monitor terminal of the directional coupler 16. The transmit signal thus fed back is passed through a mixer 82, an analog/digital converter (hereinafter called the “A/D converter”) 83, and a quadrature demodulator 84 to generate quadrature monitored signals i and q, which are supplied to a DC offset correction value estimating unit 20.
Then, based on these quadrature monitored signals i and q and the earlier described input signal components, the DC offset correction value estimating unit 20 estimates DC offset correction values for compensating for the DC offset for the in-phase and quadrature components, respectively.
The DC offset correction values thus estimated are added by adders 12I and 12Q respectively to the in-phase and quadrature input signal components before input to the respective D/A converters.
An output signal of an oscillator 81 is input to the mixer 82 through its local oscillator input terminal, and the transmit signal separated by the directional coupler 16 is mixed with the local oscillator signal for frequency conversion to produce an intermediate frequency signal.
The A/D converter 83 converts the intermediate frequency signal into a digital signal that is synchronized to a clock signal of a given frequency.
The quadrature demodulator 84 quadrature-demodulates the digital signal to produce the quadrature monitored signals i and q corresponding to the I and Q channels, respectively, that are in phase quadrature to each other.
The DC offset correction value estimating unit 20 obtains offset components contained in the quadrature monitored signals i and q, for example, by smoothing these signals in the complex plane. Likewise, the DC offset correction value estimating unit 20 obtains offset components contained in the in-phase and quadrature input signal components by smoothing them in the complex plane.
Then, the DC offset correction value estimating unit 20 extracts only the offset component added in the quadrature modulation system 1 by subtracting the in-phase signal component in the quadrature monitored signal i and the quadrature signal component in the quadranture monitored signal q from the respective input components I and Q, and estimate the inverse offset obtained by inverting the sign of the offset component as the DC offset correction value.
Patent document 1: Japanese Unexamined Patent Publication No. H10-79692
Patent document 2: Japanese Unexamined Patent Publication No. 2001-237723
Problem to be Solved by the Invention
As described above, the DC offset occurs due to differences or variations in the characteristics of the multiplier circuits in the analog domain in the quadrature modulation system as a whole. Accordingly, the amount of offset may vary according to the input modulating signal.
However, the above-described prior art DC offset compensation method, which generates the DC offset correction value by smoothing the feedback signal, has had the problem that a variation in the input signal is not reflected in the DC offset correction value and, therefore, compensation for the DC offset cannot be performed with good accuracy.
In view of the above problem, it is an object of the present invention to achieve quadrature modulation in which the DC offset contained in the transmit signal can be compensated for with good accuracy.
Means for Solving the Problem
In quadrature modulation which produces a transmit signal by modulating two quadrature carriers in accordance with an input signal comprising an in-phase component signal and a quadrature component signal, the present inventors have discovered that the DC offset contained in the transmit signal varies with the signal level of the input signal, and have conceived of the invention based on this discovery.
In the present invention, as will be described in detail later with reference to drawings, a DC offset correction value is obtained from the transmit signal and is weighted in accordance with the signal level of the input signal, and the DC offset is compensated for by using the thus weighted DC offset correction value.
In the present invention, the DC offset correction value is stored for each signal level of the input signal. Then, the stored DC offset correction value is retrieved based on the signal level of the input signal, and the DC offset is compensated for by using the thus retrieved DC offset correction value.
Further, in the present invention, an approximation equation is determined which is used to calculate from each signal level of the input signal the DC offset correction value corresponding to that signal level and, using this approximation equation, the DC offset correction value that matches the signal level of the input signal is calculated, and the DC offset is compensated for by using the thus calculated DC offset correction value.
In this way, by weighting or varying the DC offset correction value in accordance with the signal level of the input signal, the effect that the variation of the input signal has on the offset is reflected in the correction value so that the DC offset can be compensated for with good accuracy.
10. QUADRATURE MODULATING UNIT
20. DC OFFSET CORRECTION VALUE ESTIMATING UNIT
30. SIGNAL LEVEL DETECTING UNIT
40. WEIGHTING FACTOR CALCULATING UNIT
50. WEIGHTING UNIT
60. DC OFFSET CORRECTION VALUE STORING UNIT
70. DC OFFSET CORRECTION VALUE CALCULATING UNIT
The basic configuration of the present invention will be described below.
In view of this, in the basic configuration shown in
Embodiments of the present invention will be described below with reference to the accompanying drawings.
The quadrature modulation system 1 receives transmit data, for example, a complex baseband signal or the like, as an input signal, and modulates two quadrature carriers with the input signal to produce a modulated signal for transmission.
The input signal is made up of an in-phase component signal and a quadrature component signal, which are input to the quadrature modulation system 1 via an I channel and a Q channel respectively corresponding to the two carriers.
These input signal components are converted by D/A converters 13I and 13Q, provided in the I and Q channels respectively, into analog signals for the respective channels. Then, a quadrature modulator 14 modulates the two carriers with the respective analog signals to produce the transmit signal (modulated signal). This transmit signal is fed via a power amplifier 15 to an antenna (not shown) for transmission.
A directional coupler 16 is connected between the output of the power amplifier 15 and the antenna (not shown), and the directional coupler 16 separates a portion of the transmit signal through its monitor terminal and supplies it to a mixer 82.
In the mixer 82, the transmit signal supplied via the directional coupler 16 is mixed with a local oscillator signal from an oscillator 81 for frequency conversion to produce an intermediate frequency signal, which is input to an A/D converter 83.
The A/D converter 83 converts the intermediate frequency signal into a digital signal that is synchronized to a clock signal of a given frequency (not shown).
A quadrature demodulator 84 quadrature-demodulates the digital signal to produce quadrature monitored signals i and q corresponding to the I and Q channels, respectively, that are in phase quadrature to each other.
Then, based on this feedback signal, the DC offset correction value estimating unit 20 estimates the DC offset correction value for compensating for the DC offset.
To simplify the explanation of the DC offset correction value estimating unit 20 given hereinafter, the section leading from the inputs of the respective D/A converters 13I and 13Q to the power amplifier 15 will be referred to as the “forward line,” and the section leading from the monitor terminal of the directional coupler 16 to the input of the A/D converter 83 will be referred to as the “feedback line.”
As shown, the DC offset correction value estimating unit 20 comprises: an integrator 21-1 which smoothes the quadrature monitored signals i and q individually in the complex plane; a subtractor 22 one input of which is connected to the output of the integrator 21-1 and the other input of which is set to “0” which is the target value of the offset component to be compensated for; a delay element 23-1 to which an output of the subtractor 22 is supplied; a subtractor 24 one input of which is connected to the output of the subtractor 22 and the other input of which is connected to the output of the delay element 23-1; a conjugate calculator 25 cascaded with the output of the subtractor 24; a multiplier 26 one input of which is connected to the output of the conjugate calculator 25; a multiplier 27 one input of which is connected to the output of the subtractor 22 and the other input of which is connected to the output of the multiplier 26; a multiplier 28 one input of which is connected to the output of the multiplier 27 and the other input of which is supplied with a step size μ1; a delay element 23-2 via which the output of the multiplier 28 is connected to the other input of the multiplier 26; and a correction value calculating unit 29 which calculates an offset correction value vector from the output of the multiplier 28.
Operation of the thus configured DC offset correction value estimating unit 20 will be described below.
The integrator 21-1 extracts the offset components contained in the quadrature monitored signals i and q by smoothing the respective signals in the complex plane. The subtractor 22 obtains the deviation Rxoffset[n] of each offset component relative to the target value “0” in order of time sequence n.
The delay element 23-1 and the subtractor 24 obtain the increment δ[n] between the thus obtained Rxoffset[n] and Rxoffset[n−1] (=Rxoffset[n]−Rxoffset[n−1]) in order of time sequence n. The conjugate calculator 25 obtains a conjugate increment δ[n]′ which is the conjugate of the increment δ[n] in the complex plane.
On the other hand, the delay element 23-2 stores an offset compensation vector CMP[n] and supplies the previously obtained offset compensation vector CMP[n−1] to the multiplier 26. The multiplier 26 obtains the outer product u[n] of this previous offset compensation vector CMP[n−1] and the conjugate increment δ[n] ′ in order of time sequence n.
Such an outer product u[n] is mathematically equivalent to the inner product of the offset compensation vector CMP[n−1] and the increment δ[n]; therefore, for simplicity, the outer product is hereinafter simply referred to as the “inner product u[n],” and it is assumed that the ej0 is set as the initial value u[0].
The multipliers 27 and 28 sequentially update the offset compensation vector CMP[n] to the outer product shown by the equation (1) below for the inner product u[n], the deviation Rxoffset[n], and the step size μ1, which is a preset scalar quantity.
CMP[n]=−μ1×Rxoffset[n]×u[n] (1)
The correction value calculating unit 29 updates the offset correction value vector Txoffset[n] to the outer product (=Txoffset[n+1]) shown by the equation (2) below for the offset compensation vector CMP[n] given by the multiplier 28 and the offset correction value vector Txoffset[n] which is set based on the offset compensation vector CMP[n−1] preceding the offset compensation vector CMP[n].
Txoffset[n+1]=Txoffset[n]+CMP[n] (2)
The DC offset correction value estimating unit 20 supplies the thus calculated DC offset correction value, i.e., the offset correction value vector Txoffset[n], to the adders 12I and 12Q via the weighting unit 50, to be described later.
The adders 12I and 12Q add the in-phase and quadrature components of the offset correction value vector Txoffset[n] to the in-phase and quadrature components of the input signal, respectively, and supply the results to the respective D/A converters 13I and 13Q.
Here, the offset compensation vector CMP[n−1] is a value with which the offset correction value vector Txoffset[n−1] previously applied to the forward line via the correction value calculating unit 29 is to be updated.
Further, the increment δ[n] indicates the amount of change of the deviation Rxoffset[n] that occurs in the feedback line when the offset correction value vector Txoffset[n] is applied to the forward line instead of the previously applied offset correction value vector Txoffset[n−1].
That is, the inner product u[n] of the offset compensation vector CMP[n−1] and the increment δ[n] corresponds to the cosine value of the sum φ of the phase shifts in the forward and feedback lines, and this value is updated as needed to a value that matches the deviation or variation of the phase shift.
Accordingly, the thus generated offset correction value vector Txoffset[n] is updated so as to minimize the expected value of the product of the deviation Rxoffset[n] and the inner product u[n], as shown by the above equations (1) and (2).
Further, the advantage is that the offset correction value vector Txoffset[n] is maintained flexibly and stably at a value that matches the deviation or variation of the phase shift in the feedback line.
In the DC offset correction value estimating unit 20 shown in
Turning back to
As earlier described with reference to
As described above, the signal level detecting unit 30 detects the signal level which corresponds to the power value or amplitude value of the input signal. When the normal modulating signal is applied as the transmit data, the detected signal level varies with time, as shown in
On the other hand, the DC offset correction value estimated by the DC offset correction value estimating unit 20 as earlier described with reference to
Therefore, the weighting factor calculating unit 40 shown in
Delay elements 11I and 11Q shown in
For this purpose, the quadrature modulation system 1 includes, between the signal level detecting unit 30 and the weighting factor calculating unit 40, a signal level averaging unit 31 which averages the input signal level detected by the signal level detecting unit 30 over a prescribed interval (period) and outputs the average value.
When the signal level such as shown by a curve 90 in
For this purpose, the quadrature modulation system 1 includes, between the weighting factor calculating unit 40 and the weighting unit 50, a weighting factor averaging unit 32 which averages the weighting factor calculated by the weighting factor calculating unit 40 over a prescribed interval (period) and outputs the average value.
As can be seen from
In the embodiments of the invention described herein, the weighting of the DC offset correction value may be performed with respect to either the amplitude or the phase of the DC offset or to both.
Here, when performing the weighting of the DC offset correction value with respect to the phase and thus involving the rotation of the phase, the weighting factor calculating unit 40 may calculate complex weighting factors Wi and Wq having in-phase and quadrature components I and Q, respectively, and a complex multiplication unit 51 as the weighting unit may perform complex multiplications by multiplying the DC offset correction value with the respective complex weighting factors, as shown in
Wi=r×cos φ (3)
Wq=r×sin φ (4)
Here, r is the weighting factor for the amplitude of the DC offset, and φ is the weighting factor for the phase.
Further, in the present embodiment, the offset amount of the DC offset contained in the transmit signal is measured during the transmission of the signal, and the weighting factor stored in the weighting factor calculating unit 40 is updated so as to minimize the offset amount.
For this purpose, the weighting factor calculating unit 40 comprises a weighting factor storing unit 41 for storing the weighting factor data for various input signal levels, a weighting factor updating unit 42 for updating the weighting factor data stored in the weighting factor storing unit 41, and an offset amount measuring unit 43 for measuring the offset amount of the DC offset contained in the transmit signal.
The weighting factor storing unit 41 is a dual port memory or a multi-port memory having at least a first address input (a) for receiving as an input a read address associated with the signal level of the input signal, a first data port (b) for reading out the weighting factor stored at the address received via the first address input and for outputting the weighting factor to the weighting unit 50, a second address input (c) for receiving as an input a write address specified by the weighting factor updating unit 42, and a second data port (d) for receiving as an input the weighting factor output from the weighting factor updating unit 42 and for storing it at the address received via the second address input.
The weighting factor updating unit 42 outputs a received-DC-offset measuring instruction signal for instructing the offset amount measuring unit 43 to measure the amount of the DC offset contained in the quadrature monitored signals i and q received from the quadrature demodulator 84, and receives the DC offset amount measured by the offset amount measuring unit 43.
Further, the weighting factor updating unit 42 outputs to the DC offset correction value estimating unit 20 a DC offset correction value update instruction signal for instructing the DC offset correction value estimating unit 20 to estimate the DC offset correction value.
When the received-DC-offset measuring instruction signal is received, the offset amount measuring unit 43 measures the DC offset contained in the quadrature monitored signals i and q received from the quadrature demodulator 84, and returns the result to the weighting factor updating unit 42.
The offset amount measuring unit 43 measures the integrated values of the quadrature monitored signals i and q, or the differences between these integrated values and the integrated values of the input signals I and Q, as the DC offset contained in the quadrature monitored signals i and q.
When the DC offset correction value update instruction signal is received, the DC offset correction value estimating unit 20 estimates the DC offset correction value, and outputs the newly updated DC offset correction value to the weighting unit 50.
In step S10, the weighting factor updating unit 42 outputs the DC offset correction value update instruction signal to the DC offset correction value estimating unit 20. The DC offset correction value estimating unit 20 that received this signal updates the DC offset correction value to the latest value which is output.
In step S11, the weighting factor updating unit 42 gives permission to update the weighting factor data stored at a designated one of the addresses in the weighting factor storing unit 41, i.e., the weighting factor data for a designated one of the input signal levels (hereinafter called the “one-point weighting factor data”).
In step S12, the weighting factor updating unit 42 accesses the designated address, increments or decrements the one-point weighting factor data by a prescribed small step, and writes it back to the weighting factor storing unit 41 to update the data.
To determine the update direction (increment or decrement) of the weighting factor data to be updated by the weighting factor updating unit 42, the first update is done in either the incrementing or decrementing direction, whichever is appropriate; then, the DC offset amount measured in the next step is observed, and the update direction is automatically set to the direction that reduces the offset amount.
When an input signal having the corresponding signal level is applied, the updated one-point weighting factor data is read out from the read address associated with that signal level, and the data is used in the weighting unit 50 to weight the offset correction value. Here, updating the weighting factor data causes a variation in the DC offset contained in the transmit signal.
Therefore, in step S13, the weighting factor updating unit 42 outputs the received-DC-offset measuring instruction signal to the offset amount measuring unit 43, and acquires the latest DC offset amount from the offset amount measuring unit 43.
In step S14, it is determined whether the offset amount acquired in step S13 has reached a minimum as a result of the updating of the one-point weighting factor data. If the offset amount has reached a minimum, the updating of the one-point weighting factor data is stopped (step S15), but if it has not yet reached a minimum, the process returns to step S12 to update the one-point weighting factor data once again.
The determination as to whether the offset amount acquired in step S13 has reached a minimum or not may be made, for example, by comparing the offset amount measured in step S13 in the current loop with the offset amount measured in the previous loop and by checking if the offset amount that kept decreasing until the previous comparison has changed from decreasing to increasing, thus reaching a minimum.
Then, following steps S16 and S17, the process from steps S11 to S15 is repeated until all the weighting factor data stored in the weighting factor storing unit 41 are processed. In this way, the weighting factor data for every input signal level is updated.
For this purpose, the weighting factor calculating unit 40 comprises the previously described weighting factor storing unit 41, a weighting factor setting unit 44 for setting the weighting factor data to be stored in the weighting factor storing unit 41, and the previously described offset amount measuring unit 43.
The weighting factor setting unit 44 outputs a received-DC-offset measuring instruction signal for instructing the offset amount measuring unit 43 to measure the amount of the DC offset contained in the quadrature monitored signals i and q received from the quadrature demodulator 84, and receives the DC offset amount measured by the offset amount measuring unit 43.
Further, the weighting factor setting unit 44 supplies, to a transmitting device (not shown) transmitting an input signal (transmit data) to the quadrature modulation system 1, an unmodulating setup signal for causing the transmitting device to transmit a training signal which is an unmodulating signal with a constant signal level instead of the usual transmit data which is a modulating signal having a varying signal level.
In step S20, the quadrature modulation system 1 receives as an input the usual transmit data generated by the transmitting device (not shown).
Then, in step S21, the weighting factor setting unit 44 outputs the received-DC-offset measuring instruction signal to the offset amount measuring unit 43, and acquires the amount X of the DC offset contained in the modulating signal.
Next, in step S22, the weighting factor setting unit 44 sends the unmodulating setup signal to the transmitting device (not shown). In response, the transmitting device (not shown) transmits to the quadrature modulation system 1 the training signal which is a constant-level unmodulating signal instead of the usual transmit data which is a modulating signal.
In step S23, the weighting factor setting unit 44 outputs the received-DC-offset measuring instruction signal to the offset amount measuring unit 43, and acquires the DC offset amount Y when the training signal is input.
In step S24, the weighting factor setting unit 44 calculates the difference between the DC offset amount Y measured in step S23 and the DC offset amount X measured in step S21, and stores the difference as the weighting factor data corresponding to the signal level of the training signal in the weighting factor storing unit 41.
Then, following steps S25 and S26, the process from steps S23 to S24 is repeated for each signal level while varying the signal level of the training signal, and the weighting factor data for each signal level is stored in the weighting factor storing unit 41.
For this purpose, the weighting factor calculating unit 40 comprises, as shown in
The weighting factor calculating unit 40 further comprises: a switching control unit 45 for receiving frequency information indicating the frequency of the input signal from the transmitting device (not shown) transmitting the transmit data to the quadrature modulation system 1, and for performing switching so as to select the memory that forms the weighting factor storing unit 41 associated with the frequency information; an address switching unit 46 for performing switching to connect the level signal of the signal level detecting unit 30 as the read address to the address input of the memory of the weighting factor storing unit 41 selected by the switching control unit 45; and a data switching unit 47 for performing switching to connect the data output of the selected memory to the weighting unit 50.
In step S30, the switching control unit 45 in the weighting factor calculating unit 40 of
For this purpose, the weighting factor calculating unit 40 comprises, as shown in
The weighting factor calculating unit 40 further comprises: a switching control unit 45 for receiving ambient temperature information of the quadrature modulation system 1 from an external temperature sensor (not shown), and for performing switching so as to select the memory that forms the weighting factor storing unit 41 associated with the ambient temperature; an address switching unit 46 for performing switching to connect the level signal of the signal level detecting unit 30 as the read address to the address input of the memory of the weighting factor storing unit 41 selected by the switching control unit 45; and a data switching unit 47 for performing switching to connect the data output of the selected memory to the weighting unit 50.
In step S40, the switching control unit 45 in the weighting factor calculating unit 40 of
For this purpose, the weighting factor calculating unit 40 comprises, as shown in
The weighting factor calculating unit 40 further comprises: a switching control unit 45 for receiving carrier count information indicating the number of carriers forming the input signal from the transmitting device (not shown) transmitting the transmit data to the quadrature modulation system 1, and for performing switching so as to select the memory that forms the weighting factor storing unit 41 associated with the carrier count information; an address switching unit 46 for performing switching to connect the level signal of the signal level detecting unit 30 as the read address to the address input of the memory that forms the weighting factor storing unit 41 selected by the switching control unit 45; and a data switching unit 47 for performing switching to connect the data output of the selected memory to the weighting unit 50.
In step S50, the switching control unit 45 in the weighting factor calculating unit 40 of
For this purpose, the quadrature modulation system 1 includes: a multiplier 46 as a weighting factor calculating unit for multiplying the signal level detected by the signal level detecting unit 30 by a constant 1/α and thereby calculating the weighting factor proportional to the signal level; and multipliers 52I and 52Q for multiplying the DC offset correction value output from the DC offset correction value estimating unit 20 by the thus calculated weighting factor.
For this purpose, the quadrature modulation system 1 includes a DC offset correction value storing unit 60 for storing the DC offset correction values for various signal levels of the input signal. The DC offset correction value storing unit 60 may be constructed from a lookup table (LUT) or the like. The DC offset correction value corresponding to the input signal level detected by the signal level detecting unit 30 is retrieved from the DC offset correction value storing unit 60 by using the signal level as the read address, and the DC offset correction value thus retrieved is supplied to the adders 12I and 12Q.
The DC offset correction value that the DC offset correction value estimating unit 20 estimates from the transmit signal may be stored directly as the DC offset correction value in the DC offset correction value storing unit 60.
If there is a variation in the DC offset contained in the transmit signal generated from the input signal of the same signal level, the DC offset correction value stored in the DC offset correction value storing unit 60 may be updated in such a manner that the stored DC offset correction value is incrementally brought closer to the DC offset correction value output from the DC offset correction value estimating unit 20, rather than updating the stored DC offset correction value to the output value itself each time the DC offset correction value is output from the DC offset correction value estimating unit 20.
For this purpose, the quadrature modulation system 1 includes, as shown in
Then, based on the currently stored DC offset correction value Txm[n+] and the DC offset correction value Txoffset[n] output from the DC offset correction value estimating unit 20, the DC offset correction value updating unit 61 calculates the updated DC offset correction value Txm[n+1] to be stored in the DC offset correction value storing unit 60, for example, in accordance with the following equation (5).
Txm[n+1]=Txm[n]+μ2×Txoffset[n] (5)
In this way, the DC offset correction value may be stored in the DC offset correction value storing unit 60 while incrementally updating the value. Here, μ2 is a constant that defines the size of the incremental step.
Now consider the case where there is a hysteresis in the DC offset contained in the transmit signal, as will be described with reference to
Accordingly, to compensate for such an offset amount, the DC offset correction value storing unit 60 shown in
This configuration includes a signal level change calculating unit 67 which comprises a delay element 62 for delaying the output of the signal level detecting unit 30 and a subtractor 63 one input of which is connected to the output of the delay element 62 and the other input of which is directly connected to the output of the signal level detecting unit 30. The signal level change calculating unit 67 calculates the amount of change of the input signal level with time by calculating the difference between the current input signal level and the preceding input signal level.
Here, the memory space of the DC offset correction value storing unit 60 is, for example, made two-dimensional. Further, the DC offset correction value storing unit 60 is constructed as a two-dimensional lookup table with the output of the signal level detecting unit 30 as the first dimension read address and the output of the subtractor 63 as the second dimension read address. By employing such a configuration, when there is a hysteresis in the DC offset amount, the DC offset correction value storing unit 60 can store DC offset correction values that not only differ in accordance with the signal level of the input signal, but also differ in accordance with the amount of change of the input signal level with time. As a result, data that not only matches the signal level of the input signal but also matches the amount of change calculated by the signal level change calculating unit can be retrieved from among the stored DC offset correction values.
Further, in the above configuration, when writing a DC offset correction value to the DC offset correction value storing unit 60, the output of the signal level detecting unit 30 may be used as the first dimension write address and the output of the subtractor 63 as the second dimension write address. By using such write addresses, the DC offset correction value estimated by the DC offset correction value estimating unit 20 is written to a different address if either the signal level of the input signal or the amount of change of the signal level with time is different.
In this configuration, when an input signal having a signal level corresponding to the first dimension address and an amount of change with time corresponding to the second dimension address is quadrature-modulated, the DC offset correction value output from the DC offset correction value estimating unit 20 can be stored in the DC offset correction value storing unit 60 at an address expressed by the first and second dimension addresses. Delay elements 64 and 65 are provided to delay the first and second dimension addresses by an amount of time that elapses from the moment that the input signal is quadrature-modulated until the DC offset correction value is output from the DC offset correction value estimating unit 20.
For this purpose, the quadrature modulation system 1 includes: a DC offset correction value calculating unit 70 for calculating the DC offset correction value in accordance with each signal level of the input signal by using a prescribed approximation equation; a parameter storing unit 71 for storing parameters for defining the prescribed approximation equation; and a parameter calculating unit 73 for calculating the parameters defining the approximation equation from the DC offset correction value output from the DC offset correction value estimating unit 20.
The approximation equation may, for example, be a polynomial with the signal level of the input signal as the variable, and the parameters may be the coefficients by which the terms contained in the polynomial are respectively multiplied. In this case, the DC offset correction value calculating unit 70 calculates the DC offset correction value in accordance with the signal level of the input signal by using the polynomial.
The parameter calculating unit 73 calculates the parameters using, for example, a least square method, based on the respective signal levels of a plurality of input signals and on the DC offset correction values that the DC offset correction value estimating unit 20 estimates from the respective transmit signals when the input signals of the respective signal levels are respectively quadrature-modulated.
While the DC offset compensation method and DC offset compensation device according to the present invention can be advantageously used to compensate for a DC offset that is added to a transmit signal in an analog quadrature modulation system used in high-speed communications such as IMT2000, the present invention is not limited to this particular application, but can be widely used for quadrature modulation systems that use two carriers in phase quadrature and produce a transmit signal by modulating the two carriers in accordance with an input signal comprising an in-phase component signal and a quadrature component signal.
Kubo, Tokuro, Nagatani, Kazuo, Ishikawa, Hiroyoshi, Hamada, Hajime, Fudaba, Nobukazu
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