An executable circuit design is used to generate waveforms, from which behaviors of the circuit are captured. The behaviors and various combinations thereof can then be saved in a database, along with descriptions and other metadata about them, thereby generating a behavioral index of the circuit design code. Behavioral indexing of circuit designs allows a user to maintain an indexed behavior database, track changes in behaviors as the circuit design's executable description evolves, and figure out how the executable description can be reused in different projects. When applied to digital design development, it facilities the current design and verification effort, as well as design reuse down the line.
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1. A computer-program product comprising a non-transitory computer-readable storage medium storing computer-executable code for aiding in the comprehension of a circuit design, the code when executed by a computer processor causes the processor to perform the method comprising:
receiving an executable description of the circuit design;
accessing a data store, the data store including a plurality of behaviors associated with the circuit design that are acquired from waveform annotations added to one or more displayed waveforms of the circuit design, the waveform annotations representing graphical explanations of the behaviors;
receiving a behavior of the plurality of behaviors from the data store;
identifying lines of the executable description that can affect the behavior;
displaying the executable description of the circuit design; and
highlighting, in the displayed executable description, the identified lines of the executable description that can affect the behavior.
12. A computer-program product comprising a non-transitory computer-readable storage medium storing computer-executable code for aiding in the comprehension of a circuit design, the code when executed by a computer processor causes the processor to perform the method comprising:
receiving an executable description of the circuit design;
accessing a data store, the data store including a plurality of behaviors for the circuit design that are indexed to a plurality of textual descriptions of the behaviors, wherein the textual descriptions are textual comments describing the behaviors;
displaying the executable description of the circuit design;
receiving a selection of a line of the executable description of the circuit design;
identifying a behavior from the plurality of behaviors that can be affected by the selected line of the executable description; and
displaying a textual description from the plurality of textual descriptions that is indexed to the identified behavior.
7. A computer-program product comprising a non-transitory computer-readable storage medium storing computer-executable code for aiding in the comprehension of a circuit design, the code when executed by a computer processor causes the processor to perform the method comprising:
receiving an executable description of the circuit design;
accessing a data store, the data store including a plurality of recipes for the circuit design, each recipe comprising at least one behavior one or more behaviors associated with the circuit design acquired from waveform annotations added to one or more displayed waveforms of the circuit design, the waveform annotations representing graphical explanations of the behaviors;
receiving a recipe of the plurality of recipes from the data store;
generating another waveform of the circuit design from the recipe;
identifying lines of the executable description that can affect signals of the another waveform;
displaying the executable description of the circuit design; and
highlighting, in the displayed executable description, the identified lines of the executable description that can affect the signals of the another waveform.
2. The computer-program product of
identifying other behaviors from the plurality of behaviors in the data store that can be affected by the identified lines of the executable description;
displaying a list of the plurality of behaviors from the data store; and highlighting, in the list of the plurality of behaviors, the other behaviors.
3. The computer-program product of
4. The computer-program product of
displaying a textual description of the behavior.
5. The computer-program product of
displaying a high level description of the behavior.
6. The computer-program product of
8. The computer-program product of
9. The computer-program product of
10. The computer-program product of
11. The computer-program product of
13. The computer-program product of
14. The computer-program product of
displaying a high level description for the identified behavior.
15. The computer-program product of
16. The computer-program product of
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This invention claims the benefit of U.S. Provisional Application No. 61/185,548, filed on Jun. 9, 2009, which is incorporated by reference in its entirety.
This invention relates generally to electronic design automation for circuit designs, and more particularly to using user input from waveforms to capture and index the behaviors of a circuit design as well as applications for the indexed behaviors.
With the increasing size and complexity of electronic circuits, design quality and productivity are becoming even more difficult to achieve. This is complicated by a number of factors. For example, circuit designs are built incrementally, but there is no practical method for verifying design changes incrementally. During the design process, even relatively insignificant changes to a circuit design may cause unintended side-effects. Due to the complexity of typical designs, the cost of uncovering a design bug increases non-linearly down the design flow.
Existing solutions for RTL designers include, for example, directed testing and formal assertion based verification. Directed testing is not within the typical designer's area of expertise, so the effort is non-trivial, even to achieve just a little verification coverage. Moreover, there is no persistent return-on-investment because the directed testing effort is usually thrown away. The other option, formal assertion based verification, is difficult to deploy because most designers lack knowledge of assertions.
Circuit designers have attempted to make their circuit designs more understandable in a number of ways. For example, when creating the executable description of a circuit design, designers sometimes place textual comments within the executable description of the circuit design, or they write a textual specification to go along with the circuit design. These techniques suffer from the severe limitation of being static. The designer must rely on the original writer to capture and maintain the textual description, and its accuracy depends on whether the writer has understood the executable description correctly and whether the static textual description was modified accordingly when the executable description is modified. If the original writer did not capture the exact aspect that the user is interested in, the user has no way to figure out whether the things he or she would like to do with the executable description can be done at all, and if so, how it can be done.
Since the specification can easily go out of date with the latest version of the design, the communication on design behaviors is typically supplemented by information received through hallway conversation, email, white-board discussion. These ad hoc methods of understanding a circuit design are clearly not efficient or reliable. Accordingly, there exists a need for improved tools to help circuit designs understand and work with the complex circuit designs that exist today.
To improve the quality of circuit designs and enhance the productivity of circuit designers, embodiments of the invention provide mechanisms for tagging, indexing, and querying behaviors of a circuit design. In one embodiment, a number of waveforms are generated for a circuit design and then displayed to a designer. The designer specifies certain behaviors manifested in the waveforms that the designer believes might be interesting. The designer may also provide additional information about the behaviors, such as a textual description about the behavior. Each of the selected behaviors is then stored in a data store and associated with an executable definition of the behavior, along with other information about the behavior such as its textual description. This process may be repeated for a number of different waveforms to generate a rich set of behaviors for the circuit design.
The data store thus provides an index of various ways in which the circuit design may behave, the set of indexed behaviors corresponding to the designer's interest in the circuit design. Moreover, since the indexed behaviors may be associated directly with the circuit design, they may automatically change when the circuit design is modified, unlike static descriptions that may exist in the executable code or in an accompanying design specification. Embodiments of the invention thus enable designers to achieve higher design quality, productivity, and more precise communication that can be kept up to date as the circuit design evolves.
The indexed behaviors also enable a number of useful circuit analysis tools, which query the indexed behaviors and present the information about the circuit design in a number of useful ways. In one embodiment, for example, a template document is created from automatically extracted behaviors of a particular circuit design for the user to populate a textual description. In another embodiment, the indexed behaviors and recipes are used as the basis for creation of custom recipes to generate more waveforms from the design. In other embodiments, the indexed behaviors aid comprehension of waveforms and design description. In yet another embodiment, the indexed behaviors allow the user to expand and evolve the data store as the usage of the design evolves and as the design evolves. In yet other embodiments, the indexed behaviors are used to isolate the differences in multiple revisions of the design description, and to extract the implication of modification to the design description. In yet another embodiment, the indexed behaviors can be used to capture programming steps and to analyze and manipulate programming sequences for programming the design.
The figures depict various embodiments of the present invention for purposes of illustration only. One skilled in the art will readily recognize from the following discussion that alternative embodiments of the structures and methods illustrated herein may be employed without departing from the principles of the invention described herein.
Behavioral Indexing
Behavioral indexing is a technique that allows a designer to maintain an indexed behavior database, track changes in behaviors as the executable description of the circuit design evolves, and figure out how the executable description can be reused in different projects. When applied to digital design development, behavioral indexing facilities the current design and verification effort, as well as design reuse down the line. During behavioral indexing, key circuit behaviors may be identified and captured in a machine-useable form that can be applied to the executable description with precise mathematical analysis to draw conclusion about how the executable description works.
As used herein, the term “behavior” refers to the actions and reactions of an executable description, usually in relation to the environment, the architectural specification, or the micro-architectural specification, and sometime to the implementation details as well. It may also be referred to the actions and reaction of the environment of the executable description. A behavior can be described by an executable expression that captures a temporal relationship of the states and events in the executable description, which can be stored in a database for referring the behavior at a later time. For example, a simple behavior may be captured as a Boolean expression, stating the relationship of signals at the same time step. In addition, for temporal relationship with multiple time steps, the sequence operators in two standard languages in the industry, PSL and SVA, can be used to capture a behavior in an executable specification. These two languages were developed to enable specification of Assumptions, Assertions, Coverage Points for assertion-based verification. In these languages, functional coverage points are also used in functional coverage measurements, typically defined as the determination of how much functionality of the design has been exercised by the verification environment. Instead of performing assertion-based verification and coverage measurements, one embodiment of behavior indexing can reuse these languages to capture behaviors as executable expressions.
The waveform generation tool 110 obtains 210 the circuit design 10, which comprises executable code for the design. The waveform generation tool 110 uses this executable code to generate 220 sets of waveforms for the circuit design, which are displayed to the circuit designer. The designer may interact with the waveform generation tool 110 to specify the waveforms to be generated according to any of a variety of means. In one embodiment, to generate the desired waveforms, the designer may specify features that the designer would like to see in the waveform.
When the waveform is displayed to a designer, the designer can select behaviors that are displayed in the waveform. If the designer finds the behavior to be meaningful, for example, the designer tags and/or labels the behavior by selecting it, and the behavior indexing tool 120 receives 230 the designer's selection. In one embodiment, the selection may be made via a graphical user interface, as illustrated in the example of
A behavior may be defined as an elastic, temporal relationship amongst states. The behavior may be captured in many levels of granularity, such as nested, overlapping, among others. For a typical circuit design, the designer may specify hundreds of intended behaviors, where there might be thousands of functional coverage points for simulation. In a typical use, a behavior may be first observed in a specific version and configuration of a design, under specific environment assumptions. By defining the behavior “elastically,” the designer may often be oblivious of the exact timing and activities, since an elastic behavior represents an abstraction on a design's functionality as something the design does over time. For example, the behavior captured with the selection in the waveform shown in
Once the user specifies one or more behaviors from one or more waveforms, the behavioral indexing tool 120 stores the behaviors in a circuit behavior data store 130. The exact format for the machine-usable behavior may depend on the languages of the executable description. For RTL design model, for example, PSL sequences, SVA sequences, or simple Boolean predicates may be used to capture behaviors. The stored behaviors that have been captured, tagged, and labeled by the designer may then be used by one or more behavior analysis tools 140, which may be configured to query the circuit behavior data store 130 and perform various types of analyses about the circuit design for a designer. A number of such behavior analysis tools 140 are described herein, although it can be appreciated that the indexed behaviors may be used in many other ways.
The set of behaviors indexed in the behavior data store 130 form a vocabulary by which humans can express queries of design functionality. In some embodiments of the invention, more complex “recipes” are created by combining 240 multiple behaviors and adding options on waveform related configurations. A typical recipe is a collection of at least one behavior, and optionally includes a configuration. Example configurations include the cycle interval in which each behavior should occur, a minimum length of the overall waveform, and a maximum length of the overall waveform, among many others. The waveform generation process takes the collection of behaviors and generates a waveform that exhibits each behavior at least once, and if the optional cycle interval is specified, with the occurrence within the specified interval. One embodiment of the invention picks a subset of behaviors at random to create new recipe. Another embodiment picks a subset of behaviors based on the degree of overlap in their cone-of-influence within the executable description. Yet another embodiment receives instruction from the user on which subset of behaviors to use to form a new recipe. The generated recipes are also added to the circuit behavior data store 130.
The waveform generation and display, the behavior selection, and the recipe generation processes are typically repeated multiple times. The end result is to populate the behavior data store 130 with a rich pool of behaviors and recipes that describe the circuit design.
As recipes and behaviors are specified and captured into the behavior data store 130, the designer may specify textual descriptions for the recipes and behaviors. For example, the designer may provide a textual comment about the behavior or recipe that describes why the designer believes the behavior or recipe to be meaningful for the circuit design. The resulting data store 130 thus contains links among the recipes, behaviors, textual descriptions.
The initial recipes can be any of the following items, but not limited to the following items: (1) a specific line in the executable description to be illustrated; (2) a behavior captured as a Boolean expression referring to the variables in the executable description, such as “a+b”, where the resulting waveform shows this expression to have value 1 in some time step; (3) a behavior captured as a temporal sequence referring to the variables in the executable description, such as “a ##1 b”, where the resulting waveform shows “a” to have value 1 in some time step and “b” to have value 1 in the time step immediately after; (4) a behavior captured as a Boolean expression, but with a specific restriction on the time interval the expression must be 1; or (5) a behavior captured as a temporal sequence, but with a specific restriction on the time interval the sequence must be observed.
Given a recipe, a static analysis of the executable description is used to generate a waveform with all targets in the recipe satisfied in the waveform. U.S. Pat. No. 7,421,668, which is incorporated by reference in its entirety, describes other configurations that can be used to specify a waveform to be displayed to a designer.
In one embodiment, the data store 130 uses cone-of-influence traversal of the executable description of the circuit design. From a particular behavior 301, using the executable sequence for the behavior, the cone-of-influence traversal of the executable description can be used to highlight the lines of executable descriptions 307 that are affecting this behavior. If a specific line of executable description is also in the cone-of-influence of another behavior, the data store 130 links it to the related behaviors 306.
In one embodiment, the relevant logic can be extracted for each waveform. If a specific line of executable description is in the relevant logic area of a waveform generated from a recipe, the invention links it to the related waveform and recipe. U.S. Pat. No. 7,137,078, which is incorporated by reference in its entirety, describes how the lines of an executable description relevant to a signal/cycle pair in a waveform can be extracted. The relevant logic can be extracted by performing this operation recursively. Once the relevant logic area of a waveform is generated, embodiments of the invention use techniques disclosed in U.S. Pat. No. 7,473,694, which is incorporated by reference in its entirety, to identify signals that are relevantly determined by this said relevant logic area of a waveform. From these relevantly determined signals and their activities, relevant behaviors are extracted from the data store.
This resulting data store 130 can be applied to different revision of the executable description to generate the waveforms specific to the revision of the description being used. The data store 130 can also be used for regression purposes, generating a waveform for each available recipe and reporting the differences when comparing to the previous revision of the design. The data store 130 can also be used for documentation purpose, supplementing or replacing static documents or descriptions of the circuit design.
In use, the data store 130 can be created by one person (e.g., a person dedicated to creating the behavioral index) while enabling many clients or other designers can use the behavioral index. The waveform used to specify a new behavior need not be generated from a recipe, as described above. Instead, the waveform may be obtained from a variety of sources, such as a waveform editor, in which a user draws the waveform. The waveform may also be obtained form a waveform library, from a simulation of the design, or from any other suitable source. Moreover, the recipe used for waveform generation need not be obtained from a signal or from composing a set of behaviors. Alternatively, the recipe may be obtained by taking an assertion, an assumption, or a requirement about the executable description of the circuit design, or from a recipe editor or library. If the waveform generation tool 110 is not able to find a legal waveform according to the recipe, this fact may also be important to be captured, since it may be important for enabling a “what-if analysis” on the executable description of the circuit design.
Behavior and Property Acquisition
Embodiments of the invention facilitate the capture of behaviors to be stored in the circuit behavior data store 130 and used by one or more of the behavior analysis tools 140. Embodiments of the invention also enable the capture of assumptions, assertions, and functional coverage points from waveforms.
A waveform may represent positive behavior and/or negative behavior for a circuit design for a circuit design under various operating conditions. But because waveforms illustrate just one example of the behavior of a circuit design, one embodiment of the invention allow the waveform to be annotated with extra information to express a range of behaviors. These behavior acquisition annotations can be generalized further to broaden the scope of behavior to be “elastic”. From these generalized annotations are created a useful set of behaviors, which apply to more than just the specific circuit behavior illustrated in the initial waveform. In other embodiments, these annotations can also be used to generate assumptions, assertions, and coverage points for use in formal verification, simulation, etc.
In one embodiment, a waveform acquisition module receives a waveform, which may be imported or created by the user. The waveform may be annotated using a behavior acquisition annotation editor, where one or more annotations are added. Several types of annotations may be applied, including annotations that define a relationship between two events within the waveform. Events in a waveform may include the edges of a signal (including the change in value of a word, or multi-bit data signal), a condition that evaluates the value of one or more signals, or other event that describes the state of the waveform. Once added, the annotations are generalized, preferably so that each annotation defines only the minimally necessary information in which the requirement is desired to apply. In this way, the annotation applies to the broadest possible set of operating conditions, and the resulting behavior will not be unduly narrow. Additional annotations can be also be inferred from the existing set of annotations to capture different aspects of the behavior that the user may not have explicitly captured in the original set of annotations. Once the annotations have been generalized, a behavior generator converts the generalized annotations into one or more behaviors, which accurately reflect the intent of the designer as expressed in the waveform, the annotations, and ultimately the generalization.
In this way, a user may use waveforms to specify behaviors graphically rather than having to write them manually. This allows users to create effective behaviors for complex circuit designs. Moreover, the solution integrates the visual feedback that waveforms provide with the behavior generation process, thus improving the designer's ability to create behaviors that accurately reflect the intent behind the circuit design.
A variety of types of behavior acquisition annotations may be available to allow the designer to express behaviors. Different types of annotations give the designer more flexibility in specifying aspects of the waveform activities that will eventually lead to the generation of versatile behaviors. In one embodiment, each annotation may fall within a specific class of annotations, including: causality arrows, stability annotations, tag annotations, local and global annotations, and unfolding annotations. Specific examples of annotations in each of these classes are described in more detail below for instructional purposes. As these types of annotations are merely tools for specifying the behavior of a waveform, it will be appreciated that other types of annotations may be defined for specifying other types of behavior. Therefore, other embodiments of the invention may allow for different types of annotations not specifically described herein.
One class of annotations includes causality arrows. In one embodiment, a causality arrow type annotation includes a triggering event (i.e., the beginning of the arrow); a triggered event (the end of the arrow); an optional guard that specifies when the relationship between the two events applies; and a time interval that specifies a time lag between the two events. The triggering and triggered events may be any aspect shown in the waveform that is capable of appearing in a behavior, such as the rising or falling edge of a signal or a value of a signal at any given time shown in the waveform. A triggering event is typically an edge event, and a triggered event can be an edge event or a value event. The time interval may be a constant delay (including 0), a range bounded by constants (e.g., [1:4]), an unbounded range (e.g., [1:$], where $ represents infinity), a delay specified by an expression (e.g. [a-b]), or an interval specified by an expression (e.g., [a−b:a+b]).
A causality arrow type annotation thus imports some type of causality relationship between two events in a waveform that exists when certain conditions are met. As a number of types of causality relationships are possible, a causality arrow may further be categorized into a number of subtypes based on its logical effect. Example subtypes include, but are not limited to, the following types or causality arrows, with the logical effect of each type of causality arrow explained:
In another embodiment, an annotation may be a stability annotation, such as annotation 7 in
A counting annotation describes a relationship that involves the number of occurrences of one or more events in the waveform.
An arrow tagging annotation is an annotation that can be inferred from counting annotations and causality arrows on a waveform.
A data tagging annotation is another type of annotation that can be inferred from counting annotations and causality arrows on a waveform.
The arrow tagging and data tagging annotations can be thought of as a general class of annotations called action annotations. Action annotations involve a triggering event and an action associated with the triggering event. For example, an arrow tagging annotation is an action annotation because it includes a triggering event and a counter. An arrow tagging annotation counts the number of occurrences of events similar to the triggering event and then tags each occurrence with a unique tag, often represented by an integer. Conceptually, the value of associated counter is assigned to an occurrence of the event, after which the counter is incremented. Accordingly, the next occurrence of the event will be tagged with a larger value. The value of the counter indicates how many similar events have occurred.
Yet another class of annotations is unfolding annotations. An unfolding annotation contains two events that are to be considered the same event by unfolding the annotated waveform. This allows a user to define an unfolding point, which is a time when the waveform should repeat itself, which allow the user to specify the condition of repeating sequences.
In one embodiment, these annotations capture positive behaviors into the behavior data store. In other embodiments, in addition to specifying from among the various types of annotations, the annotation editor can specify the effect of the annotation, such as positive behavior, negative behavior, assumption, positive assertion, and negative assertion, depending on the target applications of the acquisition annotations.
In one embodiment, once the designer has finished editing the annotated waveform, an annotation generalizer attempts to generalize the annotations so they apply as broadly as possible. Causality arrow annotations can be generalized by changing the time interval and/or the optional guard. The time interval of a causality arrow defaults to the constant value shown in the waveform, but the user can adjust the time interval to any range as described above.
If the annotation is a stability annotation, other types of generalizations may apply. In one embodiment, for a stability annotation, the user is prompted to specify the time during which the signal is to remain at the value. The time may be a constant or a variable, (based, for example, on the value of another signal). The user may also be prompted to specify a condition of the signal that must be true during this time period. For a multiple bit signal, for example, that user may generalize the stability annotation so that it requires the signal to stay within a given range during the time period rather than stay exactly at the particular value.
Recipe and Behavior Extraction and Comparison
Embodiments of the invention automatically add structural information regarding the design or executable description into the indexed data store 130 as recipes, behaviors, and as placeholders for the user to enter textual descriptions for the structural elements that can be used as recipes and behaviors. The resulting data store 130 acts as documentation for the design, and embodiments of the invention guide the user to add textual description in that documentation.
In one embodiment, the executable description for the circuit design is analyzed and information from it is extracted. In one example, the extracted information includes one or more of: input list at the top module; output list at the top module; flop list within the description; latch list within the description; and assumption, assertion, and functional coverage points embedded inside the description.
The lists are then classified into categories. For example, flops and latches may be classified into finite-state-machine (FSM), counter, FIFO, memory, delay buffer, or the like. Assumptions, assertions, and functional coverage points are classified according to their hierarchical locations or PSL unit association. An example of how to automatically classify a counter is captured in U.S. Pat. No. 7,418,678, which is incorporated by reference in its entirety. Using these classifications, these extracted items are associated into a tree format, with the finite-state-machine items being the children of a node labeled “FSM”, etc. The tree is then presented to guide the designer for further rearrangement and for addition of textual descriptions. The resulting information is then presented to the user as a “live” specification document for the design, and for other operations appropriate for an indexed database. The tree structure may be displayed as a table of content of this live specification, while tree with children becomes a chapter or section in the documentation, and the individual items with their associated textual description shown in a bulletized list.
The extraction described herein may be applied to multiple revisions of the design. For example, each extracted item is classified as baseline, obsolete, recently added, or recently deleted. This classification is performed according to the following procedure:
Apart from performing these classifications and enabling the user to rearrange the information into a document, each item is used as a standalone recipe to create waveform for the executable specification, from which further behaviors and recipes can be derived.
Recipe Manipulation
Embodiments of the invention facilitate the capture of recipes for use by one or more of the behavior analysis tools 140. In these embodiments, behaviors obtained during the behavioral indexing process are used to generate waveforms similar to the system and process, as described in U.S. Pat. No. 7,421,668, which is incorporated by reference in its entirety.
In one embodiment, a user may drag and drop a behavior from the behavior table to the recipe area to modify the current recipe. In addition, as described in U.S. Pat. No. 7,421,668, the user may select specific signal/cycle pairs in the waveform area 702, and click some of the buttons to modify the recipe. In addition, the user interface also enables the user to start the waveform generation computation on the design (rather than the requirement without design as in U.S. Pat. No. 7,421,668) from the modified recipe, and then replaces the current waveform with the revised waveform when the computation is done. U.S. Pat. No. 7,421,668 explains how the resulting recipes can be used to generate a waveform.
Waveform Comprehension
In one embodiment, one of the behavior analysis tools 140 is a tool for using the circuit behavior data store 130 to aid in waveform comprehension.
This is further explained in
Design Comprehension
In one embodiment, one of the behavior analysis tools 140 is a tool for using the circuit behavior data store 130 to aid in waveform comprehension.
Component 1104 describes this mapping of a line of the description to the list of behaviors and then to the cone-of-influence of any of these behavior. Component 1105 describes the highlight of the lines in the cone-of-influence of an indexed behavior. Component 1106 extends component 1104 to not just show the list of behaviors related to a line of the description, but also show the textual description from the database for these behaviors. Similarly components 1107, 1108, and 1109 describe the mapping of a line of the description to the list of recipes and then to the relevant logic of any of these recipes.
Finally, the behaviors can be tagged with a common “high-level description,” so that the user is presented with a set of “high-level description” instead of the detailed list of behaviors. This may be particularly useful when the behavior database contains many behaviors. The behavior groups, each tagged with a common “high-level description,” can overlap and share common behaviors.
Expandable and Evolvable Document
In one embodiment, one of the behavior analysis tools 140 is a tool for using the circuit behavior data store 130 as an expandable document, in contrast to a traditional document, which is static and limited to what the original authors have put into the write-up. The tool 140 may also use the circuit behavior data store 130 as an evolvable document, in contrast to a traditional document, which is static and difficult to be updated to make the latest revision of an evolving executable description.
These waveforms, converted into live waveforms with the circuit behavior data store 130, may contain many annotations as described above, and can be used as if someone has spent the time writing down the explanation of the design with respect to the waveforms, even though the original person populating the database may have never seen these waveforms.
Similarly,
These waveforms, converted into live waveforms with the behavioral indexed database, may contain many annotations as described above, and can be used as if someone has spent the time writing down the explanation of the revised design with respect to the waveforms, even though the original person populating the database may have never seen these waveforms or the revised design.
Accordingly, embodiments of the invention overcome the usual difficulty of maintaining a static document, are comprehensive enough to cover what the various users of the document may want to know, and can be constantly updated to match and describe recent revisions to the design.
Isolation Analysis
In one embodiment, one of the behavior analysis tools 140 is a tool for using the circuit behavior data store 130 to isolate the difference between two revisions of an executable description and summarize the implication of the changes that have been made to revise the description.
In one embodiment, the set of behaviors are checked in the data store 130 to extract 1706 1709 the subset that is actually exercised by each generated waveform. A behavioral difference report is presented 1703 to the user regarding the differences in exercised behaviors for the two waveforms from the same recipe, applied to the two versions of the design.
In one embodiment, a coverage measurement is extracted from each generated waveform regarding the size of the relevant logic when compared to the full cone-of-influence or the full design, and a coverage report is presented to the user regarding the difference in coverage measurement for the two waveforms from the same recipe, applied to the two versions of the design. A cumulative coverage measurement, one for each of the design versions, is also presented to the user.
If the circuit behavior data store 130 contains concrete waveforms, usually generated from the recipes in the first version of the design, embodiments of the invention will also present whether the waveforms can be reproduced on the revision of the design, by applying the same inputs that are captured in the waveform to the revised design, and checking if the configuration and behaviors of the same recipe is still satisfied in the resulting waveform.
Programming Sequence Manipulation
In one embodiment, one of the behavior analysis tools 140 is a tool for using the circuit behavior data store 130 to create applicable programming sequences and to confirm the effect of user-supplied programming sequences.
Embodiments of the invention also allow the user to specify 1903 the desired state of the design as a behavior in a recipe, and by generating 1904 waveforms from this recipe, and using tools described above to highlight the behaviors exercised by this generated waveform, any programming steps represented by the exercised behaviors will be presented 1905 to the user. This sequence of abstract behaviors is converted to the actual programming sequence that can be used to program the design into the desired state.
Summary
The foregoing description of the embodiments of the invention has been presented for the purpose of illustration; it is not intended to be exhaustive or to limit the invention to the precise forms disclosed. Persons skilled in the relevant art can appreciate that many modifications and variations are possible in light of the above disclosure.
Some portions of this description describe the embodiments of the invention in terms of algorithms and symbolic representations of operations on information. These algorithmic descriptions and representations are commonly used by those skilled in the data processing arts to convey the substance of their work effectively to others skilled in the art. These operations, while described functionally, computationally, or logically, are understood to be implemented by computer programs or equivalent electrical circuits, microcode, or the like. Furthermore, it has also proven convenient at times, to refer to these arrangements of operations as modules, without loss of generality. The described operations and their associated modules may be embodied in software, firmware, hardware, or any combinations thereof.
Any of the steps, operations, or processes described herein may be performed or implemented with one or more hardware or software modules, alone or in combination with other devices. In one embodiment, a software module is implemented with a computer program product comprising a computer-readable medium containing computer program code, which can be executed by a computer processor for performing any or all of the steps, operations, or processes described.
Embodiments of the invention may also relate to an apparatus for performing the operations herein. This apparatus may be specially constructed for the required purposes, and/or it may comprise a general-purpose computing device selectively activated or reconfigured by a computer program stored in the computer. Such a computer program may be stored in a tangible computer readable storage medium or any type of media suitable for storing electronic instructions, and coupled to a computer system bus. Furthermore, any computing systems referred to in the specification may include a single processor or may be architectures employing multiple processor designs for increased computing capability.
Embodiments of the invention may also relate to a computer data signal embodied in a carrier wave, where the computer data signal includes any embodiment of a computer program product or other data combination described herein. The computer data signal may be embodied in a product, where the signal is presented in a tangible medium or carrier wave and modulated or otherwise encoded in the carrier wave, and transmitted according to any suitable transmission method. The computer data signal product may be produced or made according to any of the processes described herein.
Finally, the language used in the specification has been principally selected for readability and instructional purposes, and it may not have been selected to delineate or circumscribe the inventive subject matter. It is therefore intended that the scope of the invention be limited not by this detailed description, but rather by any claims that issue on an application based hereon. Accordingly, the disclosure of the embodiments of the invention is intended to be illustrative, but not limiting, of the scope of the invention, which is set forth in the following claims.
Ranjan, Rajeev Kumar, IP, Chung-Wah Norris, Kranen, Kathryn Drews, Antonioli, Yann Alain, Safe, Georgia Penido, Coelho, Claudionor José Nunes
Patent | Priority | Assignee | Title |
Patent | Priority | Assignee | Title |
5111413, | Mar 24 1989 | Synopsys, Inc | Computer-aided engineering |
5867399, | Apr 06 1990 | LSI Logic Corporation | System and method for creating and validating structural description of electronic system from higher-level and behavior-oriented description |
5907698, | Feb 24 1997 | Freescale Semiconductor, Inc | Method and apparatus for characterizing static and dynamic operation of an architectural system |
6326987, | May 27 1997 | Agilent Technologies, Inc | Graphical system and method for annotating measurements and measurement results in a signal measurement system |
6513143, | May 04 2000 | Xilinx, Inc | Method for automaticallly remapping an HDL netlist to provide compatibility with pre-synthesis behavioral test benches |
6751582, | Sep 09 1999 | GOOGLE LLC | Method and system for enhanced design validation through trace tailoring |
6871331, | May 04 2000 | XILINX, Inc. | Combined waveform and data entry apparatus and method for facilitating fast behavioral verification of digital hardware designs |
7031899, | Apr 09 2001 | Synopsys, Inc | System for characterizing simulated circuit logic and behavior |
7079997, | Apr 09 2001 | Synopsys, Inc | IC behavior analysis system |
7137078, | Mar 27 2003 | JASPER DESIGN AUTOMATION, INC | Trace based method for design navigation |
7325209, | Nov 17 2004 | Texas Instruments Incorporated | Using patterns for high-level modeling and specification of properties for hardware systems |
7346861, | Dec 02 2004 | Altera Corporation | Programmable logic devices with two-phase latch circuitry |
7360189, | Jun 01 2004 | Altera Corporation | Method and apparatus for enabling waveform display in a system design model |
7412674, | Mar 26 2004 | Jasper Design Automation | System and method for measuring progress for formal verification of a design using analysis region |
7415686, | Dec 19 2005 | Bell Semiconductor, LLC | Memory timing model with back-annotating |
7418678, | Dec 01 2003 | Jasper Design Automation, Inc. | Managing formal verification complexity of designs with counters |
7421668, | Dec 08 2004 | Jasper Design Automation, Inc.; JASPER DESIGN AUTOMATION, INC | Meaningful visualization of properties independent of a circuit design |
7437694, | Feb 22 2005 | Jasper Design Automation | System and method for determining and identifying signals that are relevantly determined by a selected signal in a circuit design |
7500228, | Mar 16 2004 | AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED | System and method for automatically generating a hierarchical register consolidation structure |
7530046, | Jan 24 2003 | Altera Corporation | Chip debugging using incremental recompilation |
7603636, | Sep 30 2004 | SEMICONDUCTOR DESIGN TECHNOLOGIES LLC | Assertion generating system, program thereof, circuit verifying system, and assertion generating method |
7908577, | Aug 30 2007 | Kabushiki Kaisha Toshiba | Apparatus and method for analyzing circuit specification description design |
8046206, | Sep 27 2002 | MONTEREY RESEARCH, LLC | Method and system using subgraph isomorphism to configure hardware resources |
8176453, | Jan 23 2009 | Synopsys, Inc | Power-aware debugging |
8205187, | Jun 09 2009 | JASPER DESIGN AUTOMATION, INC | Generalizing and inferring behaviors of a circuit design |
20020147576, | |||
20020194543, | |||
20030135834, | |||
20040243374, | |||
20050091025, | |||
20050289486, | |||
20060190239, | |||
20070234249, | |||
20080005713, | |||
20080059928, | |||
20080082946, | |||
20080104556, | |||
20090064059, | |||
20090193373, | |||
20090271167, | |||
20100199237, | |||
20100293517, | |||
JP2006244119, | |||
RE40925, | May 12 1995 | Synopsys, Inc. | Methods for automatically pipelining loops |
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