A cause of deteriorating the hydrogen termination on the surface of a wafer is found to be water adsorbed on the surface. By exposing the wafer to an inert gas atmosphere containing an h2 gas so as to suppress the oxidation reaction due to the water, it is possible to improve the hydrogen termination on the wafer surface.
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17. A semiconductor manufacturing apparatus wherein hydrogen termination is maintained by, after completion of a first step of hydrogen-terminating a surface of a semiconductor, shifting to a second step of exposing said semiconductor to an inert gas atmosphere containing an h2 gas, a volume concentration of the h2 gas in a mixed gas of the inert gas and the h2 gas being 20 ppm to 3%.
1. A semiconductor device manufacturing method comprising:
maintaining hydrogen termination by, after completion of a first step of hydrogen-terminating a surface of a semiconductor, shifting to a second step of exposing said semiconductor to an atmosphere of an inert gas containing an h2 gas, a volume concentration of the h2 gas in a mixed gas of the inert gas and the h2 gas being 20 ppm to 3%.
31. A semiconductor manufacturing apparatus comprising:
maintaining hydrogen termination by, after completion of a first step of hydrogen-terminating a surface of a semiconductor, shifting to a second step of exposing said semiconductor to an inert gas atmosphere containing an h2 gas, the number of h2 molecules being greater than that of o2 molecules in the atmosphere of the inert gas containing the h2 gas.
16. A semiconductor device manufacturing method, comprising:
maintaining hydrogen termination by, after completion of a first step of hydrogen-terminating a surface of a semiconductor, shifting to a second step of exposing said semiconductor to an atmosphere of an inert gas containing an h2 gas, the number of h2 molecules being greater than that of o2 molecules in the atmosphere of the inert gas containing the h2 gas.
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This application is the National Phase of PCT/JP2005/016805, filed Sep. 13, 2005, the disclosure of which is hereby incorporated by reference in its entirety.
This invention relates to a method for treatment of maintaining the hydrogen termination of the surface of a semiconductor, an apparatus for carrying out such maintaining treatment, and products such as a semiconductor device obtained by carrying out such maintaining treatment.
Manufacturing processes of a field-effect transistor constituting an integrated circuit formed in a semiconductor region will be described with reference to
At first, element isolation is carried out, for example, by an STI (Shallow Trench Isolation) method, thereby forming an element region 102 on the surface of a p-type (100) plane silicon 101 serving as a semiconductor substrate (
Pre-oxidation cleaning such as RCA cleaning is applied to the element region 102 (
Then, boron is ion-implanted over the entire surface of the silicon 101 for controlling the threshold voltage (
Then, a polycrystalline silicon film is deposited over the entire surface of the silicon 101 and then patterned, thereby forming a gate electrode 105 of polycrystalline silicon on the gate insulating film 104 in the element region 102 (
Then, phosphorus is ion-implanted at a low concentration, thereby forming n− source and drain regions 106 that serve to relax high electric fields (
Then, a silicon oxide film (SiO2) is deposited over the entire surface of the silicon 101 by a CVD method or the like so as to cover the gate electrode 105 and then anisotropic etching is performed, thereby forming a side-wall insulating film 107 on the side walls of the gate electrode 105 (
Thereafter, n-type impurities such as arsenic are ion-implanted at a high concentration, thereby forming n+ source and drain regions 108 (
In Patent Document 1, the present inventors have previously pointed out that the hydrogen termination is deteriorated in a cleaning process, and proposed a technique for solving it.
In the case of the field-effect transistor forming method shown in
The foregoing description is given using the n-type field-effect transistor as an example, but the same also applies to a semiconductor element such as a p-type field-effect transistor, a TFT, a CCD, or an IGBT.
In view of the problem described above, an attempt has been made to transfer a wafer in a vacuum or in an N2 atmosphere from the drying process after the dilute hydrofluoric acid treatment to the gate oxidation. However, it is known that organic compounds adhere to the surface of the element region 102 in the vacuum transfer and, also in the transfer in the N2 atmosphere, the hydrogen termination is impaired with an increase in exposure time and thus the growth of a natural oxide film cannot be completely suppressed.
On the other hand, Patent Document 1 only points out the deterioration of the hydrogen termination in the cleaning process, but does not disclose that the hydrogen termination is also deteriorated during the vacuum transfer.
This invention has been made under these circumstances and has an object to elucidate a cause of disappearance of the hydrogen termination during transfer of a wafer so as to provide a more efficient hydrogen termination maintaining method, and further has an object to provide a semiconductor device having an electrically reliable gate insulating film and its manufacturing method by maintaining the hydrogen termination to suppress the growth of a natural oxide film.
This invention is characterized by maintaining the hydrogen termination by exposing the hydrogen-terminated surface to an inert gas containing hydrogen.
In order to show the Si—H bond decreasing behavior more comprehensibly, the wave numbers were, in
As shown in
In view of this, it is considered that the oxidation reaction on the surface may be prevented by exposure in an atmosphere with a very low oxygen partial pressure, for example, an inert gas atmosphere. The results of exposure in Ar and N2 atmospheres are shown in
The present inventors have studied a cause of generation of oxidizing species on the hydrogen-terminated surface. At first, it has been confirmed that the oxygen concentration in the Ar gas is at the several ppt level. Even if all the oxygen present in the Ar gas is adsorbed on the wafer surface, the number thereof is about 6×1012 in the case of the exposure for 24 hours. Since the number of Si—H terminations on the Si surface is on the order of 1014, it is not possible to remove all the terminations by the oxidation reaction. Therefore, the cause of decreasing the hydrogen termination is not the oxygen contained in the Ar gas.
In view of this, it has been considered that oxygen for that cause is dissolved oxygen in water adsorbed on the surface. It is known that water molecules are adsorbed in as many as 100 molecular layers on the wafer surface after drying (Yoshinori Nakagawa et al., “Measurement of Adsorbed Moisture Concentration on Solid Surface by Using Anhydrous Hydrogen Fluoride, “Proceedings, Microcontamination 93, San Jose, pp. 586-595, September 1993). It is conjectured that, other than H ions and OH ions at ph=7, dissolved oxygen is also present in the water of 100 molecular layers. It is known that OH ions act as a catalyst in the oxidation reaction of Si—H in water (E. P. Boonekamp et al., JAP. 75, 8121 (1994)). Thus, it is conjectured that the decrease in Si—H termination and the oxidation reaction on the Si surface are caused due to the interaction between OH ions and dissolved oxygen.
Based on this conjecture, as measures to suppress the oxidation reaction on the surface, there are cited the following three, i.e. (1) reducing the amount of OH ions in water adsorbed on the surface, (2) reducing the amount of dissolved oxygen, and (3) reducing the oxidation-reduction potential so as to suppress the oxidation reaction. At this time, with respect to the above (1), it is currently difficult to change the pH of the adsorbed water. With respect to the above (2), it is expected that the dissolved oxygen is desorbed from the liquid phase into the gas phase by the storage in an inert gas atmosphere, but actually, as shown in
To explain the reason for setting the volume concentration of H2 in the mixed gas of Ar and H2 to 3%, the explosion lower limit of hydrogen is 4% and thus it is not practical to set it to 4% or more because of danger at the time of mixing the air. It was judged that a maximum of 3% was practically adequate. A similar effect is obtained using an inert gas mixed with 20 ppm hydrogen. Further, it is also appropriate that the number of H2 molecules is greater than that of O2 molecules in an inert gas atmosphere. In this case, it becomes possible to lower the oxidation-reduction potential of water by dissolution of more H2 molecules into the water.
About 5 ppm dissolved oxygen is contained in water adhering to the wafer surface and, when brought into contact with an inert gas containing 10 ppm hydrogen, the dissolved oxygen is desorbed into the inert gas and further the hydrogen in the inert gas is dissolved into the water. The mole ratio between the dissolved oxygen and the dissolved hydrogen is reversed in an instant to cause a reduction in oxidation-reduction potential. In this event, in order to increase the efficiency of substitution between the dissolved oxygen and the dissolved hydrogen, the mixed gas of the inert gas and hydrogen may be constantly caused to flow into a container at 10 sccm or more or the inert gas containing hydrogen may be introduced and sealed in a hermetic container.
Although it is also necessary to manage the concentration of oxygen mixed as impurities in the inert gas, N2 or Ar used in a normal semiconductor grade is managed at an oxygen concentration of 10 ppm or less. With this impurity level, it is easy to reduce the oxidation-reduction potential by dissolution of hydrogen and thus the decrease in hydrogen termination can be efficiently prevented.
According to the invention, by adding a hydrogen gas into an inert gas, it was possible to store a wafer without impairing the hydrogen termination formed after dilute hydrofluoric acid treatment. Introduction of this technique into a wafer carrier box of SMIF or the like is also easy. Further, the effect is also expected by introducing a mixed gas of an inert gas and a hydrogen gas into wafer transfer portions in a semiconductor manufacturing apparatus. Since a natural oxide film is not formed on the silicon surface, the reliability of a gate insulating film is also improved.
Manufacturing processes of a field-effect transistor constituting an integrated circuit formed in a semiconductor region will be described using an LDD (Lightly Doped Drain)-structure n-type field-effect transistor as an example.
Element isolation is carried out, for example, by an STI (Shallow Trench Isolation) method, thereby forming an element region 702 including source, drain, and channel regions on the surface of a p-type (100) silicon wafer 701 (
Subsequently, the flow shifts to a first process that carries out the hydrogen termination.
Using a chemical solution treatment apparatus (wafer cleaning apparatus 10), shown in
Thereafter, treatment with dilute hydrofluoric acid system, such as FPM treatment, and then rinsing with pure water and wafer drying are carried out to hydrogen-terminate 703 the element region 702 (
Thereafter, the flow shifts to a second process. In
The wafer is placed in the wafer carrier box 20 and transferred to a gate oxidation apparatus 30 (
In the case of
Then, boron is ion-implanted over the entire surface of the silicon wafer 701 for controlling the threshold voltage (
Then, a polycrystalline silicon film is deposited over the entire surface of the silicon wafer 701 and then patterned, thereby forming a gate electrode 705 of polycrystalline silicon on the gate insulating film 704 in the element region 702 (
Then, phosphorus is ion-implanted at a low concentration, thereby forming n− source and drain regions 706 that serve to relax high electric fields (
Then, a silicon oxide film (SiO2) is deposited over the entire surface of the silicon wafer 701 by a CVD method or the like so as to cover the gate electrode 705 and then anisotropic etching is performed, thereby forming a side-wall insulating film 707 on the side walls of the gate electrode 705 (
Thereafter, n-type impurities such as arsenic are ion-implanted at a high concentration, thereby forming n+ source and drain regions 708 (
The technique of storing a wafer in an inert gas added with H2 for preventing the decrease in hydrogen termination can obtain the same effect for silicon of any plane orientation and has the effect even for another semiconductor such as SiGe or Ge. Further, it can be used not only for the MOSFET of
This invention is applicable not only to a semiconductor device having a gate insulating film of an MOS transistor and its manufacturing method, but also to a semiconductor device such as a TFT, a CCD, or an IGBT.
Akahori, Hiroshi, Ohmi, Tadahiro, Teramoto, Akinobu
Patent | Priority | Assignee | Title |
Patent | Priority | Assignee | Title |
5578504, | Jul 16 1993 | Shin-Etsu Handotai Co., Ltd.; SHIN-ETSU HANDOTAI CO , LTD | Method for determination of resistivity of N-type silicon epitaxial layer |
5621605, | Aug 31 1990 | Tadahiro, Ohmi; Takasago Netsugaku Kogyo Kabushiki kaisha | Neutralizing apparatus for charged body |
5754166, | Apr 27 1995 | ALPS Electric Co., Ltd. | Coordinate input device |
6232178, | Nov 11 1998 | Renesas Electronics Corporation | Method for manufacturing capacitive element |
6498107, | May 01 2000 | Lumentum Operations LLC | Interface control for film deposition by gas-cluster ion-beam processing |
6905972, | Sep 03 2001 | Renesas Electronics Corporation | Semiconductor device and method for manufacturing the same |
7103990, | Sep 24 2002 | Fujikin Incorporated; OHMI, Tadahiro; PRE-TECH CO , LTD | Rotary silicon wafer cleaning apparatus |
20030045063, | |||
20040007177, | |||
20050126030, | |||
JP2001293443, | |||
JP2003077844, | |||
JP2005051141, | |||
JP6013333, | |||
JP7142438, | |||
JP7302775, |
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