An integrated circuit has a semiconductor die provided in a first IC layer and an inductor fabricated on a second IC layer. The inductor may have a winding and a magnetic core, which are oriented to conduct magnetic flux in a direction parallel to a surface of a semiconductor die. The semiconductor die may have active circuit components fabricated in a first layer of the die, provided under the inductor layer. The integrated circuit may include a flux conductor provided on a side of the die opposite the first layer. PCB connections to active elements on the semiconductor die may progress through the inductor layer as necessary.
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1. An integrated circuit, comprising:
a semiconductor die having active circuit components fabricated in a first surface thereon and having at least one through silicon via (TSV) that extends from the first surface to a second surface of the semiconductor die opposite to the first surface; and
an inductor layer provided over the second surface of the semiconductor die opposite to the first surface, the inductor layer comprising an inductor winding provided around a magnetic core, the winding of the inductor oriented to conduct flux in a direction generally parallel to the first surface of the semiconductor die, wherein the inductor is electrically connected to at least one active circuit component in an electrical path that includes the TSV.
9. An integrated circuit, comprising:
a semiconductor die having active circuit components fabricated in a first surface thereon and having at least one through silicon via (TSV) that extends from the first surface to a second surface of the semiconductor die opposite to the first surface; and
an inductor layer provided over the second surface of the semiconductor die opposite to the first surface, the inductor layer comprising a magnetic core including a planar surface extending along the second surface of the semiconductor die and an inductor winding with winding surrounding the magnetic core along the planar surface of the magnetic core, wherein the inductor is electrically connected to at least one active circuit component in an electrical path that includes the TSV.
2. The integrated circuit of
3. The integrated circuit of
4. The integrated circuit of
5. The integrated circuit of
6. The integrated circuit of
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10. The integrated circuit of
11. The integrated circuit of
12. The integrated circuit of
13. The integrated circuit of
14. The integrated circuit of
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This application is a continuation of U.S. application Ser. No. 13/273,726, filed Oct. 14, 2011, which benefits from priority of Provisional Application Ser. No. 61/531,459, filed Sep. 6, 2011, the disclosure of both of which is incorporated herein.
The subject matter of this application is directed to magnetic circuits implemented on an integrated circuit for providing functionality derived from magnetic circuits, e.g., applications for resistor-inductor-capacitor (commonly, “RLC”) circuits.
Traditional switched power converters require discrete inductors that are large and expensive. For many portable applications such as handsets, size and cost are critical. For a single battery system, there are usually many voltage domains so that power is optimized for each voltage domain. Such systems require efficient power conversion from the voltage of the source battery to the other voltage domains to optimize power consumption and thus extend battery life. Linear regulators can be used without the need of inductors, but they are very inefficient, especially for large step down ratios. It is desired to have switched converters for step down and step up conversions for efficient power transfer, however, discrete inductors required for the switching power converters are large and heavy, not desirable for portable applications. Also, for portable applications, it is desired that the converters have good load transient response and thus fast switching frequency. Discrete inductors are disadvantageous for such applications because they become lossy at high frequencies. It is desired to have inductors that are small, light weight and have good high frequency efficiency.
Air core inductors have limitations due, in part, to high resistance and low inductance. For example, power may be radiated back to the power plant or ground plane which may affect the electromagnetic interference (EMI). Designers must concentrate a great deal of effort to using high frequency signals and switching to mitigate the effects of EMI. EMI is proportional to frequency. Printed circuit board (PCB) designers must be concerned with EMI effects due to high currents that are generated. Radiated power is also a problem as it may interfere with other circuits that are not connected to the PCB.
In addition, when manufactured within an integrated circuit die (“IC”), air core inductors are not efficient with small inductance and high resistance, which causes users to limit power available due to thermal limits for packaging. On chip power dissipation limits the power that may be provided to an on-chip inductor. These effects can limit the applications for which air core IC inductors can be used.
The addition of magnetic cores to inductors increases winding inductance and power conversion efficiency resulting in lower inductor peak current, reduced power consumption and also reduced interference to other components. It can lead to use of lower switching frequencies among driving signals. Further, magnetic flux is more constrained by a magnetic core which limits EMI corruption to circuit components that would be co-located with the magnetic core inductor. Increased inductance per unit area also leads to high energy density and device miniaturization.
Magnetic core-based inductors have been used on integrated circuit dies with only limited success. Usually planar spiral coils are used with the addition of a single magnetic layer above or below them. The inductance enhancement from such implementation over the air core spirals is very limited, at most 100%. To achieve the inductance needed, it occupies a large die area. Its size mismatch with power switching circuits makes the integration not economically viable. Magnetic core-based inductors tend to occupy large areas when laid out on integrated circuit die, which interferes with design attempts to make smaller chips. Such layout issues become exacerbated when designers attempt to find configurations that allow such integrated circuits to be mounted on larger components, for example, a printed circuit board (PCB). No known inductor configuration adequately meets these design needs.
Embodiments of the present invention may provide for an integrated circuit having a semiconductor die provided in a first IC layer and an inductor fabricated on a second IC layer. The inductor may have a winding and a magnetic core, which are oriented to conduct magnetic flux in a direction parallel to a surface of a semiconductor die. The semiconductor die may have active circuit components fabricated in a first layer of the die, provided under the inductor layer. The integrated circuit may include a flux conductor provided on a side of the die opposite the first layer. The integrated circuit also may include a plurality of chip connectors, such as solder balls, to mount the integrated circuit to a larger structure, for example a PCB, in a chip scale package (CSP) configuration to minimize PCB area needed for the devices, thus make them more compact and light weight. PCB connections to active elements on the semiconductor die may progress through the inductor layer as necessary.
The magnetic core may be a solid bar with the winding provided around it. Alternatively, the magnetic core may be formed from a plurality of magnetic bars separated by dielectric spacers with the winding provided around the collection of bars. In a further embodiment, the core may be provided as a pair of cores with the winding provided around the first core in a first sub-winding then extending to and winding around the second core.
A single bar core has the most area efficiency as a pair of cores on the same surface will occupy larger area, but there is concern on EMI due to leakage flux with single bar core. A magnetic layer on the opposite of the die surface where the inductors are fabricated can help to close the flux loop without the need for extra surface area. This added magnetic layer needs not to be patterned so it can simply be a ferrite loaded epoxy layer or other films with magnetic permeability larger than one deposited or coated.
In another embodiment, an integrated circuit may have a semiconductor die provided in a first IC layer and an inductor fabricated on a second IC layer. The inductor may have a winding and a magnetic core, which are oriented to conduct magnetic flux in a direction parallel to a surface of a semiconductor die. The semiconductor die may have active circuit components fabricated in a layer of the die which provided on an opposite side from a side on which the inductor layer is mounted. The integrated circuit may include a plurality of chip connectors, such as solder balls, to mount the integrated circuit to a larger structure, for example a PCB, in a chip scale package (CSP) configuration to minimize PCB area needed for the devices, thus make them more compact and light weight.
Inductor(s) of the inductor layer 112 and component(s) of the active device layer 114 each will be configured for specific applications of the integrated circuit. The semiconductor die 110 may have dimensions sized to accommodate the dimensions of the inductor layer 112 and active device layer 114. Interconnect structures 130.1-130.n may be provided within a spatial area defined by a perimeter of the semiconductor die 110. Thus, the interconnect 130 need not expand the “footprint” of the die 110 when the die 110 is mounted on the PCB 120.
The inductor layer 112 is illustrated as including traces 172-178 connected to other solder balls 130.2 and 130.4-130.n for connection to circuit components of the active layer (not shown). These traces may penetrate through the inductor layer 112 without electrically engaging with either the winding 150 or the magnetic core 152. The traces may carry supply voltages (e.g., VDD or ground) or information signals for components of the active layer.
The example of
The example of
Moreover, the example of
The inductor layer 420 may include an inductor winding 430 having a plurality of spiral turns, each turn formed by a pair of traces 432, 434 formed on two parallel sub-layers of the inductor layer 420, and a pair of winding posts 436, 438 extending upwardly through the sub-layers to connect to the traces 432, 434. When the inductor layer 420 is manufactured in an integrated circuit, the winding 430 may include several sets of posts 436, 438 and traces 432, 434 arranged in a multi-turn spiral as shown in
The inductor may be encased in various layers of dielectric insulating material 452-458 to prevent electrical engagement between the inductor winding 430 and any other circuit component.
Since
The orientation of the magnetic core 440 and winding 430 allows the inductors to be manufactured according to conventional integrated circuit manufacturing techniques. Using semiconductor masks and photolithography, the windings 430, 480 dielectrics 442 and 454-458 and magnetic cores 440, 490 may be built up in multiple layers of material depositions. In one example, winding traces 434, 484 that form a rear surface of the windings 430, 480 may be built up in a first stage of manufacture on top of dielectrics 452 that isolate the inductors from the die 410 and from any die-oriented interconnect traces 474-474. Thereafter, a dielectric layer 454 may be applied to fill in interstitial regions between the traces 434, 484 and also to cover them. In another stage, materials representing the magnetic cores 440, 490 may be laid upon the first dielectric layer 452. Additionally, materials representing the winding posts 436, 438, 486, 488 may be built up from appropriate connection points of the rear surface traces 434, 484 to build lateral sides of the respective windings 430, 480. An additional layer 456 of dielectric material may be applied to encase the magnetic cores 440, 490 and winding posts 436, 438, 486, 488 in the dielectric. Further metallic material may be deposited on the dielectric-covered front side of the magnetic cores 440, 490 to build up front traces 432, 484 to complete the windings 430, 480. Thereafter a final layer 458 of dielectric may be deposited on the windings 430, 480 with accommodation made for any interconnect structures 460, 462 that are needed.
In an embodiment, the dielectric materials may be high dielectric breakdown materials such as polyimide, silicon dioxide, silicon nitride and the like. The magnetic core layers 440, 490 and flux conductor layer 495 can be made of materials of high permeability such as CoTaZr (cobalt tantalum zirconium) NiFe (nickel ferrite) and FeCo (ferrite cobalt)-based alloys. The windings and metal interconnect structures may be formed of an appropriate conductive metal such as gold or copper.
The winding 520 may spiral around the entire core structure, including all bars 510.1-510.n and voids. It may have input and output terminals 522, 524 to connect the winding to other circuit structures.
The inductor may be mounted within a semiconductor substrate such that conductivity of magnetic flux carried by the core extends in a direction parallel to a surface of the substrate.
The winding 620 may extend between input and output terminals 622, 624. The winding 620 may spiral around the first core element 610A, then extend to and spiral around the second core element 610B. The orientation of the winding 620 may be reversed between the first and second core elements 610A, 610B to reduce flux leakage from the inductor 600. In this manner, a driving current may induce flux in the two core elements having opposite direction from each other. This configuration helps provide a flux return path, and reduce flux leakage into surrounding components and EMI radiation. The inductor 620 may be mounted within a semiconductor substrate such that conductivity of magnetic flux carried by the core extends in a direction parallel to a surface of the substrate.
During manufacture, the hard axis of the magnetic core material may be controlled to align to the direction of magnetic flux that will be generated by the inductor during operation. Aligning the hard axis with the direction of flux is expected to reduce switching losses that may occur during operation of the inductor.
The embodiment of
The flux traveling along the easy axis (Y-direction) can be lossy. Thus, flux may tend to escape through the top of the core instead of following the shape of the magnetic core 710 along the Y axis. In this sense, the embodiment may exhibit more losses than the embodiment of
The inductor may be mounted within a semiconductor substrate such that conductivity of magnetic flux carried by the core extends in a direction parallel to a surface of the substrate.
In a first embodiment, the magnetic core 710 may be a solid magnetic core. In another embodiment, the magnetic core may have voids 716 provided in a volume formed by the sub-windings 720A, 720B. The voids 716 may be filled with insulating material or a dielectric material that may change anisotropy and enhance magnetic permeability.
The embodiment of
During operation, flux may be developed in the center core element 910B in response to a driving current. The edge core elements 910A, 910C may develop a return path for the flux, which helps reduce flux leakage outside the core.
The embodiment of
As illustrated, the integrated circuit 1000 may include a semiconductor die 1010 having a layer for active elements 1012 on a first face of the die 1010 and a dielectric layer 1014 provided on a second face of the die 1010. The inductor assembly 1020 may be provided on the second face of the die 1010 and may include inductor winding(s) 1030, 1080 having a plurality of spiral turns. The integrated circuit may include a variety of through silicon vias (TSVs) to facilitate electrical connection between inductor(s) and components of the active element layer 1012 as circuit needs require.
With the inductor assembly 1020, windings 1030 may include a plurality of turns formed by traces 1032, 1034 formed on two parallel layers of the inductor assembly 1020 and winding posts 1036, 1038 extending upwardly between the layers to connect to the traces 1032, 1034. Inductors further may include a magnetic core 1040 provided in a center of the windings and a dielectric material 1042 electrically isolating all turns of the winding 1030 from the magnetic core 1040.
The inductor assembly 1020 may be encased in various layers of dielectric insulating material 1052-1058 to prevent electrical engagement between the inductor winding 1030 and any other circuit component.
The orientation of the magnetic core 1040 and winding 1030 allows the inductors to be manufactured according to conventional integrated circuit manufacturing techniques. Using semiconductor masks and photolithography, the windings 1030, 1080 dielectrics 1042 and 1054-1058 and magnetic cores 1040, 1090 may be built up in multiple layers of material depositions. In one example, winding traces 1034, 1084 that form a rear surface of the windings 1030, 1080 may be built up in a first stage of manufacture on top of dielectrics 1052 that isolate the inductors from the die 1010 and from any die-oriented interconnect traces 1074-1074. Application of a dielectric layer 1054 may occur in a subsequent manufacturing stage to fill in interstitial regions between the traces 1034, 1084 and also to cover them. In another stage, materials representing the magnetic cores 1040, 1090 may be laid upon the first dielectric layer 1052. Additionally, materials representing the winding posts 1036, 1038, 1086, 1088 may be built up from appropriate connection points of the rear surface traces 1034, 1084 to build lateral sides of the respective windings 1030, 1080. An additional layer 1056 of dielectric material may be applied to encase the magnetic cores 1040, 1090 and winding posts 1036, 1038, 1086, 1088. Further, metallic material may be deposited on the dielectric-covered front side of the magnetic cores 1040, 1090 to build up front traces 1032, 1084 to complete the windings 1030, 1080. Thereafter a final layer 1058 of dielectric may be deposited on the windings 1030, 1080 with accommodation made for any interconnect structures 1050, 1052 that are needed.
In an embodiment, the dielectric materials may be high dielectric breakdown materials such as polyimide, silicon dioxide, silicon nitride and the like. The magnetic core layers 1040, 1090 and flux conductor layer 1095 can be made of materials of high permeability such as CoTaZr (cobalt tantalum zirconium) NiFe (nickel ferrite) and FeCo (ferrite cobalt)-based alloys. Finally, the windings and metal interconnect structures may be formed of an appropriate conductive metal such as gold or copper.
Several embodiments of the invention are specifically illustrated and/or described herein. However, it will be appreciated that modifications and variations of the invention are covered by the above teachings and within the purview of the appended claims without departing from the spirit and intended scope of the invention.
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