A nitride-based semiconductor light-emitting device includes an n-type nitride-based semiconductor layer, an active layer, a p-type nitride-based semiconductor layer, an ohmic contact layer covering a portion of the p-type nitride-based semiconductor layer upper surface, and a p electrode including a first portion contacting the p-type nitride-based semiconductor layer and a second portion contacting the ohmic contact layer.
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1. A nitride-based semiconductor light-emitting device comprising:
an n-type nitride-based semiconductor layer;
an active layer formed on the n-type nitride-based semiconductor layer;
a p-type nitride-based semiconductor layer formed on the active layer;
an ohmic contact layer comprising a p-type nitride-based semiconductor covering a portion of an upper surface of the p-type nitride-based semiconductor layer on the p-type nitride-based semiconductor layer, wherein the ohmic contact layer has a thickness of about 100 to 200 nm and covers about 16 to 82% of the upper surface of the p-type nitride-based semiconductor layer; and
a p electrode formed on the ohmic contact layer, the p electrode including a first portion contacting the p-type nitride-based semiconductor layer and a second portion contacting the ohmic contact layer.
12. A nitride-based semiconductor light-emitting device comprising:
an active layer;
a first nitride-based semiconductor layer for supplying electrons to the active layer when power is supplied to the first nitride-based semiconductor layer;
a second nitride-based semiconductor layer for supplying holes to the active layer when power is supplied to the second nitride-based semiconductor layer;
an ohmic contact layer comprising a p-type nitride-based semiconductor discontinuously covering an upper surface of the second nitride-based semiconductor layer, wherein the ohmic contact layer has a thickness of about 100 to 200 nm and covers about 16 to 82% of the upper surface of the p-type nitride-based semiconductor layer; and
an electrode including a first portion contacting the second nitride-based semiconductor layer, and a second portion contacting the ohmic contact layer.
3. The device of
the p-type nitride-based semiconductor layer and the ohmic contact layer contact each other via regions between the plurality of contact region islands.
4. The device of
5. The device of
wherein the p-type nitride-based semiconductor layer and the ohmic contact layer contact each other via the plurality of holes.
6. The device of
7. The device of
8. The device of
9. The device of
an n electrode connected to the n-type nitride-based semiconductor layer,
wherein the p electrode and the n electrode are disposed to face a same direction.
10. The device of
11. The device of
wherein the p electrode and the n electrode are disposed facing opposing directions.
13. The device of
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This application claims the benefit of Korean Patent Application No. 10-2012-0157333, filed on Dec. 28, 2012, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
The disclosure relates to nitride-based semiconductor light-emitting devices, and more particularly, to a nitride-based semiconductor light-emitting device including a nitride-based semiconductor ohmic contact layer.
Light-emitting diodes (LEDs) having a wavelength of 200 to 350 nm have been applied to various fields, e.g., sterilization, water purification, various medical fields, decomposition of pollutants, bio engineering, etc. As products using a deep ultraviolet (DUV) LED have evolved, much effort is required to improve the light extraction efficiency (LEE) of the DUV LED.
The disclosure provides a nitride-based semiconductor light-emitting device having an improved light extraction efficiency (LEE).
According to an aspect of the disclosure, there is provided a nitride-based semiconductor light-emitting device including an n-type nitride-based semiconductor layer. An active layer is formed on the n-type nitride-based semiconductor layer and a p-type nitride-based semiconductor layer formed on the active layer. An ohmic contact layer covers a portion of an upper surface of the p-type nitride-based semiconductor layer on the p-type nitride-based semiconductor layer. A p electrode is formed on the ohmic contact layer, and includes a first portion contacting the p-type nitride-based semiconductor layer and a second portion contacting the ohmic contact layer.
According to another aspect of the disclosure, there is provided a nitride-based semiconductor light-emitting device including an active layer. A first nitride-based semiconductor layer supplies electrons to the active layer when power is supplied to the first nitride-based semiconductor layer. A second nitride-based semiconductor layer supplies holes to the active layer when power is supplied to the second nitride-based semiconductor layer. An ohmic contact layer discontinuously covers an upper surface of the second nitride-based semiconductor layer. An electrode includes a first portion contacting the second nitride-based semiconductor layer, and a second portion contacting the ohmic contact layer.
Exemplary embodiments of the disclosure will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings.
Hereinafter, exemplary embodiments of the disclosure will be described in greater detail with reference to the accompanying drawings. Like elements refer to like elements throughout and are not redundantly described here.
The disclosure may, however, be embodied in many different forms and should not be construed as limited to the exemplary embodiments. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those of ordinary skilled in the art.
It will be understood that, although the terms ‘first’, ‘second’, ‘third’, etc., may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the disclosure.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the disclosure belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
When an embodiment of the disclosure may be embodied differently, a particular process may be performed in an order different from an order described herein. For example, two operations that are continuously described herein may be substantially simultaneously performed or may be performed in an order that is reverse of an order described herein.
Embodiments of the disclosure are described herein with reference to cross-section illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the disclosure. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, embodiments of the disclosure should not be construed as limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing.
As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items. Expressions such as “at least one of,” when preceding a list of elements, modify the entire list of elements and do not modify the individual elements of the list.
Referring to
To generate light of a UV range having a wavelength of about 200 to 350 nm in the active layer 120, the n-type nitride-based semiconductor layer 110, the active layer 120, and the p-type nitride-based semiconductor layer 130 may each include an AlGaN compound semiconductor. For example, the n-type nitride-based semiconductor layer 110 may be formed of n-doped AlGaN (n-AlGaN), the active layer 120 may be formed of undoped AlGaN (u-AlGaN), and the p-type nitride-based semiconductor layer 130 may be formed of p-doped AlGaN (p-AlGaN). An aluminum (Al) composition ratio in each of the n-type nitride-based semiconductor layer 110 and the p-type nitride-based semiconductor layer 130 may be 50% or more. The Al composition ratio in the active layer 120 may be lower than those in the n-type nitride-based semiconductor layer 110 and the p-type nitride-based semiconductor layer 130. For example, the Al composition ratio in the active layer 120 may be 30% or more and 50% or less.
The n-type nitride-based semiconductor layer 110 that supplies electrons to the active layer 120 when power is supplied thereto may include impurities consisting of group IV elements that are n-type impurities. In some embodiments, the n-type nitride-based semiconductor layer 110 may include Si, Ge, Se, or Te impurities. In some embodiments, the n-type nitride-based semiconductor layer 110 may be formed on a substrate 140 by metal-organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxy (HYPE), or molecular beam epitaxy (MBE).
The substrate 140 may be a transparent substrate for growing a Group III-V semiconductor layer. For example, the substrate 140 may be formed of a material selected from the group consisting of sapphire, Si, GaN, glass, ZnO, GaAs, SiC, MgAl2O4, MgO, LiAlO2, and LiGaO2. When the substrate 140 is formed of sapphire, the substrate 140 may include a crystallographic plane, e.g., a C-plane ((0001) plane), an A-plane ((1120) plane), or an M-plane ((1102) plane). The C-plane sapphire substrate may provide stable characteristics at high temperatures, and it is easy to form a nitride thin film thereon.
When the n-type nitride-based semiconductor layer 110 is formed of AlGaN, a buffer layer 150 may be formed on the substrate 140, and the n-type nitride-based semiconductor layer 110 may be grown on the buffer layer 150. The buffer layer 150 is formed between the substrate 140 and the n-type nitride-based semiconductor layer 110 to lessen a lattice mismatch between the substrate 140 and the n-type nitride-based semiconductor layer 110. In some embodiments, the buffer layer 150 may be a single layer formed of MN or GaN. In some embodiments, the buffer layer 150 may include super-lattice layers formed of AlGaN/AlN.
The active layer 120 emits light with predetermined energy when electrons and holes are combined therein with one another. The active layer 120 may have a structure in which a quantum well layer and a quantum barrier layer are alternately stacked at least once. The quantum well layer may have a single quantum well structure or a multi-quantum well structure. In some embodiments, the active layer 120 may be formed of u-AlGaN. In some embodiments, the active layer 120 may have a multi-quantum well structure including GaN/AlGaN, InAlGaN/InAlGaN, or InGaN/AlGaN. To improve the luminance efficiency of the active layer 120, the depth of a quantum well, the number of stacked pairs of quantum well layers and quantum barrier layers, the thicknesses of the stacked pairs of the quantum well layer and the quantum bather layer, etc. may be changed. In some embodiments, the active layer 120 may be formed by MOCVD, HYPE, or MBE.
The p-type nitride-based semiconductor layer 130 that supplies power to the active layer 120 when power is supplied thereto may include impurities formed of group II elements, which are p-type impurities. In some embodiments, the p-type nitride-based semiconductor layer 130 may include Mg, Zn, or Be impurities. In some embodiments, the p-type nitride-based semiconductor layer 130 may be formed by MOCVD, HYPE, or MBE.
A p electrode 160 is formed on the p-type nitride-based semiconductor layer 130. The p electrode 160 contacts a portion of an upper surface of the p-type nitride-based semiconductor layer 130. The p electrode 160 may reflect light emitted from the active layer 120. The p electrode 160 may be formed of a metal or an alloy having high reflectivity in a UV range having a wavelength of about 350 nm or less. In some embodiments, the p electrode 160 may include aluminum (Al) or an Al alloy. The Al alloy may include Al, and a metal having a higher work function than Al. In some embodiments, the p electrode 160 may include Al, and at least one metal selected from the group consisting of Ni, Au, Ag, Ti, Cr, Pd, Cu, Pt, Sn, W, Rh, Ir, Ru, Mg, and Zn. In some embodiments, the p electrode 160 may include a lower electrode film for improving ohmic contact, and an upper electrode film formed on the lower electrode film. For example, the lower electrode film may include at least one metal selected from the group consisting of Ni, Au, Ag, Ti, and Cr. The upper electrode film may include Al. At least one of the lower electrode film and the upper electrode film may be formed of an alloy layer or a combination of a single metal layer and an alloy layer.
An ohmic contact layer 170 is formed in a region between the p-type nitride-based semiconductor layer 130 and the p electrode 160. The ohmic contact layer 170 may be formed of a p-type nitride-based semiconductor layer. For example, the ohmic contact layer 170 may be formed of p-GaN or p-InGaN.
When the p-type nitride-based semiconductor layer 130 includes an AlGaN layer, the AlGaN layer has higher activation energy than a GaN layer that does not include Al. Even if p-type impurities are implanted into the AlGaN layer, the doped concentration of the p-type impurities may be lower than in the GaN layer. In particular, the more the content of Al in the AlGaN layer, the lower the doped concentration of the p-type impurities in the AlGaN layer may be. In this case, by forming the ohmic contact layer 170 between the p-type nitride-based semiconductor layer 130 and the p electrode 160, problems caused when an efficiency of doping p-type impurities in the p-type nitride-based semiconductor layer 130 is lowered may be compensated for.
A concavo-convex structure corresponding to the outline of the ohmic contact layer 170 is formed on a surface 160S of the p electrode 160 on the ohmic contact layer 170, which faces the active layer 120. The surface 160S of the p electrode 160 includes a first portion 160R contacting the p-type nitride-based semiconductor layer 130 and a second portion 160C contacting the ohmic contact layer 170 for the flow of current through the ohmic contact. In the surface 160S of the p electrode 160, the second portion 160C is recessed compared to the first portion 160R.
In the first portion 160R, light emitted from the active layer 120 and passing through the p-type nitride-based semiconductor layer 130 may be reflected directly from the first portion 160R without passing through the ohmic contact layer 170. In the second portion 160C, ohmic contact may be formed with the ohmic contact layer 170, the light emitted from the active layer 120 and passing through the p-type nitride-based semiconductor layer 130 may pass through the ohmic contact layer 170 to be reflected from the p electrode 160, and a portion of the light may be absorbed by the ohmic contact layer 170 while the light passes through the ohmic contact layer 170.
The n-type nitride-based semiconductor layer 110 is connected to an n electrode 180 through which power is supplied from the outside. The n electrode 180 is disposed such as it faces a direction that the p electrode 160 faces. The n electrode 180 may include a single metal film selected from the group consisting of Ni, Al, Au, Ti, Cr, Ag, Pd, Cu, Pt, Sn, W, Rh, Ir, Ru, Mg, and Zn, or a multi-layered film or an alloy film formed of a combination thereof.
Referring to
Referring to
Referring to
However, the shape of the ohmic contact layer 170 is not limited to that illustrated in any of
The ohmic contact layer 170 may be formed to cover at least 15% of the area of the upper surface 130T of the p-type nitride-based semiconductor layer 130. For example, the ohmic contact layer 170 may be formed to cover about 15 to 80% of the area of the upper surface 130T of the p-type nitride-based semiconductor layer 130 but it is not limited thereto.
Referring to
To form p-GaN island layers 172, p-GaN may be grown on the upper surface 130T of the p-type nitride-based semiconductor layer 130 by MOCVD while supplying a Ga source, an N source, a dopant source, and a carrier gas to the upper surface 130T. In some embodiments, trimethyl gallium or triethyl gallium may be used as the Ga source. NH3, NH4OH, monomethylamine, dimethylamine, diethylamine, tert-butylamine, a hydrazine-based material, or derivatives thereof may be used as the N source. bis(cyclopentadienyl)magnesium (Cp2Mg) or bis(methylcyclopentadienyl)magnesium [(MeCp)2Mg)] may be used as the dopant source. H2, N2, He, Ne, Ar, or a combination thereof may be used as the carrier gas.
While the p-GaN is grown to form the ohmic contact layer 170, a process temperature of about 900 to 1300° C. and a process pressure of about 5 to 50 KPa may be maintained. For example, a process of growing the p-GaN to form the ohmic contact layer 170 may be performed at about 1000 to 1200° C. under about 10 to 20 KPa.
During the growing of the p-GaN to form the ohmic contact layer 170, a feed molar ratio between the N source gas and the Ga source gas may be about 100:1 to 10000:1. For example, the supply mole ratio between the N source gas and the Ga source gas may be about 1000:1 to 3000:1.
In some embodiments, each of the N source gas and the Ga source gas may be continuously supplied during the growing of the p-GaN to form the ohmic contact layer 170. In some embodiments, at least one of the N source gas and the Ga source gas may be supplied in a pulsed mode in which gas supply is repeatedly switched between ‘on’ and ‘off’ at predetermined time intervals.
During the growing of the p-GaN to form the ohmic contact layer 170, a process time may be controlled to adjust sizes and heights of p-GaN islands that constitute the ohmic contact layer 170. Also, by controlling the process time, an area of the upper surface 130T of the p-type nitride-based semiconductor layer 130 that is covered by p-GaN islands constituting the ohmic contact layer 170 may be adjusted.
During the process of growing the p-GaN to form the ohmic contact layer 170, an island growth operation of forming the plurality of p-GaN island layers 172 (see
As illustrated in
In some embodiments, MOCVD used to form the ohmic contact layer 170 may be performed until the island growth operation illustrated in
In some embodiments, MOCVD used to form the ohmic contact layer 170 may be performed until the lateral grown operation illustrated in
In some embodiments, MOCVD used to form the ohmic contact layer 170 may be performed until the fusing operation illustrated in
A case in which a subsequent process is performed on the resultant structure of
Referring to
Referring to
The electron-blocking layer 225 is used to increase an internal quantum efficiency of a light-emitting device, and may be formed of a material with high band gap energy. A band gap of the electron-blocking layer 225 may be higher than that of the active layer 120.
In some embodiments, the electron-blocking layer 225 may be formed of AlGaN. Here, the Al composition ratio in the electron-blocking layer 225 may be adjusted such that the electron-blocking layer 225 has higher band gap energy than that of the active layer 120. For example, the Al composition ratio in the electron-blocking layer 225 may be about 50% or more. The electron-blocking layer 225 may prevent electrons flowing into the active layer 120 from the n-type nitride-based semiconductor layer 110 from being over-flown to the p-type nitride-based semiconductor layer 130 on the active layer 120 without being reunited in the active layer 120, and may cause the electrons to be bound in the active layer 120, thereby increasing a rate of reuniting electrons and holes in the active layer 120.
The conductive adhesive layer 310 may include a thin film or stud bumps. In some embodiments, the conductive adhesive layer 310 may be formed of Au, Sn, Ag, Cu, Al, Ni, Ti, Pd, Pt, W, Cr, Rh, Ir, Ru, Mg, Zn, or a combination thereof but it is not limited thereto.
The submount 320 may be formed of a material having high thermal conductivity. In some embodiments, the submount 320 may be formed of Si but is not limited thereto.
In some embodiments, the nitride-based semiconductor light-emitting device 300 may not include a substrate 140. In some embodiments, a concavo-convex pattern (not shown) may be formed on a portion of a surface of the substrate 140. When the concavo-convex pattern is formed on the substrate 140, a light extraction efficiency may increase due to diffused reflection of light from the surface of the substrate 140, thereby improving the light extraction efficiency of the nitride-based semiconductor light-emitting device 300. In some embodiments, after the nitride-based semiconductor light-emitting device 300 is formed, the substrate 140 and a buffer layer 150 may be removed, and a concavo-convex pattern (not shown) may then be formed on at least a portion of an exposed surface of an n-type nitride-based semiconductor layer 110, thereby increasing light extraction efficiency.
In the nitride-based semiconductor light-emitting device 300, light emitted from the active layer 120 has no directionality. The light emitted from the active layer 120 toward the p electrode 160 may be reflected from the p electrode 160 and may then be extracted through the substrate 140. The p electrode 160 includes a first portion 160R directly contacting the p-type nitride-based semiconductor layer 130, in which an ohmic contact layer 170 is not disposed between the first portion 160R and the p-type nitride-based semiconductor layer 130, and a second portion 160C contacting the ohmic contact layer 170. Thus, the light emitted toward the p electrode 160 from the active layer 120 is reflected from the p electrode 160 in a path in which the light passes through the ohmic contact layer 170 before or after the light arrives at the p electrode 160 and a path in which the light does not pass through the ohmic contact layer 170 before or after the light arrives at the p electrode 160. Thus, all the light emitted toward the p electrode 160 from the active layer 120 does not pass through the ohmic contact layer 170, and light reflected directly from the first portion 160R without passing through the ohmic contact layer 170 may be extracted in a direction of the substrate 140. As described above, the larger the area of the first portion 160R, the more the amount of the light reflected directly from the first portion 160R without passing through the ohmic contact layer 170.
A portion of the light passing through the ohmic contact layer 170 may be absorbed by the ohmic contact layer 170. For example, when the ohmic contact layer 170 is formed of p-GaN having a thickness of about 100 to 200 nm, about 80% of the light passing through the ohmic contact layer 170 or more may be absorbed by the ohmic contact layer 170. When light generated in the active layer 120 passes through the ohmic contact layer 170, arrives at the p electrode 160, is reflected from the p electrode 160, and then passes through the ohmic contact layer 170 again, the light extraction efficiency may be lowered by about 10% or less. However, in the nitride-based semiconductor light-emitting device 300 according to an embodiment of the disclosure, at least a portion of light generated in the active layer 120 does not pass through the ohmic contact layer 170 until the light is reflected from the first portion 160R of the p-type nitride-based semiconductor layer 130 and is then extracted through the substrate 140. Thus, an optical loss caused when the light is absorbed by the ohmic contact layer 170 may be reduced, thereby increasing the light extraction efficiency.
Referring to
The details of the p electrode 460 are substantially the same as those of the p electrode 160 described above with reference to
In a process of forming the nitride-based semiconductor light-emitting device 400 according to an embodiment of the disclosure illustrated in
In the nitride-based semiconductor light-emitting device 400, light generated in the active layer 120 may be emitted without having directionality, and light emitted toward the p electrode 460 may be reflected from the p electrode 460 and be then discharged to the outside via the n-type nitride-based semiconductor layer 110. The p electrode 460 includes a first portion 460R directly contacting the p-type nitride-based semiconductor layer 130, in which the ohmic contact layer 170 is not disposed between the p electrode 460 and the p-type nitride-based semiconductor layer 130, and a second portion 460C contacting the ohmic contact layer 170. Thus, at least a part of the light generated in the active layer 120 does not pass through the ohmic contact layer 170 until the light is reflected from the first portion 460R of the p electrode 460 and is then extracted in a direction of the n-type nitride-based semiconductor layer 110. Accordingly, an optical loss caused when the light is absorbed by the ohmic contact layer 170 may be reduced, thereby improving light extraction efficiency.
Here, the light-emitting device 510 may include the nitride-based semiconductor light-emitting device 100 of
The first electrode 516A and the second electrode 516B may be separated from each other to not only apply a voltage to the light-emitting device 510 but also radiate heat generated from the light-emitting device 510. A first bonding layer 520A is disposed between the light-emitting device 510 and the first electrode 516A, and a second bonding layer 520B is disposed between the light-emitting device 510 and the second electrode 516B. Each of the first bonding layer 520A and the second bonding layer 520B may be formed of Au, In, Pb, Sn, Cu, Ag, a combination thereof, or an alloy thereof. In some embodiments, the light-emitting device 510 may be adhered onto the first electrode 516A and the second electrode 516B via a conductive adhesive, instead of the first bonding layer 520A and the second bonding layer 520B.
A reflective layer 530A and a reflective layer 530B are respectively coated on upper surfaces of the first electrode 516A and the second electrode 516B to reflect light generated in the light-emitting device 510 to be emitted toward an upper portion of the light-emitting device 510. In some embodiments, the reflective layers 530A and 530B may be each formed of Ag or Al.
The first electrode 516A and the second electrode 516B are supported by a package housing 540. The package housing 540 may be formed of a material that is stable at high temperatures or a heat resistant insulating material such as ceramic. A portion of the package housing 540 disposed between the first electrode 516A and the second electrode 516B electrically insulates the first electrode 516a and the second electrode 516b from each other.
The light-emitting device 510 is encapsulated with a lens 560. In some embodiments, the lens 560 is used to concentrate light generated in the light-emitting device 510, and may be formed of sapphire, silica, or calcium fluoride. The lens 560 may be adhered on the substrate 140 of the nitride-based semiconductor light-emitting device 100 by PMMA. In some embodiments, a lens-type fluorescent layer (not shown) may be disposed instead of the lens 560.
The light source system 620 provides light to be irradiated on the object that is to be optically processed, via the light guide 612. The light source system 620 includes at least one among the nitride-based semiconductor light-emitting devices 100, 200, 300, and 400 described above with reference to
The camera system 610 is connected to the data process and analysis system 630 via a cable 614. An image signal output from the camera system 610 may be transmitted to the data process and analysis system 630 via the cable 614. The data process and analysis system 630 includes a controller 632 and a monitor 634. The data process and analysis system 630 may process, analyze, and store the image signal received from the camera system 610.
The light process system 600 of
Evaluation Example
To manufacture a UV LED, a series of operations were performed by MOCVD, as follows: First, an MN buffer layer was grown to a thickness of about 400 nm on a C-plane sapphire substrate within a MOCVD reaction chamber maintained at about 1200° C. under a pressure of about 5 KPa, and a Si-doped n-AlGaN layer (Al composition rate: 55 at %) was grown to a thickness of about 2 μm on the AlN buffer layer while maintaining the temperature and pressure. Then, an active layer, including an AlGaN layer (Al composition rate: 40 at %) and an AlGaN layer (Al composition rate: 55 at %), was grown. Then, a Mg-doped p-AlGaN layer (Al composition rate: 55 at %) having a thickness of about 30 nm was grown on the active layer.
Then, a p-GaN layer was formed on the p-AlGaN layer by MOCVD under various process conditions. In this case, trimethyl gallium (TMGa) was used as a Ga source, ammonia (NH3) was used as an N source, and bis(cyclopentadienyl)magnesium (Cp2Mg) was used as a dopant source. Also, H2 gas was used as a carrier gas. Here, the N source gas and the Ga source gas were continuously supplied during a deposition process of forming the p-GaN layer.
Referring to
An area ratio of the plurality of p-GaN layers 720 covering the p-AlGaN layer 710 may be controlled by adjusting a time of growing the plurality of p-GaN layers 720 under process conditions for obtaining the result of
Referring to
When a p-GaN was formed by growing the p-GaN layer on a p-AlGaN layer under the process conditions applied to evaluation of the result of
TABLE 1
Coverage (%)
0
7
16
29
40
57
70
82
100
Light
30
25
20
15
12
10
7
5
3
extraction
efficiency (%)
Device
0
1.8
3.2
4.4
4.8
5.7
4.9
4.1
2.9
efficiency (%)
Table 1 shows that the device efficiencies when the p-GaN layer covers about 16 to 82% of an upper surface of the p-AlGaN layer were higher than when the p-GaN layer entirely covers an upper surface of the p-AlGaN layer (when coverage=100%).
While the disclosure has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood that various changes in form and details may be made therein without departing from the spirit and scope of the following claims.
Sone, Cheol-soo, Hwang, Kyung-wook, Kim, Jung-sub, Lee, Jin-sub
Patent | Priority | Assignee | Title |
Patent | Priority | Assignee | Title |
6258618, | Sep 11 1998 | Lumileds LLC | Light emitting device having a finely-patterned reflective contact |
6998649, | Sep 29 2003 | EPISTAR CORPORATION | Semiconductor light-emitting device |
7057212, | Jan 19 2004 | SAMSUNG ELECTRONICS CO , LTD | Flip chip nitride semiconductor light emitting diode |
7138665, | Jun 30 2000 | SAMSUNG ELECTRONICS CO , LTD | Light emitting element, method of manufacturing the same, and semiconductor device having light emitting element |
7279718, | Jan 28 2002 | AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED | LED including photonic crystal structure |
7485897, | Mar 12 2004 | SAMSUNG ELECTRONICS CO , LTD | Nitride-based light-emitting device having grid cell layer |
7893451, | May 08 2006 | SUZHOU LEKIN SEMICONDUCTOR CO , LTD | Light emitting device having light extraction structure and method for manufacturing the same |
8101964, | Mar 25 2008 | Kabushiki Kaisha Toshiba | Semiconductor light-emitting element and process for production thereof |
8476670, | Aug 26 2009 | Samsung Electronics Co., Ltd. | Light emitting devices and methods of manufacturing the same |
8592954, | Jun 29 2010 | Nichia Corporation | Semiconductor element and method of manufacturing the semiconductor element |
8835954, | Mar 08 2011 | Kabushiki Kaisha Toshiba | Semiconductor light emitting device and method for manufacturing the same |
20020063256, | |||
20030141507, | |||
20050051786, | |||
20050156185, | |||
20050184305, | |||
20060049417, | |||
20070155032, | |||
20090079322, | |||
20090212278, | |||
20090242925, | |||
20090261372, | |||
JP2004006970, | |||
KR100619415, | |||
KR101103639, | |||
KR20050091579, |
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