A method and apparatus for simultaneously removing conductive materials from a microelectronic substrate. A method in accordance with one embodiment of the invention includes contacting a surface of a microelectronic substrate with an electrolytic liquid, the microelectronic substrate having first and second different conductive materials. The method can further include controlling a difference between a first open circuit potential of the first conducive material and a second open circuit potential of the second conductive material by selecting a ph of the electrolytic liquid. The method can further include simultaneously removing at least portions of the first and second conductive materials by passing a varying electrical signal through the electrolytic liquid and the conductive materials. Accordingly, the effects of galvanic interactions between the two conductive materials can be reduced and/or eliminated.

Patent
   9214359
Priority
Aug 29 2002
Filed
May 19 2014
Issued
Dec 15 2015
Expiry
Aug 29 2022
Assg.orig
Entity
Large
2
187
EXPIRED<2yrs
9. A method for processing a microelectronic substrate, the method comprising:
providing a microelectronic substrate including a first conductive material and a second conductive material different than the first conductive material;
disposing on the microelectronic substrate an electrolytic liquid having a ph selected at least partially based on an absolute value of a difference between a first open circuit potential of the first conductive material at the ph and a second open circuit potential of the second conductive material at the ph; and
simultaneously removing at least portions of the first and second conductive materials from the microelectronic substrate while passing electrical current through the electrolytic liquid and the first and second conductive materials and while the electrolytic liquid is in contact with the microelectronic substrate.
1. A method for processing a microelectronic substrate, the method comprising:
selecting a ph based at least partially on an absolute value of a difference between a first open circuit potential of a second conductive material at the ph and a second open circuit potential of a second conductive material at the ph, wherein the second conductive material is different than the first conductive material;
contacting a surface of a microelectronic substrate with an electrolytic liquid having the selected ph, wherein the microelectronic substrate includes the first and second conductive materials; and
simultaneously removing at least portions of the first and second conductive materials from the microelectronic substrate while passing electrical current through the electrolytic liquid and the first and second conductive materials and while the electrolytic liquid is in contact with the microelectronic substrate.
2. The method of claim 1 wherein:
the first conductive material includes tungsten; and
the second conductive material includes copper.
3. The method of claim 1 wherein passing the electrical current includes passing the electrical current:
from a first electrode spaced apart from the microelectronic substrate, through the electrolytic liquid to the microelectronic substrate; and
from the microelectronic substrate, through the electrolytic liquid to a second electrode spaced apart from the first electrode and spaced apart from the microelectronic substrate.
4. The method of claim 1 wherein passing the electrical current includes passing the electrical current:
from a first electrode spaced apart from the microelectronic substrate, through the electrolytic liquid to the microelectronic substrate; and
from the microelectronic substrate to a second electrode spaced apart from the first electrode and in contact with the microelectronic substrate.
5. The method of claim 1 wherein the first and second conductive materials are adjacent to one another within the microelectronic substrate.
6. The method of claim 1 wherein:
the first conductive material of the microelectronic substrate is a barrier layer material; and
the second conductive material of the microelectronic substrate is a blanket fill material.
7. The method of claim 1 wherein simultaneously removing at least portions of the first and second conductive materials from the microelectronic substrate includes simultaneously removing at least portions of the first and second conductive materials from the microelectronic substrate while increasing a resistance of the electrolytic liquid.
8. The method of claim 1 wherein passing the electrical current through the electrolytic liquid and the first and second conductive materials includes passing a varying electrical signal through the electrolytic liquid and the first and second conductive materials.
10. The method of claim 9 wherein:
the first conductive material includes tungsten; and
the second conductive material includes copper.
11. The method of claim 10 wherein the ph is within a range from 2 to 5.
12. The method of claim 9 wherein:
the first conductive material of the microelectronic substrate is a barrier layer materials; and
the second conductive material of the microelectronic substrate is a blanket fill material.
13. The method of claim 9 wherein simultaneously removing at least portions of the first and second conductive materials from the microelectronic substrate includes simultaneously removing at least portions of the first and second conductive materials from the microelectronic substrate while contacting the microelectronic substrate with a polishing pad and moving at least one of the polishing pad and the microelectronic substrate relative to the other.
14. The method of claim 1 wherein simultaneously removing at least portions of the first and second conductive materials from the microelectronic substrate includes simultaneously removing at least portions of the first and second conductive materials from the microelectronic substrate while contacting the microelectronic substrate with a polishing pad and moving at least one of the polishing pad and the microelectronic substrate relative to the other.
15. The method of claim 2 wherein selecting the ph includes selecting the ph such that the absolute value of the difference between the first and second open circuit potentials at the ph is not more than 0.25 volts.
16. The method of claim 2 wherein selecting the ph includes selecting the ph such that the absolute value of the difference between the first and second open circuit potentials at the ph is not more than 0.15 volts.
17. The method of claim 9 wherein simultaneously removing at least portions of the first and second conductive materials from the microelectronic substrate includes simultaneously removing at least portions of the first and second conductive materials from the microelectronic substrate while increasing a resistance of the electrolytic liquid.
18. The method of claim 9 wherein the first and second conductive materials are adjacent to one another within the microelectronic substrate.
19. The method of claim 11 wherein the ph is selected at least partially based on the absolute value of the difference between the first and second open circuit potentials at the ph being not more than 0.25 volts.
20. The method of claim 11 wherein the ph is selected at least partially based on the absolute value of the difference between the first and second open circuit potentials at the ph being not more than 0.15 volts.

This application is a continuation of U.S. application Ser. No. 11/844,459, now abandoned, which is a continuation of U.S. application Ser. No. 10/923,359 filed Aug. 20, 2004, now abandoned, which is a divisional of U.S. application Ser. No. 10/230,602 filed Aug. 29, 2002, now U.S. Pat. No. 7,129,160 issued Oct. 31, 2006, each of which is incorporated herein by reference in their entirety.

This application is related to the following U.S. patent applications, all of which are incorporated herein by reference: Ser. No. 09/651 779 filed Aug. 30, 2000 now U.S. Pat. No. 7,074,113 issued Jul. 11, 2006; Ser. No. 09/651,808 filed Aug. 30, 2000, now U.S. Pat. No. 6,602,117 issued Aug. 5, 2003; Ser. No. 09/653,392 filed Aug. 31, 2000, now U.S. Pat. No. 6,551,935 issued Apr. 22, 2003; Ser. No. 09/888,084 filed Jun. 21,2001, now U.S. Pat. No. 7,112,121 issued Sep. 26, 2006; Ser. No. 09/887,767 filed Jun. 21, 2001, now U.S. Pat. No. 7,094,131 issued Aug. 22, 2006; and Ser. No. 09/888,002 filed Jun. 21, 2001, now U.S. Pat. No. 7,160,176 issued Jan. 9, 2007. Also incorporated herein by reference are the following U.S. patent applications Ser. No.: 10/230,970 filed Aug. 29, 2002, now U.S. Pat. No. 7,220,166 issued May, 22, 2007; application Ser. No. 10/230,972 filed Aug. 29, 2002, now U.S. Pat. No. 7,134,934 issued Nov. 14, 2006; application Ser. No. 10/230,973 filed Aug. 29, 2002, now U.S. Pat. No. 7,153,195 issued Dec. 26, 2006; applicaton Ser. No. 10/230,463 filed Aug. 29, 2002, now U.S. Pat. No. 7,192.335 issued Mar. 20, 2007; and Pat. No. 10/230,628 filed Aug. 29, 2002 now U.S. Pat. No. 7,078,308 issued Jul. 18, 2006.

The present disclosure is directed toward methods and apparatuses for simultaneously removing multiple conductive materials from microelectronic substrates.

Microelectronic substrates and substrate assemblies typically include a semiconductor material having features, such as memory cells, that are linked with conductive lines. The conductive lines can be formed by first forming trenches or other recesses in the semiconductor material and then overlaying a conductive material (such as a metal) in the trenches. The conductive material is then selectively removed to leave conductive lines or vias extending from one feature in the semiconductor material to another.

FIG. 1 is a partially schematic illustration of a portion of a microelectronic substrate 10 having a conductive line formed in accordance with the prior art. The microelectronic substrate 10 includes an aperture or recess 16 in an oxide material 13. A barrier layer 14, formed from materials such as tantalum or tantalum compounds, is disposed on the microelectronic substrate 10 and in the aperture 16. A conductive material 15, such as copper, is then disposed on the barrier layer 14. The barrier layer 14 can prevent copper atoms from migrating into the surrounding oxide 13.

In a typical existing process, two separate chemical-mechanical planarization (CMP) steps are used to remove the excess portions of the conductive material 15 and the barrier layer 14 from the microelectronic substrate 10. In one step, a first slurry and polishing pad are used to remove the conductive material 15 overlying the barrier layer 14 external to the aperture 16, thus exposing the barrier layer 14. In a separate step, a second slurry and a second polishing pad are then used to remove the barrier layer 14 (and the remaining conductive material 15) external to the aperture 16. The resulting conductive line 8 includes the conductive material 15 surrounded by a lining formed by the barrier layer 14.

One drawback with the foregoing process is that high downforces are typically required to remove copper and tantalum from the microelectronic substrate 10. High downforces can cause other portions of the microelectronic substrate 10 to become dished or eroded, and/or can smear structures in other parts of the microelectronic substrate 10. A further drawback is that high downforces typically are not compatible with soft substrate materials. However, it is often desirable to use soft materials, such as ultra low dielectric materials, around the conductive features to reduce and/or eliminate electrical coupling between these features.

The present invention is directed toward methods and apparatuses for simultaneously removing multiple conductive materials from a microelectronic substrate. A method in accordance with one aspect of the invention includes contacting a surface of a microelectronic substrate with an electrolytic liquid, the microelectronic substrate having a first conductive material and a second conductive material different than the first. The method can still further include controlling an absolute value of a difference between a first open circuit potential of the first conductive material and a second open circuit potential of the second conductive material by selecting a pH of the electrolytic liquid. The method can further include simultaneously removing at least portions of the first and second conductive materials by passing a varying electrical signal through the electrolytic liquid and the conductive materials while the electrolytic liquid contacts the microelectronic substrate.

In a further aspect of the invention, wherein the first conductive material includes tungsten and the second conductive material includes copper, the method can include controlling an absolute value of a difference between the first open circuit potential and the second open circuit potential to be about 0.50 volts or less by selecting the pH of the electrolytic liquid to be from about 2 to about 5. The conductive materials can be removed simultaneously by passing an electrical signal from a first electrode spaced apart from the microelectronic substrate, through the electrolytic liquid to the first and second conductive materials and from the first and second conductive materials through the electrolytic liquid to a second electrode spaced apart from the first electrode and spaced apart from the microelectronic substrate.

A method in accordance with another aspect of the invention includes providing a microelectronic substrate having a first conductive material and a second conductive material different than the first. The method can further include disposing on the microelectronic substrate an electrolytic liquid having a pH that controls a difference between a first open circuit potential of the first conductive material and a second open circuit potential on the second conductive material. The method can further include simultaneously removing at least portions of the first and second conductive materials by passing a variable electrical signal through the electrolytic liquid and the conductive materials while the electrolytic liquid contacts the microelectronic substrate.

An electrolytic liquid in accordance with another embodiment of the invention can include a liquid carrier and an electrolyte disposed in the liquid carrier. The electrolyte can be configured to transmit electrical signals from an electrode to the first and second conductive materials of the microelectronic substrate. A pH of the electrolytic liquid can be from about 2 to about 5.

FIG. 1 is a partially schematic, cross-sectional view of a portion of a microelectronic substrate having multiple conductive materials processed in accordance with the prior art.

FIGS. 2A-2C are partially schematic, cross-sectional illustrations of a portion of a microelectronic substrate having multiple conductive materials processed in accordance with an embodiment of the invention.

FIG. 3 is a partially schematic, cross-sectional view of a portion of a microelectronic substrate having multiple conductive materials processed in accordance with another embodiment of the invention.

FIG. 4 is a partially schematic illustration of an apparatus for electrolytically removing conductive materials from a microelectronic substrate in accordance with an embodiment of the invention.

FIG. 5 is a partially schematic illustration of an apparatus for electrolytically removing conductive materials from a microelectronic substrate in accordance with another embodiment of the invention.

FIG. 6 is a partially schematic illustration of an apparatus for electrolytically, chemically-mechanically and/or electrochemically-mechanically removing conductive material from a microelectronic substrate in accordance with still another embodiment of the invention.

FIG. 7 is a partially schematic, isometric view of a portion of an embodiment of the apparatus shown in FIG. 6.

FIG. 8 is a partially schematic, isometric illustration of a portion of an apparatus for removing conductive material from a microelectronic substrate in accordance with yet another embodiment of the invention.

FIG. 9 is a schematic illustration of a waveform for electrolytically processing a microelectronic substrate in accordance with still another embodiment of the invention.

The present disclosure describes methods and apparatuses for removing conductive materials from a microelectronic substrate. The term “microelectronic substrate” is used throughout to include a substrate upon which and/or in which microelectronic circuits or components, data storage elements or layers, and/or micro-mechanical elements are fabricated. Features in the substrate can include submicron features (having submicron dimensions ranging from, for example, 0.1 micron to 0.75 micron) such as trenches, vias, lines and holes. It will be appreciated that several of the details set forth below are provided to describe the following embodiments in a manner sufficient to enable a person skilled in the relevant art to make and use the disclosed embodiments. Several of the details and advantages described below, however, may not be necessary to practice certain embodiments of the invention. Additionally, the invention can include other embodiments that are within the scope of the claims but are not described in detail with respect to FIG. 2A-9.

One approach for addressing some of the drawbacks described above with reference to FIG. 1 is to remove conductive materials from the microelectronic substrate with electrolytic processes. Accordingly, a voltage is applied to the conductive material in the presence of an electrolytic liquid to remove the conductive material. However, many existing electrolytic liquids cannot simultaneously remove copper and tantalum, once the tantalum barrier layer has been exposed. Accordingly, chemical-mechanical planarization (CMP) techniques are typically used to remove the exposed tantalum barrier layer and the adjacent copper material. However, this approach typically re-introduces the high downforces that the initial electrolytic process was intended to avoid. Accordingly, another approach has been to replace the tantalum barrier layer with a tungsten barrier layer. However, tungsten (and tungsten compounds) typically form a galvanic couple with copper, which results in one or the other of these materials corroding and dissolving at an uncontrolled rate. The following disclosure describes methods and apparatuses for overcoming this drawback.

FIG. 2A is a partially schematic, cross-sectional side view of a microelectronic substrate 210 prior to electrolytic processing in accordance with an embodiment of the invention. In one aspect of this embodiment, the microelectronic substrate 210 includes a substrate material 213, such as an oxide or a low dielectric constant material. The substrate material 213 includes a substrate material surface 217 having an aperture 216 formed by conventional processes, such as selective etch processes. A first conductive material 218 is disposed on the substrate material 213 and can form a barrier layer 214 along the walls of the aperture 216. A second conductive material 209, such as a blanket fill material, can be disposed on the first conductive material 218 to form a fill layer 219. In one embodiment, the first conductive material 218 can include tungsten (W) or a tungsten compound, such as tungsten nitride (WNx), and the second conductive material 209 can include copper or copper alloys such as alloys that include at least 50% copper. In other embodiments, these conductive materials can include other elements or compounds. In any of these embodiments, the first conductive material 218 and the second conductive material 209 can collectively define a conductive portion 211 of the microelectronic substrate 210.

To form an isolated conductive line within the aperture 216, the first conductive material 218 and second conductive material 219 external to the aperture 216 are typically removed. In one embodiment, the second conductive material 209 is removed using a CMP process. In other embodiments, an electrochemical-mechanical polishing (ECMP) process or an electrolytic process is used to remove the second conductive material 209. An advantage of electrolytic and ECMP processes is that the downforce applied to the microelectronic substrate 210 during processing can be reduced or eliminated. Apparatuses for performing these processes are described in greater detail below with reference to FIGS. 4-9. In any of these embodiments, the result after completing this portion of the process is a microelectronic substrate 210 having the second conductive material 209 external to the aperture 216 and external to the barrier layer 214 removed, as is shown in FIG. 2B.

Referring now to FIG. 2B, a process in accordance with one embodiment of the invention includes simultaneously, electrolytically removing the portions of the second conductive material 209 and the first conductive material 218 that extend beyond the substrate material surface 217 after the initial removal process described above with reference to FIG. 2A. Accordingly, in one aspect of this embodiment, an electrolytic liquid 231 can be disposed on the microelectronic substrate 210 and a pair of electrodes 220 (shown as a first electrode 220a and a second electrode 220b) can be positioned in electrical communication with the electrolytic liquid 231. The electrodes 220 can be coupled to a variable signal transmitter 221 (such as a variable current source) to provide a varying electrical signal to both the first conductive material 218 and the second conductive material 209. These conductive materials can be simultaneously removed via an electrolytic process

In a further aspect of this embodiment, the pH of the electrolytic liquid 231 is selected to control the difference between the open circuit potential of the first conductive material 218 and the open circuit potential of the second conductive material 209. As used herein, the difference in open circuit potentials between the first conductive material 218 and the second conductive material 209 refers to the difference in electrical potential that would result when measuring the voltage difference between the first conductive material 218 and the second conductive material 209 in the presence of the electrolytic liquid 231, but in the absence of any current applied by the signal transmitter 221. In a particular aspect of this embodiment, for example, when the first conductive material 218 includes tungsten and the second conductive material 209 includes copper, the pH of the electrolytic liquid 231 can be selected to be from about 2 to about 5 to produce a difference in open circuit potential of from about 0.50 volts to about −0.50 volts. In other words, the absolute value of the difference in open circuit potential can be about 0.50 volts or less. In other embodiments, the absolute value of the difference in open circuit potential can be about 0.25 volts or less, for example, 0.15 volts or less. In still further embodiments, the pH of the electrolytic liquid 231 can have other values to produce near-zero open circuit potential differentials for other combinations of first conductive materials 218 and second conductive materials 209. For example, in one embodiment, the electrolytic liquid 231 can have a pH of from about 0 to about 7.

In any of the foregoing embodiments, the first and second conductive materials 218, 209 can be removed simultaneously without necessarily being removed at the same rates. For example, in one embodiment for which the first conductive material 218 includes tungsten or a tungsten compound and the second conductive material 209 includes copper, the copper can be removed at about four times the rate at which the tungsten or tungsten compound is removed. In other embodiments, the first and second conductive materials 218, 209 can be removed at rates that vary by greater or lesser amounts.

In one embodiment, the pH of the electrolytic liquid 231 can be controlled by disposing an acid in the electrolytic liquid 231. Accordingly, the electrolytic liquid 231 can include a liquid carrier (such as deionized water) and an acid such as nitric acid, acetic acid, hydrochloric acid, sulfuric acid, or phosphoric acid. In other embodiments, the electrolytic liquid 231 can include other acids. In addition to reducing the pH of the electrolytic liquid 231, the acid can provide ions to enhance the electrolytic action of the electrolytic liquid 231. In any of these embodiments, the electrolytic liquid 231 can also optionally include an inhibitor, such as benzotriazole (BTA) to produce more uniform material removal. The electrolytic liquid 231 can also include oxidizers, such as hydroxylamine, peroxide or ammonium persulfate. In another embodiment, the oxidizers can be eliminated, for example, when the electrolytic action provided by the electrodes 220 is sufficient to oxidize the conductive materials 218 and 209.

In any of the foregoing embodiments, the first conductive material 218 and the second conductive material 209 external to the recess 216 can be removed, producing a microelectronic substrate 210 having an embedded conductive structure 208, as shown in FIG. 2C. In one embodiment, the conductive structure 208 can include a conductive line and in other embodiments, conductive structure 208 can include a via or other feature in the microelectronic substrate 210. In any of these embodiments, the foregoing processes can provide a conductive structure 208 having a smooth external surface 207 that includes smooth external surface portions for both the first conductive material 218 and the second conductive material 209.

One feature of an embodiment of the method described above with reference to FIGS. 2A-2C is that the pH of the electrolytic liquid 231 can be selected to reduce or eliminate the open circuit potential differential between the first conductive material 218 and the second conductive material 209. An advantage of this feature is that the likelihood for a galvanic reaction, which can preferentially pit, dissolve, or otherwise remove one of the conductive materials more readily than the other, can be reduced and/or eliminated. Accordingly, the resulting external surface 207 that includes the first conductive material 218 and the second conductive material 209 can be clean and uniform, as shown in FIG. 2C. Another advantage of this feature is that the first conductive material 218 and the second conductive material 209 can be removed simultaneously without requiring high downforces which can damage structures and features of the microelectronic substrate 210.

In the embodiments described above with reference to FIGS. 2A-2C, the first and second electrodes 220a, 220b are spaced apart from the microelectronic substrate 210 as they remove conductive materials from the microelectronic substrate 210. An advantage of this arrangement is that the conductive material removal process can be relatively uniform. In other embodiments, one or more of the electrodes can be positioned in direct contact with the microelectronic substrate 210. For example, as shown in FIG. 3, a first electrode 320a can be positioned in a spaced apart orientation relative to the microelectronic substrate 210, and a second electrode 320b can be connected to a rear surface of the microelectronic substrate 210. A conductive path 308 (such as an internal via) between the rear surface and the conductive portion 211 of the microelectronic substrate can complete the circuit between the electrodes 320a, 320b, allowing the signal transmitter 221 to remove conductive material in a manner generally similar to that described above. In still another embodiment, the second electrode 320b can be connected directly to the microelectronic substrate 210. Such arrangements can be used when material removal nonuniformities which may result from the direct contact between the electrode and the microelectronic substrate are remote from regions that might be adversely affected by such nonuniformities.

FIGS. 4-9 illustrate apparatuses for electrolytically, chemically-mechanically, and/or electrochemically-mechanically removing material from microelectronic substrates to perform the processes described above with reference to FIGS. 2A-3. Beginning with FIG. 4, an apparatus 460 can electrolytically remove conductive material from the microelectronic substrate 210 in accordance with an embodiment of the invention. In one aspect of this embodiment, the apparatus 460 includes liquid support, such as a vessel 430 containing an electrolytic liquid or gel 431. A support member 440 supports the microelectronic substrate 210 relative to the vessel 430 so that the conductive portion 211 of the microelectronic substrate 210 contacts the electrolytic liquid 431. In another aspect of this embodiment, the support member 440 can be coupled to a substrate drive unit 441 that moves the support member 440 and the substrate 210 relative to the vessel 430. For example, the substrate drive unit 441 can translate the support member 440 (as indicated by arrow “A”) and/or rotate the support member 440 (as indicated by arrow “B”).

The apparatus 460 can further include a first electrode 420a and a second electrode 420b (referred to collectively as electrodes 420) supported relative to the microelectronic substrate 210 by a support arm 424. In one aspect of this embodiment, the support arm 424 is coupled to an electrode drive unit 423 for moving the electrodes 420 relative to the microelectronic substrate 210. For example, the electrode drive unit 423 can move the electrodes 420 toward and away from the conductive portion 211 of the microelectronic substrate 210, (as indicated by arrow “C”), and/or transversely (as indicated by arrow “D”) in a plane generally parallel to the conductive portion 211. In other embodiments, the electrode drive unit 423 can move the electrodes 420 in other fashions, or the electrode drive unit 423 can be eliminated when the substrate drive unit 441 provides sufficient relative motion between the substrate 210 and the electrodes 420.

In either embodiment described above with reference to FIG. 4, the electrodes 420 can be coupled to a signal transmitter 421 with leads 428 for supplying electrical current to the electrolytic liquid 431 and the conductive portion 211. In operation, the signal transmitter 421 can supply an alternating current (signal phase or multi-phase) to the electrodes 420. The current passes through the electrolytic liquid 431 and reacts electrochemically with the conductive portion 211 to remove material (for example, atoms or groups of atoms) from the conductive portion 211. The electrodes 420 and/or the microelectronic substrate 210 can be moved relative to each other to remove material from select regions of the conductive portion 211, or from the entire conductive portion 211.

In one aspect of an embodiment of the apparatus 460 shown in FIG. 4, a distance D1 between the electrodes 420 and the conductive portion 211 is set to be smaller than a distance D2 between the first electrode 420a and the second electrode 420b. Furthermore, the electrolytic liquid 431 generally has a higher resistance than the conductive portion 211. Accordingly, the alternating current follows the path of least resistance from the first electrode 420a, through the electrolytic liquid 431 to the conductive portion 211 and back through the electrolytic liquid 431 to the second electrode 420b, rather than from the first electrode 420a directly through the electrolytic liquid 431 to the second electrode 420b. In one aspect of this embodiment, the resistance of the electrolytic liquid 431 can be increased as the thickness of the conductive portion 211 decreases (and the resistance of the conductive portion 211 increases) to maintain the current path described above. In another embodiment, a low dielectric material (not shown) can be positioned between the first electrode 420a and the second electrode 420b to decouple direct electrical communication between the electrodes 420 that does not first pass through the conductive portion 211.

FIG. 5 is a partially schematic, side elevation view of an apparatus 560 that includes a support member 540 positioned to support the microelectronic substrate 210 in accordance with another embodiment of the invention. In one aspect of this embodiment, the support member 540 supports the microelectronic substrate 210 with the conductive portion 211 facing upwardly. A substrate drive unit 541 can move the support member 540 and the microelectronic substrate 210, as described above with reference to FIG. 4. Electrodes 520, including first and second electrodes 520a and 520b, are positioned above the conductive portion 211 and are coupled to a current source 521. A support arm 524 supports the electrodes 520 relative to the substrate 210 and is coupled to an electrode drive unit 523 to move the electrodes 520 over the surface of the conductive portion 211 in a manner generally similar to that described above with reference to FIG. 4.

In one aspect of the embodiment shown in FIG. 5, the apparatus 560 further includes an electrolyte vessel 530 having a supply conduit 537 with an aperture 538 positioned proximate to the electrodes 520. Accordingly, an electrolytic liquid 531 can be deposited locally in an interface region 539 between the electrodes 520 and the conductive portion 211, without necessarily covering the entire conductive portion 211. The electrolytic liquid 531 and the conductive material removed from the conductive portion 211 flow over the substrate 210 and collect in an electrolyte receptacle 532. The mixture of electrolytic liquid 531 and conductive material can flow to a reclaimer 533 that removes most of the conductive material from the electrolytic liquid 531. A filter 534 positioned downstream of the reclaimer 533 provides additional filtration of the electrolytic liquid 531, and a pump 535 returns the reconditioned electrolytic liquid 531 to the electrolyte vessel 530 via a return line 536.

In another aspect of an embodiment shown in FIG. 5, the apparatus 560 can include a sensor assembly 550 having a sensor 551 positioned proximate to the conductive portion 211, and a sensor control unit 552 coupled to the sensor 551 for processing signals generated by the sensor 551. The control unit 552 can also move the sensor 551 relative to the microelectronic substrate 210. In a further aspect of this embodiment, the sensor assembly 550 can be coupled via a feedback path 553 to the electrode drive unit 523 and/or the substrate drive unit 541. Accordingly, the sensor 551 can determine which areas of the conductive portion 211 require additional material removal and can move the electrodes 520 and/or the microelectronic substrate 210 relative to each other to position the electrodes 520 over those areas. Alternatively, (for example, when the removal process is highly repeatable), the electrodes 520 and/or the microelectronic substrate 210 can move relative to each other according to a pre-determined motion schedule.

FIG. 6 schematically illustrates an apparatus 660 for electrolytically, chemically-mechanically and/or electrochemically-mechanically polishing the microelectronic substrate 210 in accordance with an embodiment of the invention. In one aspect of this embodiment, the apparatus 660 has a support table 680 with a top-panel 681 at a workstation where an operative portion “W” of a polishing pad 683 is positioned. The top-panel 681 is generally a rigid plate to provide a flat, solid surface to which a particular section of the polishing pad 683 may be secured during polishing.

The apparatus 660 can also have a plurality of rollers to guide, position and hold the polishing pad 683 over the top-panel 681. The rollers can include a supply roller 687, first and second idler rollers 684a and 684b, first and second guide rollers 685a and 685b, and a take-up roller 686. The supply roller 687 carries an unused or preoperative portion of the polishing pad 683, and the take-up roller 686 carries a used or postoperative portion of the polishing pad 683. Additionally, the first idler roller 684a and the first guide roller 685a can stretch the polishing pad 683 over the top-panel 681 to hold the polishing pad 683 stationary during operation. A motor (not shown) drives at least one of the supply roller 687 and the take-up roller 686 to sequentially advance the polishing pad 683 across the top-panel 681. Accordingly, clean preoperative sections of the polishing pad 683 may be quickly substituted for used sections to provide a consistent surface for polishing and/or cleaning the microelectronic substrate 210.

The apparatus 660 can also have a carrier assembly 690 that controls and protects the microelectronic substrate 210 during polishing. The carrier assembly 690 can include a substrate holder 692 to pick up, hold and release the microelectronic substrate 210 at appropriate stages of the polishing process. The carrier assembly 690 can also have a support gantry 694 carrying a drive assembly 695 that can translate along the gantry 694. The drive assembly 695 can have an actuator 696, a drive shaft 697 coupled to the actuator 696, and an arm 698 projecting from the drive shaft 697. The arm 698 carries the substrate holder 692 via a terminal shaft 699 such that the drive assembly 695 orbits the substrate holder 692 about an axis E-E (as indicated by arrow “R1”). The terminal shaft 699 may also rotate the substrate holder 692 about its central axis F-F (as indicated by arrow “R2”).

The polishing pad 683 and a polishing liquid 689 define a polishing medium 682 that electrolytically, chemically-mechanically, and/or electro-chemically-mechanically removes material from the surface of the microelectronic substrate 210. In some embodiments, the polishing pad 683 may be a nonabrasive pad without abrasive particles, and the polishing liquid 689 can be a slurry with abrasive particles and chemicals to remove material from the microelectronic substrate 210. In other embodiments, the polishing pad 683 can be a fixed-abrasive polishing pad in which abrasive particles are fixedly bonded to a suspension medium. To polish the microelectronic substrate 210 with the apparatus 660, the carrier assembly 690 presses the microelectronic substrate 210 against a polishing surface 688 of the polishing pad 683 in the presence of the polishing liquid 689. The drive assembly 695 then orbits the substrate holder 692 about the axis E-E and optionally rotates the substrate holder 692 about the axis F-F to translate the substrate 210 across the polishing surface 688. As a result, the abrasive particles and/or the chemicals in the polishing medium 682 remove material from the surface of the microelectronic substrate 210 in a chemical and/or chemical-mechanical polishing process.

In a further aspect of this embodiment, the polishing liquid 689 can include an electrolyte for electrolytic processing or ECMP processing. In another embodiment, the apparatus 660 can include an electrolyte supply vessel 630 that delivers an electrolyte separately to the polishing surface 688 of the polishing pad 683 with a conduit 637, as described in greater detail below with reference to FIG. 7. In either embodiment, the apparatus 660 can further include a current supply 621 coupled to electrodes positioned proximate to the polishing pad 683. Accordingly, the apparatus 660 can electrolytically remove material from the microelectronic substrate 210.

FIG. 7 is a partially exploded, partially schematic isometric view of a portion of the apparatus 660 described above with reference to FIG. 6. In one aspect of the embodiment shown in FIG. 6, the top-panel 681 houses a plurality of electrode pairs, each of which includes a first electrode 720a and a second electrode 720b. The first electrodes 720a are coupled to a first lead 728a and the second electrodes 720b are coupled to a second lead 728b. The first and second leads 728a and 728b are coupled to the current supply 621 (FIG. 6). In one aspect of this embodiment, the first electrodes 720a can be separated from the second electrodes 720b by an electrode dielectric layer 729a that includes Teflon™ or another suitable dielectric material. The electrode dielectric layer 729a can accordingly control the volume and dielectric constant of the region between the first and second electrodes 720a and 720b to control the electrical coupling between the electrodes.

The electrodes 720a and 720b can be electrically coupled to the microelectronic substrate 210 (FIG. 6) by the polishing pad 683. In one aspect of this embodiment, the polishing pad 683 is saturated with an electrolytic liquid 731 supplied by the supply conduits 637 through apertures 738 in the top-panel 681 just beneath the polishing pad 683. Accordingly, the electrodes 720a and 720b are selected to be compatible with the electrolytic liquid 731. In an another arrangement, the electrolytic liquid 731 can be supplied to the polishing pad 683 from above (for example, by disposing the electrolytic liquid 731 in the polishing liquid 689, rather than by directing the electrolytic liquid upwardly through the polishing pad 683). Accordingly, the apparatus 660 can include a pad dielectric layer 729b positioned between the polishing pad 683 and the electrodes 720a and 720b. When the pad dielectric layer 729b is in place, the electrodes 720a and 720b can be isolated from physical contact with the electrolytic liquid 731 and can accordingly be selected from materials that are not necessarily compatible with the electrolytic liquid 731.

FIG. 8 is an isometric view of a portion of an apparatus 860 having electrodes 820 (shown as a first electrode 820a and a second electrode 820b), and a polishing medium 882 arranged in accordance with another embodiment of the invention. In one aspect of this embodiment, the polishing medium 882 includes polishing pad portions 883 that project beyond the electrodes 820a and 820b. Each polishing pad portion 883 can include a polishing surface 888 and a plurality of flow passages 884 coupled to a fluid source (not shown in FIG. 8) with a conduit 837. Each flow passage 884 can have an aperture 885 proximate to the polishing surface 888 to provide an electrolytic liquid 831 proximate to an interface between the microelectronic substrate 210 and the polishing surface 888. In one aspect of this embodiment, the pad portions 883 can include recesses 887 surrounding each aperture 885. Accordingly, the electrolytic liquid 831 can proceed outwardly from the flow passages 884 while the microelectronic substrate 210 is positioned directly overhead and remains spaced apart from the electrodes 820. In other embodiments, the polishing pad portions 883 can be applied to other electrodes, such as those described above with reference to FIGS. 4 and 5 to provide for mechanical as well as electromechanical material removed.

The foregoing apparatuses described above with reference to FIGS. 4-8 can be used to electrolytically, chemically-mechanically and/or electrochemically-mechanically process the microelectronic substrate 210. When the apparatuses are used to electrolytically or electrochemically-mechanically process the microelectronic substrate 210, they can provide a varying electrical current that passes from the electrodes, through the conductive material of the microelectronic substrate 210 via the electrolytic liquid. For example, as shown in FIG. 9, the apparatus can generate a high-frequency wave 904 and can superimpose a low-frequency wave 902 on the high-frequency wave 904. In one aspect of this embodiment, the high-frequency wave 904 can include a series of positive or negative voltage spikes contained within a square wave envelope defined by the low-frequency wave 902. Each spike of the high-frequency wave 904 can have a relatively steep rise-time slope to transfer charge through the dielectric material to the electrolytic liquid, and a more gradual fall-time slope. The fall-time slope can define a straight line, as indicated by high-frequency wave 904, or a curved line, as indicated by high-frequency wave 904a. In other embodiments, the high-frequency wave 904 and the low-frequency wave 902 can have other shapes depending, for example, on the particular characteristics of the dielectric material and the electrolytic liquid, the characteristics of the microelectronic substrate 210, and/or the target rate at which conductive material is to be removed from the microelectronic substrate 210.

The methods described above with reference to FIGS. 2A-3 may be performed with the apparatuses described above with reference to FIGS. 4-9 in a variety of manners in accordance with several embodiments of the invention. For example, in one embodiment, a single apparatus can be used to electrolytically remove first the second conductive material 209 and then the first and second conductive materials 218, 209 simultaneously. Alternatively, one apparatus can initially remove the second material 209 (e.g., via CMP) and the same or another apparatus can subsequently remove both the first and second conductive materials 218, 209. In either embodiment, both the first an second conductive materials 218, 209 can be removed simultaneously when they are exposed. In one aspect of both embodiments, the downforce applied to the microelectronic substrate 210 can be reduced or eliminated during electrolytic processing. In another aspect of these embodiments, a selected downforce can be applied to the microelectronic substrate 210 during electrolytic processing to supplement the electrolytic removal process with a mechanical removal process. The electrolytic removal process can also be supplemented with a chemical removal process in addition to or in lieu of the mechanical removal process.

From the foregoing, it will be appreciated that specific embodiments of the invention have been described herein for purposes of illustration, but that various modifications may be made without deviating from the spirit and scope of the invention. Accordingly, the invention is not limited except as by the appended claims.

Chopra, Dinesh

Patent Priority Assignee Title
10584425, Sep 14 2012 International Business Machines Corporation Electrochemical etching apparatus
11424133, Jul 25 2019 Samsung Electronics Co., Ltd. Metal structure and method of manufacturing the same and metal wire and semiconductor device and electronic device
Patent Priority Assignee Title
2315695,
2516105,
3239439,
3334210,
4613417, Dec 28 1984 Bell Telephone Laboratories Incorporated Semiconductor etching process
4839005, May 22 1987 Kabushiki Kaisha Kobe Seiko Sho Electrolytic-abrasive polishing method of aluminum surface
5098533, Feb 06 1991 International Business Machines Corp. Electrolytic method for the etch back of encapsulated copper-Invar-copper core structures
5162248, Mar 13 1992 Round Rock Research, LLC Optimized container stacked capacitor DRAM cell utilizing sacrificial oxide deposition and chemical mechanical polishing
5244534, Jan 24 1992 Round Rock Research, LLC Two-step chemical mechanical polishing process for producing flush and protruding tungsten plugs
5300155, Dec 23 1992 Micron Technology, Inc IC chemical mechanical planarization process incorporating slurry temperature control
5344539, Mar 30 1992 Seiko Instruments Inc. Electrochemical fine processing apparatus
5562529, Oct 08 1992 Fujitsu Limited Apparatus and method for uniformly polishing a wafer
5567300, Sep 02 1994 GLOBALFOUNDRIES Inc Electrochemical metal removal technique for planarization of surfaces
5575885, Dec 14 1993 Kabushiki Kaisha Toshiba Copper-based metal polishing solution and method for manufacturing semiconductor device
5618381, Jan 24 1992 Micron Technology, Inc. Multiple step method of chemical-mechanical polishing which minimizes dishing
5624300, Oct 08 1992 Fujitsu Limited Apparatus and method for uniformly polishing a wafer
5676587, Dec 06 1995 GLOBALFOUNDRIES Inc Selective polish process for titanium, titanium nitride, tantalum and tantalum nitride
5681423, Jun 06 1996 Round Rock Research, LLC Semiconductor wafer for improved chemical-mechanical polishing over large area features
5780358, Apr 08 1996 Chartered Semiconductor Manufacturing Ltd. Method for chemical-mechanical polish (CMP) planarizing of cooper containing conductor layers
5800248, Apr 26 1996 Applied Materials, Inc Control of chemical-mechanical polishing rate across a substrate surface
5807165, Mar 26 1997 GLOBALFOUNDRIES Inc Method of electrochemical mechanical planarization
5840629, Dec 14 1995 Sematech, Inc.; SEMATECH, INC Copper chemical mechanical polishing slurry utilizing a chromate oxidant
5843818, Dec 05 1995 SAMSUNG ELECTRONICS CO , LTD Methods of fabricating ferroelectric capacitors
5846398, Aug 23 1996 SEMATECH, INC CMP slurry measurement and control technique
5863307, Apr 08 1996 Chartered Semiconductor Manufacturing, Ltd. Method and slurry composition for chemical-mechanical polish (CMP) planarizing of copper containing conductor layers
5888866, Apr 18 1998 United Microelectronics Corp. Method for fabricating capacitors of a dynamic random access memory
5897375, Oct 20 1997 SHENZHEN XINGUODU TECHNOLOGY CO , LTD Chemical mechanical polishing (CMP) slurry for copper and method of use in integrated circuit manufacture
5911619, Mar 26 1997 GLOBALFOUNDRIES Inc Apparatus for electrochemical mechanical planarization
5930699, Nov 12 1996 Ericsson Inc. Address retrieval system
5934980, Jun 09 1997 U S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT Method of chemical mechanical polishing
5952687, Sep 13 1995 Kabushiki Kaisha Toshiba Semiconductor memory device having a trench capacitor with lower electrode inside the trench
5954975, Nov 03 1993 Intel Corporation Slurries for chemical mechanical polishing tungsten films
5954997, Dec 09 1996 Cabot Microelectronics Corporation Chemical mechanical polishing slurry useful for copper substrates
5972792, Oct 18 1996 U S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT Method for chemical-mechanical planarization of a substrate on a fixed-abrasive polishing pad
5993637, Dec 06 1996 Canon Kabushiki Kaisha Electrode structure, electrolytic etching process and apparatus
6001730, Oct 20 1997 SHENZHEN XINGUODU TECHNOLOGY CO , LTD Chemical mechanical polishing (CMP) slurry for polishing copper interconnects which use tantalum-based barrier layers
6007695, Sep 30 1997 Canon Kabushiki Kaisha Selective removal of material using self-initiated galvanic activity in electrolytic bath
6010964, Aug 20 1997 U S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT Wafer surface treatment methods and systems using electrocapillarity
6024856, Oct 10 1997 ENTHONE-OMI, INC Copper metallization of silicon wafers using insoluble anodes
6033953, Dec 27 1996 Texas Instruments Incorporated Method for manufacturing dielectric capacitor, dielectric memory device
6039633, Oct 01 1998 U S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT Method and apparatus for mechanical and chemical-mechanical planarization of microelectronic-device substrate assemblies
6046099, Nov 03 1993 Intel Corporation Plug or via formation using novel slurries for chemical mechanical polishing
6051496, Sep 17 1998 Taiwan Semiconductor Manufacturing Company Use of stop layer for chemical mechanical polishing of CU damascene
6060386, Aug 21 1997 U S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT Method and apparatus for forming features in holes, trenches and other voids in the manufacturing of microelectronic devices
6060395, Jul 17 1996 U S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT Planarization method using a slurry including a dispersant
6063306, Jun 26 1998 Cabot Microelectronics Corporation Chemical mechanical polishing slurry useful for copper/tantalum substrate
6066030, Mar 04 1999 GLOBALFOUNDRIES Inc Electroetch and chemical mechanical polishing equipment
6066559, Feb 02 1996 U S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT Method for forming a semiconductor connection with a top surface having an enlarged recess
6068787, Nov 26 1996 Cabot Microelectronics Corporation Composition and slurry useful for metal CMP
6077412, Aug 22 1997 Cutek Research, Inc. Rotating anode for a wafer processing chamber
6083840, Mar 06 1998 FUJIFILM ELECTRONIC MATERIALS U S A , INC ; FUJIFILM ELECTRONICS MATERIALS U S A Slurry compositions and method for the chemical-mechanical polishing of copper and copper alloys
6100197, Oct 13 1998 Renesas Electronics Corporation Method of fabricating a semiconductor device
6103096, Nov 12 1997 GLOBALFOUNDRIES Inc Apparatus and method for the electrochemical etching of a wafer
6103628, Dec 01 1998 Novellus Systems, Inc Reverse linear polisher with loadable housing
6103636, Aug 20 1997 U S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT Method and apparatus for selective removal of material from wafer alignment marks
6115233, Jun 28 1996 Bell Semiconductor, LLC Integrated circuit device having a capacitor with the dielectric peripheral region being greater than the dielectric central region
6117781, Apr 22 1999 Advanced Micro Devices, Inc. Optimized trench/via profile for damascene processing
6121152, Jun 11 1998 Novellus Systems, Inc Method and apparatus for planarization of metallized semiconductor wafers using a bipolar electrode assembly
6132586, Jun 11 1998 Novellus Systems, Inc Method and apparatus for non-contact metal plating of semiconductor wafers using a bipolar electrode assembly
6143155, Jun 11 1998 Novellus Systems, Inc Method for simultaneous non-contact electrochemical plating and planarizing of semiconductor wafers using a bipiolar electrode assembly
6162681, Jan 26 1998 ACER SEMICONDUCTOR MANUFACTURING INC ; TSMC-ACER Semiconductor Manufacturing Corporation; TAIWAN SEMICONDUCTOR MANUFACTURING CO , LTD DRAM cell with a fork-shaped capacitor
6171467, Nov 25 1997 JOHNS HOPKINS UNIVERSITY,THE Electrochemical-control of abrasive polishing and machining rates
6174425, May 14 1997 SHENZHEN XINGUODU TECHNOLOGY CO , LTD Process for depositing a layer of material over a substrate
6176992, Dec 01 1998 Novellus Systems, Inc Method and apparatus for electro-chemical mechanical deposition
6180947, Aug 07 1998 Nikon Corporation Multi-element deflection aberration correction for electron beam lithography
6187651, May 07 1998 Samsung Electronics Co., Ltd.; SAMSUNG ELECTRONICS CO , LTD Methods of forming trench isolation regions using preferred stress relieving layers and techniques to inhibit the occurrence of voids
6190494, Jul 29 1998 U S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT Method and apparatus for electrically endpointing a chemical-mechanical planarization process
6196899, Jun 21 1999 U S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT Polishing apparatus
6197182, Jul 07 1999 Technic Inc.; TECHNIC INC Apparatus and method for plating wafers, substrates and other articles
6206756, Nov 10 1998 U S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT Tungsten chemical-mechanical polishing process using a fixed abrasive polishing pad and a tungsten layer chemical-mechanical polishing solution specifically adapted for chemical-mechanical polishing with a fixed abrasive pad
6218309, Jun 30 1999 Lam Research Corporation Method of achieving top rounding and uniform etch depths while etching shallow trench isolation features
6250994, Oct 01 1998 Round Rock Research, LLC Methods and apparatuses for mechanical and chemical-mechanical planarization of microelectronic-device substrate assemblies on planarizing pads
6259128, Apr 23 1999 International Business Machines Corporation Metal-insulator-metal capacitor for copper damascene process and method of forming the same
6273786, Nov 10 1998 U S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT Tungsten chemical-mechanical polishing process using a fixed abrasive polishing pad and a tungsten layer chemical-mechanical polishing solution specifically adapted for chemical-mechanical polishing with a fixed abrasive pad
6276996, Nov 10 1998 U S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT Copper chemical-mechanical polishing process using a fixed abrasive polishing pad and a copper layer chemical-mechanical polishing solution specifically adapted for chemical-mechanical polishing with a fixed abrasive pad
6280581, Dec 29 1998 Method and apparatus for electroplating films on semiconductor wafers
6287974, Jun 30 1999 Lam Research Corporation Method of achieving top rounding and uniform etch depths while etching shallow trench isolation features
6299741, Nov 29 1999 Applied Materials, Inc.; Applied Materials, Inc Advanced electrolytic polish (AEP) assisted metal wafer planarization method and apparatus
6303956, Feb 26 1999 Round Rock Research, LLC Conductive container structures having a dielectric cap
6313038, Apr 26 2000 Micron Technology, Inc. Method and apparatus for controlling chemical interactions during planarization of microelectronic substrates
6322422, Jan 19 1999 Bombardier Motor Corporation of America Apparatus for accurately measuring local thickness of insulating layer on semiconductor wafer during polishing and polishing system using the same
6328632, Aug 31 1999 Micron Technology Inc Polishing pads and planarizing machines for mechanical and/or chemical-mechanical planarization of microelectronic substrate assemblies
6368184, Jan 06 2000 Advanced Micro Devices, Inc. Apparatus for determining metal CMP endpoint using integrated polishing pad electrodes
6368190, Jan 26 2000 Bell Semiconductor, LLC Electrochemical mechanical planarization apparatus and method
6379223, Nov 29 1999 Applied Materials, Inc. Method and apparatus for electrochemical-mechanical planarization
6395152, Jul 09 1998 ACM Research, Inc. Methods and apparatus for electropolishing metal interconnections on semiconductor devices
6395607, Jun 09 1999 AlliedSignal Inc Integrated circuit fabrication method for self-aligned copper diffusion barrier
6416647, Apr 21 1998 Applied Materials, Inc Electro-chemical deposition cell for face-up processing of single semiconductor substrates
6455370, Aug 16 2000 Round Rock Research, LLC Method of patterning noble metals for semiconductor devices by electropolishing
6461911, May 26 2000 Samsung Electronics Co., Ltd. Semiconductor memory device and fabricating method thereof
6464855, Oct 04 2000 Novellus Systems, Inc Method and apparatus for electrochemical planarization of a workpiece
6504247, Jun 09 1999 DIO TECHNOLOGY HOLDINGS LLC Integrated having a self-aligned Cu diffusion barrier
6515493, Apr 12 2000 Novellus Systems, Inc Method and apparatus for in-situ endpoint detection using electrical sensors
6537144, Feb 17 2000 Applied Materials, Inc. Method and apparatus for enhanced CMP using metals having reductive properties
6551935, Aug 31 2000 U S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT Slurry for use in polishing semiconductor device conductive structures that include copper and tungsten and polishing methods
6599806, Oct 16 1998 Samsung Electronics Co., Ltd. Method for manufacturing a capacitor of a semiconductor device
6603117, Jun 28 2001 POLLACK LABORATORIES, INC Self contained sensing apparatus and system
6605539, Aug 31 2000 Round Rock Research, LLC Electro-mechanical polishing of platinum container structure
6607988, Dec 28 1999 PS4 LUXCO S A R L Manufacturing method of semiconductor integrated circuit device
6620037, Mar 18 1998 Cabot Microelectronics Corporation Chemical mechanical polishing slurry useful for copper substrates
6632335, Dec 24 1999 Ebara Corporation Plating apparatus
6689258, Apr 30 2002 FULLBRITE CAPITAL PARTNERS Electrochemically generated reactants for chemical mechanical planarization
6693036, Sep 07 1999 Sony Corporation Method for producing semiconductor device polishing apparatus, and polishing method
6705926, Oct 24 2001 CMC MATERIALS, INC Boron-containing polishing system and method
6722942, May 21 2001 Advanced Micro Devices, Inc. Chemical mechanical polishing with electrochemical control
6722950, Nov 07 2000 Planar Labs Corporation Method and apparatus for electrodialytic chemical mechanical polishing and deposition
6726823, Nov 28 1998 ACM Research, Inc. Methods and apparatus for holding and positioning semiconductor workpieces during electropolishing and/or electroplating of the workpieces
6736952, Feb 12 2001 Novellus Systems, Inc Method and apparatus for electrochemical planarization of a workpiece
6753250, Jun 12 2002 Novellus Systems, Inc. Method of fabricating low dielectric constant dielectric films
6776693, Dec 19 2001 Applied Materials Inc. Method and apparatus for face-up substrate polishing
6780772, Dec 21 2001 Novellus Systems, Inc Method and system to provide electroplanarization of a workpiece with a conducting material layer
6797623, Mar 09 2000 Sony Corporation Methods of producing and polishing semiconductor device and polishing apparatus
6808617, Sep 19 2000 Sony Corporation Electrolytic polishing method
6811680, Mar 14 2001 Applied Materials, Inc Planarization of substrates using electrochemical mechanical polishing
6846227, Feb 28 2001 Sony Corporation Electro-chemical machining appartus
6848970, Sep 16 2002 Applied Materials Inc Process control in electrochemically assisted planarization
6852630, Apr 23 2001 Novellus Systems, Inc Electroetching process and system
6858124, Dec 16 2002 3M Innovative Properties Company Methods for polishing and/or cleaning copper interconnects and/or film and compositions therefor
6867136, Jul 20 2001 Novellus Systems, Inc Method for electrochemically processing a workpiece
6867448, Aug 31 2000 Round Rock Research, LLC Electro-mechanically polished structure
6881664, Aug 28 2001 Bell Semiconductor, LLC Process for planarizing upper surface of damascene wiring structure for integrated circuit structures
6884338, Dec 16 2002 3M Innovative Properties Company Methods for polishing and/or cleaning copper interconnects and/or film and compositions therefor
6893328, Apr 23 2003 Rohm and Haas Electronic Materials CMP Holdings, Inc Conductive polishing pad with anode and cathode
6899804, Apr 10 2001 Applied Materials, Inc Electrolyte composition and treatment for electrolytic chemical mechanical polishing
6951599, Jan 22 2002 Applied Materials, Inc. Electropolishing of metallic interconnects
6977224, Dec 28 2000 Intel Corporation Method of electroless introduction of interconnect structures
7074113, Aug 30 2000 U S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT Methods and apparatus for removing conductive material from a microelectronic substrate
7078308, Aug 29 2002 U S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT Method and apparatus for removing adjacent conductive and nonconductive materials of a microelectronic substrate
7094131, Aug 30 2000 Round Rock Research, LLC Microelectronic substrate having conductive material with blunt cornered apertures, and associated methods for removing conductive material
7112121, Aug 30 2000 U S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT Methods and apparatus for electrical, mechanical and/or chemical removal of conductive material from a microelectronic substrate
7112122, Sep 17 2003 Round Rock Research, LLC Methods and apparatus for removing conductive material from a microelectronic substrate
7129160, Aug 29 2002 U S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT Method for simultaneously removing multiple conductive materials from microelectronic substrates
7134934, Aug 30 2000 Round Rock Research, LLC Methods and apparatus for electrically detecting characteristics of a microelectronic substrate and/or polishing medium
7153195, Aug 30 2000 Round Rock Research, LLC Methods and apparatus for selectively removing conductive material from a microelectronic substrate
7153410, Aug 30 2000 Micron Technology, Inc. Methods and apparatus for electrochemical-mechanical processing of microelectronic workpieces
7153777, Feb 20 2004 Round Rock Research, LLC Methods and apparatuses for electrochemical-mechanical polishing
7160176, Aug 30 2000 Round Rock Research, LLC Methods and apparatus for electrically and/or chemically-mechanically removing conductive material from a microelectronic substrate
7192335, Aug 29 2002 Round Rock Research, LLC Method and apparatus for chemically, mechanically, and/or electrolytically removing material from microelectronic substrates
7220166, Aug 30 2000 Round Rock Research, LLC Methods and apparatus for electromechanically and/or electrochemically-mechanically removing conductive material from a microelectronic substrate
7229535, Dec 21 2001 Applied Materials, Inc. Hydrogen bubble reduction on the cathode using double-cell designs
20010035354,
20020025763,
20020104764,
20020115283,
20020130049,
20030010648,
20030064669,
20030113996,
20030136684,
20030178320,
20030234184,
20040154931,
20040192052,
20040259479,
20050016861,
20050020192,
20050056550,
20050133379,
20050173260,
20050178743,
20060042956,
20060163083,
20060189139,
20060199351,
20060208322,
20060234604,
20080045009,
EP459397,
EP527514,
EP1123956,
EP1386695,
JP10335305,
JP11145273,
JP1241129,
JP2000269318,
JP2001077117,
JP2002093758,
JP6120182,
TW516471,
WO26443,
WO28586,
WO32356,
WO59008,
WO59682,
WO2064314,
WO2085570,
WO3072672,
//////////
Executed onAssignorAssigneeConveyanceFrameReelDoc
May 19 2014Micron Technology, Inc.(assignment on the face of the patent)
Apr 26 2016Micron Technology, IncU S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENTCORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001 ASSIGNOR S HEREBY CONFIRMS THE SECURITY INTEREST 0430790001 pdf
Apr 26 2016Micron Technology, IncMORGAN STANLEY SENIOR FUNDING, INC , AS COLLATERAL AGENTPATENT SECURITY AGREEMENT0389540001 pdf
Apr 26 2016Micron Technology, IncU S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENTSECURITY INTEREST SEE DOCUMENT FOR DETAILS 0386690001 pdf
Jun 29 2018U S BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENTMicron Technology, IncRELEASE BY SECURED PARTY SEE DOCUMENT FOR DETAILS 0472430001 pdf
Jul 03 2018MICRON SEMICONDUCTOR PRODUCTS, INC JPMORGAN CHASE BANK, N A , AS COLLATERAL AGENTSECURITY INTEREST SEE DOCUMENT FOR DETAILS 0475400001 pdf
Jul 03 2018Micron Technology, IncJPMORGAN CHASE BANK, N A , AS COLLATERAL AGENTSECURITY INTEREST SEE DOCUMENT FOR DETAILS 0475400001 pdf
Jul 31 2019JPMORGAN CHASE BANK, N A , AS COLLATERAL AGENTMICRON SEMICONDUCTOR PRODUCTS, INC RELEASE BY SECURED PARTY SEE DOCUMENT FOR DETAILS 0510280001 pdf
Jul 31 2019JPMORGAN CHASE BANK, N A , AS COLLATERAL AGENTMicron Technology, IncRELEASE BY SECURED PARTY SEE DOCUMENT FOR DETAILS 0510280001 pdf
Jul 31 2019MORGAN STANLEY SENIOR FUNDING, INC , AS COLLATERAL AGENTMicron Technology, IncRELEASE BY SECURED PARTY SEE DOCUMENT FOR DETAILS 0509370001 pdf
Date Maintenance Fee Events
Nov 10 2015ASPN: Payor Number Assigned.
Jun 07 2019M1551: Payment of Maintenance Fee, 4th Year, Large Entity.
Aug 07 2023REM: Maintenance Fee Reminder Mailed.
Jan 22 2024EXP: Patent Expired for Failure to Pay Maintenance Fees.


Date Maintenance Schedule
Dec 15 20184 years fee payment window open
Jun 15 20196 months grace period start (w surcharge)
Dec 15 2019patent expiry (for year 4)
Dec 15 20212 years to revive unintentionally abandoned end. (for year 4)
Dec 15 20228 years fee payment window open
Jun 15 20236 months grace period start (w surcharge)
Dec 15 2023patent expiry (for year 8)
Dec 15 20252 years to revive unintentionally abandoned end. (for year 8)
Dec 15 202612 years fee payment window open
Jun 15 20276 months grace period start (w surcharge)
Dec 15 2027patent expiry (for year 12)
Dec 15 20292 years to revive unintentionally abandoned end. (for year 12)