A system for reading and writing data to virtual machines in a machine operating according to the arinc 653 standard includes a plurality of virtual machines that intercommunicate and communicate over a bus. A data interceptor is connected to the bus for communication with each virtual machine by reading and writing data to each virtual machine.
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13. A method for testing an input and an output of at least one virtual machine in a machine operating in accordance to an arinc 653 standard, the method comprising:
creating in the machine having an arinc 653 operating system at least one virtual machine;
providing a data interceptor application in a user space to communicate with the at least one virtual machine;
using a data interceptor in a kernel space defined by an arinc 653 standard to communicate with the data interceptor application in the user space of the at least one virtual machine in the machine;
testing the at least one virtual machine with the data interceptor in the kernel space by communicating directly with the data interceptor application in the user space of the at least one virtual machine.
7. A device configured to read and write data to at least one of a plurality of virtual machines established in a machine with a physical i/O port that is operating in accordance to an arinc 653 standard, the device comprising:
a processor;
a storage medium coupled to the processor with an arinc 653 operating system software stored on the storage medium, wherein the processor executes the arinc 653 operating system software stored on the storage medium; and
a network interface adapted to operatively connect the device to the physical i/O port of the machine for direct communication between the device and at least one of the virtual machines established in the machine and position the device between the virtual machines and an arinc 653 driver to intercept a data before it reaches the network.
1. A system comprising:
a processor having a storage medium coupled to the processor with an arinc 653 operating system software stored on the storage medium, wherein the processor executes the arinc 653 operating system software and cooperates with the storage medium to create a plurality of virtual machines;
a bus connected to the processor for communication with the virtual machines;
an arinc 653 driver for communicating with a network;
a data interceptor positioned between the bus and the arinc 653 driver, wherein the data interceptor is connected to the bus and communicates with at least one of the plurality of virtual machines and intercepts the data before it reaches the network, wherein the plurality of virtual machines reside in a user space and the data interceptor resides in a kernel space defined by an arinc 653 standard with the arinc 653 driver.
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The U.S. Government has a paid-up license in this invention and the right in limited circumstances to require the patent owner to license others on reasonable terms as provided for by the terms of contract No. DAAH23-03-D-0015 awarded by the U. S. Department of Defense.
The present invention relates to communication between software applications, and more particularly, this invention relates to reading and writing data to virtual machines in a processor operating with Real-time Operating Systems that implement ARINC 653 concepts, including intra-processor communication.
In modern avionics systems, partitioning operating systems are typically used to meet critical safety and mission requirements. Aeronautical Radio Inc. (ARINC) has promulgated the “ARINC Specification 653: Avionics Application Standard Software Interface” family of specifications (generally referred to here as “ARINC 653”) to host multiple applications on different software levels on the same hardware.
ARINC 653 defines an Application EXecutive (APEX) for space and time partitioning for enabling multiple partitions to share a single processor and memory in order to guarantee that applications executing within one partition cannot adversely affect other partitions in the event of an application failure. Each partition in the ARINC 653 system represents a separate application and makes use of dedicated memory space. Similarly, the APEX allots a dedicated time slice to each partition for time partitioning. All ARINC 653 data is internal to the processor and cannot be monitored or injected from an external source. In this regard, ARINC 653 governs only intra-processor communication.
The processor industry is transitioning to multi-core and multi-processor systems for various reasons. Increasing the number of processors and processor cores permits more partitions to be created in a network component, with each partition configured as a virtual machine and executing its own programs. These virtual machines can intercommunicate with each other leading to an increase in operating efficiencies, but they are limited from being able to easily monitor and troubleshoot the network component. Data can only be captured and injected from the Avionics System LAN (“ASL”), making each processor a “black box” that masks operation of the internal virtual machines.
The present invention provides a system and method that allows the ARINC 653 data in an ARINC 653 network to be viewed and stimulated from an external source before ARINC 653 data reaches its destination.
The present invention provides a system for reading and writing data to virtual machines in a processor operating according to the ARINC 653 standard. The system includes a processor having a plurality of virtual machines that intercommunicate and communicate over a bus. A data interceptor is connected to the bus for communication with each virtual machine by reading and writing data to each virtual machine.
In another embodiment, the data interceptor facilitates inter-processor communication pursuant to the ARINC 653 standard. The data interceptor can be positioned between the virtual machines in the processor and other machines on an avionics network to read and write ARINC 653 data to the other machines.
Other features and aspects of the invention will become apparent upon review of the following description taken in connection with the accompanying drawings. The invention, though, is pointed out with particularity by the appended claims.
Software 106 includes an operating system 108 with a partitioning kernel 110 and an application executive (APEX) interface 114, each of which supports the ARINC 653 specification. Partitioning kernel 110 manages and controls access to resources and implements the partitioning functions necessary for operating system 108 to carry out space and time partitioning required by the ARINC 653 standard. APEX interface 114 provides an interface between the partitioning kernel 108 (and the resources accessible therethrough) and partition software 112 that executes in the various partitions that are provided by the partitioning kernel 110.
The software 106 can be stored on or in a storage medium 116. The program instructions with software 106 can be read and executed by the appropriate core 104. The program instructions, when executed by the respective core 104, can carry out at least a portion of the functionality described here as being performed by the system 100.
Cores 104 are coupled to a local memory 118, which is implemented using appropriate memory devices (such as random-access memory (RAM) devices such as dynamic and static RAM devices and read-only memory (ROM) devices). Each core 104 communicates with memory 118 over bus 120. Although software 106 is shown as being stored on or in a storage medium 116 that is separate from the memory 118, it is to be understood that at least a portion the software 106 (and corresponding portions of the storage medium 116) can be in the memory 118.
System 100 has a network interface 126 that it uses to communicate over an avionics ASL Network 122 to other machines 124.
Multi-core processor unit 102 is configured so that each core 104 executes a sequence of instructions for only one partition at any given time. In each such partition, corresponding partition software 112 is executed on one of the plurality of cores 104 of the multi-core processor unit 102. There is a corresponding dedicated portion of the memory 118 that is used by the respective partition software 112 executing in that partition. In this regard, there are multiple logical partitions in system 100 each representing a “virtual machine” 130 (shown in
The ARINC 653 standard enables virtual machines 130 to execute their own applications and communicate with each other. A data interceptor 128 can be selectively coupled to bus 120 through an I/O port to read and write data on bus 120 for processing by virtual machines 130. Each virtual machine 130 in system 100 can be tested by monitoring its input and output with data interceptor 128.
Data interceptor 128 is positioned between each virtual machine 130 and an ARINC 653 driver 134. This positions data interceptor 128 to intercept data before it reaches ASL Network 122.
Data interceptor 128 allows independent monitoring or testing of each virtual machine 130a, 130b, and 130c to determine whether any one of virtual machines 130a. 130b, and 130c is operating incorrectly. Furthermore, because data interceptor 128 operates with the ARINC 653 standard and it can be positioned in the path of communication between processor 102 and other machines 124, inter-processor (i.e., inter-machine) communication using the ARINC 653 standard is allowed and enables developers to use ARINC 653, which is an industry standard, for inter-processor communication.
Elements of the computer hardware system perform their conventional functions known in the art. Mass storage 312 is used to provide permanent storage for the data and programming instructions to perform the above-described functions of reading and writing data to virtual machines 130, whereas system memory 304 (e.g., DRAM) is used to provide temporary storage for the data and programming instructions when executed by processor 302. I/O ports 310 are one or more serial and/or parallel communication ports used to provide communication between additional peripheral devices, which may be coupled to data interceptor 128.
Data interceptor 128 may include a variety of system architectures, and various components of data interceptor 128 may be rearranged. For example, cache 314 may be on-chip with processor 302. Alternatively, cache 314 and processor 302 may be packed together as a “processor module,” with processor 302 being referred to as the “processor core.” Furthermore, certain implementations of the claimed embodiments may not require nor include all the above components. For example, additional components may be included in data interceptor 128, such as additional processors, storage devices, or memories.
The ARINC 653 standard enables virtual machines 130 to execute their own applications and communicate with each other. This intra-processor communication between virtual machines 130, however, was imperceptible until an output was provided to ASL Network 122. This limitation only permitted system 100 to be tested as a “black box” where only the input and output to system 100 could be determined. The operation of each virtual machine 130 was hidden from view. The foregoing disclosure enables testing through reading and writing data to each virtual machine 130 within processor 102. Furthermore, inter-processor or inter-machine communication with the ARINC 653 standard is allowed for all other purposes in addition to testing.
While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it should be understood by those of ordinary skill in the art that various changes, substitutions and alterations can be made herein without departing from the scope of the invention as defined by the appended claims and their equivalents.
Paxton, Nicholas A., Henin, Ramy W., Rodriguez, Jr., Paul C.
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Executed on | Assignor | Assignee | Conveyance | Frame | Reel | Doc |
Mar 15 2013 | Rockwell Collins, Inc. | (assignment on the face of the patent) | / | |||
Apr 18 2013 | PAXTON, NICHOLAS A | Rockwell Collins, Inc | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 030261 | /0302 | |
Apr 18 2013 | HENIN, RAMY W | Rockwell Collins, Inc | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 030261 | /0302 | |
Apr 18 2013 | RODRIGUEZ, PAUL C | Rockwell Collins, Inc | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 030261 | /0302 |
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