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The ornamental design for a defect inspection device for semiconductors, as shown. |
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FIG. 1 is a front, top and left side perspective view of a defect inspection device for semiconductors showing my new design;
FIG. 2 is a front elevational view thereof;
FIG. 3 is a top plan view thereof;
FIG. 4 is a right side elevational view thereof;
FIG. 5 is a left side elevational view thereof;
FIG. 6 is a rear elevational view thereof; and
FIG. 7 is a bottom plan view thereof.
| Patent | Priority | Assignee | Title |
| Patent | Priority | Assignee | Title |
| 4745354, | May 20 1985 | FTS SYSTEMS, INC | Apparatus and methods for effecting a burn-in procedure on semiconductor devices |
| 4755746, | Apr 24 1985 | Prometrix Corporation | Apparatus and methods for semiconductor wafer testing |
| D292979, | Apr 26 1985 | TENCOR INSTRUMENTS A CA CORP | Automatic semiconductor wafer tester |
| Executed on | Assignor | Assignee | Conveyance | Frame | Reel | Doc |
| Dec 12 1987 | NISHIDA, YOSHIAKI | Kabushiki Kaisha Toshiba | ASSIGNMENT OF ASSIGNORS INTEREST | 005251 | /0271 | |
| Dec 18 1987 | Kabushiki Kaisha Toshiba | (assignment on the face of the patent) | / |
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