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The ornamental design for a digital circuit board tester, as shown and described. |
FIG. 1 is a top plan view of a digital circuit board tester showing my new design;
FIG. 2 is a front elevational view;
FIG. 3 is a right side elevational view;
FIG. 4 is a left side elevational view;
FIG. 5 is a rear elevational view;
FIG. 6 is a bottom plan view; and
FIG. 7 is a top, front, and left side perspective view thereof.
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Executed on | Assignor | Assignee | Conveyance | Frame | Reel | Doc |
Nov 13 1987 | John Fluke Mfg. Co., Inc. | (assignment on the face of the patent) | / | |||
Dec 10 1987 | BROWN, JEFFREY C | JOHN FLUKE MFG , CO , INC , A WA CORP | ASSIGNMENT OF ASSIGNORS INTEREST | 004897 | /0636 |
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