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The ornamental design for an enclosure for testing circuit boards, as shown. |
FIG. 1 is a front view of the enclosure for testing circuit boards showing my new design;
FIG. 2 is a rear view of the enclosure shown in FIG. 1;
FIG. 3 is a right side view of the enclosure of FIG. 1;
FIG. 4 is a left side view of the enclosure of FIG. 1;
FIG. 5 is a top view of the enclosure of FIG. 1;
FIG. 6 is a bottom view of the enclosure of FIG. 1; and,
FIG. 7 is a perspective view of the enclosure of FIG. 1.
Patent | Priority | Assignee | Title |
Patent | Priority | Assignee | Title |
4528504, | May 27 1982 | Intersil Corporation | Pulsed linear integrated circuit tester |
D338416, | Jul 25 1988 | Agilent Technologies Inc | Printed circuit board tester |
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