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The ornamental design for the signal processor, as shown and described. |
FIG. 1 is a perspective view of the signal processor in accordance with one aspect of the present invention;
FIG. 2 is a front elevation view of the signal processor of FIG. 1;
FIG. 3 is a left-side elevation view of the signal processor of FIG. 1;
FIG. 4 is a right-side elevation view of the signal processor of FIG. 1;
FIG. 5 is a rear elevation view of the signal processor of FIG. 1;
FIG. 6 is a top plan view of the signal processor of FIG. 1;
FIG. 7 is a bottom plan view of the signal processor of FIG. 1; and,
FIG. 8 is a perspective view showing the signal process of of FIG. 1 in operational use with a data recorder mounted on the top surface of the signal processor.
The data recorder is shown in broken lines for illustrative purposes only and forms no part of the claimed design.
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Executed on | Assignor | Assignee | Conveyance | Frame | Reel | Doc |
Sep 15 1995 | Sony Kabushiki Kaisha | (assignment on the face of the patent) | / | |||
Nov 08 1995 | IKENAGA, TAKASHI | Sony Kabushiki Kaisha | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 007726 | /0803 |
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