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The ornamental design for a semiconductor element, as shown and described. |
FIG. 1 is a perspective view of a semiconductor element showing my new design;
FIG. 2 is a top plan view thereof;
FIG. 3 is a left side elevational view thereof;
FIG. 4 is a front elevational view thereof;
FIG. 5 is a bottom plan view thereof;
FIG. 6 is a right side elevational view thereof;
FIG. 7 is a rear elevational view thereof; and,
FIG. 8 is reference perspective view thereof in the using condition.
Portions in broken lines are for illustrative purposes only and form no part of claimed design.
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Executed on | Assignor | Assignee | Conveyance | Frame | Reel | Doc |
Nov 20 1997 | Sony Corporation | (assignment on the face of the patent) | / | |||
Feb 16 1998 | ORA, HARUO | Sony Corporation | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 010199 | /0316 |
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