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Patent
   D526023
Priority
Aug 24 2005
Filed
Aug 24 2005
Issued
Aug 01 2006
Expiry
Aug 01 2020
Inventors
Nesenoff, …
Assg.orig
Mitchell B…
Assg.curr
Mitchell B…
Entity
unknown
Referenced by
1
References
7
Maint.:
n/a
The ornamental design for a electrical circuits lab, as shown.

FIG. 1 is a front elevation view of the electrical circuits lab showing my new design; and,

FIG. 2 is a right front perspective view thereof.
INVENTORS:

Nesenoff, Mitchell B.

THIS PATENT IS REFERENCED BY THESE PATENTS:
Patent Priority Assignee Title
D534959, Aug 31 2005 Mitchell B., Nesenoff Digital systems lab
THIS PATENT REFERENCES THESE PATENTS:
Patent Priority Assignee Title
1271641,
3277589,
4332568, Oct 19 1977 Cabinet with electrical apparatus for use in teaching
176574,
D264351, Jul 24 1980 Electrical wiring trainer
D304957, Oct 03 1986 INTERPLEX ELECTRONICS, INC , A CORP OF CT Experimental electronics trainer
D508265, Oct 30 2003 Mitchell B., Nesenoff Modern digital laboratory
ASSIGNMENT RECORDS    Assignment records on the USPTO
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Executed onAssignorAssigneeConveyanceFrameReelDoc
Aug 24 2005Mitchell B., Nesenoff(assignment on the face of the patent)
MAINTENANCE FEES AND DATES:    Maintenance records on the USPTO
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