FIG. 1 is a perspective view of our design;
FIG. 2 is a top plan view of the embodiment of FIG. 1;
FIG. 3 is a side elevational view of the embodiment of FIG. 1, the opposite side being a mirror image thereof;
FIG. 4 is a front elevational view of the embodiment of FIG. 1;
FIG. 5 is a back view of the embodiment of FIG. 1;
FIG. 6 is a perspective view of a second embodiment of our design;
FIG. 7 is a top plan view of the embodiment of FIG. 6;
FIG. 8 is a side elevational view of the embodiment of FIG. 6, the opposite side being a mirror image thereof;
FIG. 9 is a front view of the embodiment of FIG. 6;
FIG. 10 is a back view of the embodiment of FIG. 6;
FIG. 11 is a perspective view of a third embodiment of our design;
FIG. 12 is a top plan view of the embodiment of FIG. 11;
FIG. 13 is a side elevational view of the embodiment of FIG. 11, the opposite side being a mirror image thereof;
FIG. 14 is a front view of the embodiment of FIG. 11;
FIG. 15 is a back view of the embodiment of FIG. 11; and,
FIG. 16 is a bottom view of the embodiment of FIG. 11.
Broken lines shown in the drawings illustrate portions of the electronics enclosure, and form no part of the claimed design.