Patent
   D864951
Priority
Dec 21 2016
Filed
Dec 21 2016
Issued
Oct 29 2019
Expiry
Oct 29 2034
Assg.orig
Entity
unknown
2
120
n/a
The ornamental design for an electronics module, as shown and described.

FIG. 1 is a front view of an electronics module showing my new design;

FIG. 2 is a rear view of the electronics module.

FIG. 3 is a right side view of the electronics module.

FIG. 4 is a left side view of the electronics module.

FIG. 5 is a top view of the electronics module.

FIG. 6 is a bottom view of the electronics module.

FIG. 7 is a top-rear-right perspective view of the electronics module.

FIG. 8 is a bottom-rear-right perspective view of the electronics module.

FIG. 9 is a top-rear-left perspective view of the electronics module; and,

FIG. 10 is a bottom-front-right perspective view of the electronics module.

The shade lines show surface contour and not surface ornamentation.

The broken line showing of communication ports, access panels, and openings in the exterior of the electronics module illustrates environmental structure, and the broken lines form no part of the claimed design.

Ranade, Amruta

Patent Priority Assignee Title
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Executed onAssignorAssigneeConveyanceFrameReelDoc
Dec 21 2016Intel Corporation(assignment on the face of the patent)
Feb 14 2017RANADE, AMRUTAIntel CorporationASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0420090037 pdf
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