FIG. 1 is a front view of a test chip;
FIG. 2 is a top view thereof;
FIG. 3 is a bottom view thereof;
FIG. 4 is a right side view thereof;
FIG. 5 is a left side view thereof; and,
FIG. 6 is a cross-sectional view taken along line 6-6 shown in FIG. 5.
The rear view is omitted since it is symmetrical to the front view. The broken lines represent portions of the test chip and form no part of the claimed design.
Edura, Tomohiko, Kim, Seung Kyum, Ito, Takashi
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