A cadmium telluride photovoltaic cell is produced with increased conversion efficiency arising from enhanced open-circuit voltage. Such voltage is achieved by altering the surface of the crystalline cadmium telluride that contacts the barrier metal by heating the cadmium telluride in the presence of oxygen prior to depositing the barrier metal.
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#2# 6. A photovoltaic cell exhibiting an enhanced open circuit voltage, comprising
a layer of crystalline cadmium telluride, a surface of said layer being in an altered state achieved by heating in air for more than about 2 minutes and less than or equal to about 20 minutes at a temperature between about 250°C and about 350°C, or for a time less than or equal to about 2 minutes but at a temperature in centigrade degrees no lower than about 490/a, where a is the time of heating in minutes; in contact with at least part of said altered surface, a layer of metal capable of forming a barrier with said cadmium telluride altered surface; and an electrode in ohmic contact with said cadmium telluride.
#2# 1. A photovoltaic cell comprising
a layer of crystalline cadmium telluride, an exterior surface portion of said layer having TeO2 in the crystalline lattice an oxide form of tellurium to a depth effective to produce an open-circuit voltage that is enhanced over the open-circuit voltage that is produced without said TeO2 by a photovoltaic cell identical in structure except for the layer of cadmium telluride which has in the exterior surface portion thereof only the oxide forms of tellurium resulting from exposing said surface portion to air at room temperature, a layer of metal in contact with at least part of said exterior surface portion, said layer being capable of forming a barrier with said cadmium telluride #20# altered surface portion; and an electrode in ohmic contact with said cadmium telluride.
#2# 4. A process for the formation of a photovoltaic cell, the process comprising the steps of
a. forming a layer of crystalline cadmium telluride, b. heating at least one surface of the layer in air for more than about 2 minutes and less than or equal to about 20 minutes at a temperature between about 250°C and about 350°C, or for a time less than or equal to about 2 minutes but at a temperature in centigrade degrees no lower than about 490/a, where a is the time of heating in minutes; and c. applying a metal layer in contact with at least part of said one surface, said metal being capable of forming a barrier with cadmium telluride,
whereby a cell is produced having an open-circuit voltage which is at least about 50 millivolts greater than a similar cell processed without step (b) above. #2# 5. A photovoltaic cell comprising
a layer of crystalline cadmium telluride, a surface of said layer being altered to contain tellurium oxide an oxide form of tellurium by heating in an oxygen containing atmosphere for between about 1 minute and about 20 minutes at a temperature between about 250° and about 500°C the oxygen being present in the atmosphere in an amount that is effective to enhance the open-circuit voltage by at least 50 millivolts compared to the open-circuit voltage of a photovoltaic cell identical in structure except for the layer of cadmium telluride which has in the surface thereof only the oxide forms of tellurium resulting from exposing said surface to air at room temperature, in contact with at least part of said altered surface, a layer of metal capable of forming a barrier with said cadmium telluride altered surface; and an electrode in ohmic contact with said cadmium telluride.
#2# 7. A process of measuring light, comprising the steps of
a. exposing to light, a photovoltaic cell comprising a layer of crystalline cadmium telluride, an exterior surface portion of said layer having TeO2 in the crystalline lattice an oxide form of tellurium to a depth effective to produce an open-circuit voltage that is enhanced over the open-circuit voltage that is produced without said TeO2 by a photovoltaic cell identical in structure except for the layer of cadmium telluride which has in the exterior surface portion thereof only the oxide forms of tellurium resulting from exposing said surface portion to air at room temperature, a layer of metal in contact with at least part of said exterior surface portion, said layer being capable of forming a barrier with said cadmium telluride altered surface; and #20#
an electrode in ohmic contact with said cadmium telluride, and b. measuring either the open-circuit voltage or short-circuit current generated by the cell.
#2# 8. A photovoltaic cell comprising
a layer of crystalline cadmium telluride, a surface of said layer being altered by heating in an oxygen containing atmosphere for between about 1 minute and about 20 minutes at a temperature between about 250° and about 500°C, the oxygen being present in the atmosphere in an amount that is effective to enhance the open circuit voltage by at least 50 millivolts compared to the open-circuit voltage of a photovoltaic cell identical in structure except for the layer of cadmium telluride which has in the surface thereof only the oxide forms of tellurium resulting from exposing said surface to air at room temperature, and in contact with at least part of said altered surface, a layer of metal capable of forming a barrier with said cadmium telluride altered surface; and an electrode in ohmic contact with said cadmium telluride. 9. A process for the formation of a photovoltaic cell, the process comprising the steps of a. forming a layer of crystalline cadmium telluride, b. heating at least one surface of the layer in an oxygen containing atmosphere for a time and at a temperature, and in an amount of oxygen, that are effective to enhance the open-circuit voltage by at least 50 millivolts compared to the open-circuit voltage of a photovoltaic cell identical in structure except for the layer of cadmium telluride which has in the surface thereof only the oxide forms of tellurium resulting from exposing said surface to air at room temperature, said temperature being at least about 250°C and said time being no greater than about 20 minutes, c. applying a metal layer in contact with at least part of said one surface, said metal being capable of forming a barrier with cadmium telluride, and d. ohmically contacting the cadmium telluride with an electrode. #20#
10. A process for the formation of a photovoltaic cell, the process comprising the steps of a. forming a layer of crystalline cadmium telluride, b. heating at least one surface of the layer in an oxygen containing atmosphere for between about 1 minute and about 20 minutes at a temperature between about 250°C and about 500°C, the oxygen being present in the atmosphere in an amount that is effective to enhance the open-circuit voltage by at least 50 millivolts compared to the open-circuit voltage of a photovoltaic cell identical in structure except for the layer of cadmium telluride which has in the surface thereof only the oxide forms of tellurium resulting from exposing said surface to air at room temperature, c. applying a metal layer in contact with at least part of said one surface, said metal being capable of forming a barrier with cadmium telluride, and d. ohmically contacting the cadmium telluride with an electrode. |
This application is a continuation application of U.S. reissue application S.N. 885,050, filed on Mar. 9, 1978, now abandoned, as a reissue for U.S. Pat. No. 4,035,197, issued on July 12, 1977, on U.S. Application S.N. 671,866, filed on Mar. 30, 1976. or of the CdTe includes both CdTe and TeO2 an oxide form of tellurium. This has been estimated as a result of electron spectroscopy chemical analysis of the semiconductor material afer forming the altered surface, which revealed that, in the altered surface, the cadmium electron region showed only the one peak indicative of cadmium metal. No cadmium oxide was detected. The tellurium electron region showed two peaks, one of which is indicative of TeO2 an oxide form of tellurium and the other of which is indicative of tellurium. The actual amount of TeO2 the oxide form of tellurium present will of course depend on the surface preparation and other factors that affect the oxidation process.
The FIGURE in the Drawing illustrates a CdTe cell 10 prepared for solar energy conversion and having an enhanced VOC as provided by the above-described process. Layer 12 is CdTe in polycrystalline form, having opposed surfaces 14 and 16. Surface 16 has been altered by the heat treatment described to a depth indicated by dotted line 18. In contact with surface 16 is the barrier metal 20 in layered form. Metals which in theory have a work function that compares favorably with the electron affinity of the n-type CdTe, will provide the necessary barrier. Useful metals include, for example gold, silver, copper, platinum, nickel, chromium, palladium and aluminum. A collecting grid 22 or other suitable electrodes are ohmically attached to metal 20 in a conventional manner. An optional antireflection layer 24 is coated over the grid 22 and the metal 20 with a thickness designed to increase the transmission of light to the metal-semiconductor interface. Such layers 24 are conventional, utilizing a thickness equal to about one-fourth the optimum desired light wavelength to reduce flare. Typical materials for layer 24 include SnOx, where x is less than or equal to 2, and zinc sulfide. Further discussion of such antireflection layers can be found in the literature.
The electronic circuit for the cell is completed by an ohmic contact 26 of metal, such as indium, made through surface 16 to the unaltered CdTe 12. Alternatively, contact 26 can be secured to surface 14. Leads 28 then carry the current, if used in the current mode, or apply the potential, if used in the open circuit mode, to the circuits used in conjunction with the cell.
Each of the elements of the cell previously described can be formed in a variety of ways. The semiconductor layer 12 can be formed by slicing a thin section from a sample formed by hot-pressing techniques or by any other conventional technique, and is doped n-type by the addition of chlorine, bromine, iodine, indium, etc. to the crystals as "impurities;" or by annealing in a suitable vapor, such as cadmium; or by both. P-type doping can be achieved by the appropriate selection of other "contaminants," as is well-known. The amount of doping does not appear to be critical, expect that uniform doping in a conventional manner appears to be desirable. The altered surface 16 is formed as described in detail above, preferably after cleaning the semiconductor layer by etching, abrasion, or the like. The barrier metal may be formed as a layer by vacuum deposition, chemical precipitation, electrochemical deposition, electroless deposition, and the like. Similar techniques can be used to deposit grid 22 and layer 24, except that a mask is preferred in forming the grid. Conventional soldering techniques are sufficient to form contact 26.
The thicknesses of the layers are not believed to be critical. Typical thicknesses include from 1 micrometer to about 2 millimeters for layer 12, and 0.005 to 0.008 micrometers for layer 20. The depth of altered surface layer 16 will vary depending on the heating conditions described above, and has not been accurately measured for each variation. However, optimum thicknesses are believed to be on the order of less than 0.005 micrometers.
The following non-exhaustive examples further illustrate the nature of the invention.
A hot-pressed sample of polycrystalline CdTe was sliced with a wire saw, and a slice was annealed in cadmium vapor for 24 hours at 850°C to provide an n-type semiconducting substrate. The surfaces of the slice were mechanically polished, then etched in a solution containing bromine in methyl alcohol. To provide the altered surface layer, the slice was heat treated in air in a muffle furnace at 300°C for 8 minutes. A gold barrier layer about 60 A thick was then vacuum-deposited on the etched and heat-treated surface through a circular mask over an area of 0.23 cm2 by flash evaporation. Copper electrical leads were attached to the gold layer with silver paint and to the CdTe surface by soldering with indium metal to provide ohmic contact. The resulting photovoltaic cell was illuminated through the gold layer with 100 mW/cm2 of light provided by a Kodak Carousel projector, Model 600H, containing a 300 W tungsten-halogen lamp (General Electric ELH). The open circuit voltage of the cell was 770 mV and the conversion efficiency was 6.4 percent.
As a control, another polycrystalline gold/CdTe photovoltaic cell prepared in a manner similar to Example 1, but without the heat-treatment, showed a VOC of only 437 mv and a conversion efficiency of 4.7%. The net VOC enhancement, then, was 333 mV.
Metal/semiconductor photovoltaic cells were prepared as in Example 1, Example 2 being with and Example 3 being without heat-treatment, except that both examples used a chlorine-doped single-crystal CdTe substrate and nickel as the barrier metal. Under the same illumination as in Example 1, the cell made from the heat-treated CdTe single crystal, Example 2, gave an open circuit voltage of 610 mV and a conversion efficiency of 3.4 percent. The cell made from single-crystal CdTe without heat-treatment, Example 3, showed an open circuit voltage of only 258 mV and a conversion efficiency of 2.2 percent. The remarkable effect of the heat treatment of the semiconductor substrate prior to barrier metal deposition in increasing both the open circuit voltage and the conversion efficiency is demonstrated by these examples.
In each of these examples, cells were prepared in a manner similar to Example 1, except that the time and temperature for preheating the CdTe was varied. The VOC and the enhancement for each example are listed in the following Table I. Measurements of VOC without heat treatment were made, in some instances, by grinding away the barrier metal after heat treatment and measurement, etching the semiconductor surface, reforming the barrier metal layer without forming the altered surface, and remeasuring VOC. Examples 4 and 5 are examples of no enhancement when the formula 490/a was not followed when heating in an air furnace for only 1 minute. Example 6 illustrates the successful temperature of 490° C. for the condition of 490/a, where a=1 minute.
TABLE I |
__________________________________________________________________________ |
VOC (mV) |
Heating |
Heating |
After Amount of VOC |
Ex. |
Temp. (°C) |
Time (min) |
Treatment |
Increase (mV) |
__________________________________________________________________________ |
4 400 1 ∼400 |
0 |
5 450 1 405 -67 |
6 490 1 633 161 |
7 400 1.5 630 189 |
8 400 2 800 410 |
9 450 2 720 248 |
10 350 4 457 57 |
10 350 4 692 302 |
11 320 6 609 148 |
12 300 8 550 78 |
13 250 8 580 162 |
14 300 8.5 712 251 |
15 300 9 697 226 |
16 290 9 728 251 |
17 280 9 605 215 -18 275 10 733 315 |
19 275 11 580 112 |
20 300 12 640 179 |
21 275 14 561 121 |
22 240 20 750 278 |
__________________________________________________________________________ |
These examples revealed that, for an air furnace heat treatment between about 250° and 350°C and for about 2 to 20 minutes, VOC enhancement is achieved. Further, Examples 6 and 7 demonstrate, in contrast with Examples 4 and 5, that for time a equal to less than 2 minutes, the temperature must be at least 490/a°C
In the comparison of Examples 10 and 10', Example 10 appears to be anomalous, possibly due to nonuniform doping. A third preparation of a cell heated at 350°C for 4 minutes produced an enhancement comparable to that of Example 10', supporting the conclusion that Example 10 is not a representative example.
To illustrate that a controlled atmosphere furnace will provide enhancement with 1 to 2 minutes heating in the presence of oxygen without following the formula 490/a, in this example the cell was prepared similarly to that of Example 1, but the semiconductor material was placed after etching in an evacuated ampoule in a furnace set at 350°C The vacuum level was less than 10-4 torr, a level believed to be sufficiently lacking in oxygen as to be essentially non-oxidizing. The material was left there for 12 minutes to permit its temperature to rise to 350°C Thereafter the ampoule was broken to expose the sample to air while retaining the temperature at 350°C After 1 minutes in the presence of O2, the sample was removed from the furnace and cooled to room temperature. The cell was completed, and VOC when exposed to light in a manner similar to Example 1 was found to be 695 mV. A similar cell wherein the semiconductor material was not heated at all had a VOC of only 472 mV.
To illustrate that the process of the invention can not be applied by merely using any one of the known semiconductor materials, a cell similar to that described in Example 1 was prepared for each of these examples, except that the semiconductor material was cadmium sulfide, the homolog of CdTe. Polishing and etching was achieved using 5% bromine and 95% methanol from the cell of Example 24, but etching was omitted in Example 25.
In Example 24 without heat-treating, the VOC was 120 mV. The cell was destroyed by grinding off the gold, and the semiconductor layer was heat-treated in an air furnace at 300°C for 8 minutes. The VOC after heat-treatment was 9 mV, indicating a failure in the solar cell.
In Example 25, the VOC before heat-treating was 9.8 mV, a barely acceptable value. After heat-treating again at 300°C for 8 minutes, VOC was 10.5 mV, an increase of only 0.7 mV.
Example 24 was repeated, except that silver was used as the barrier metal layer. VOC before heat-treating the CdS was 90 mV, and after heat-treating for 8 minutes at 300°C was only 0.8 mV.
The invention has been described in detail with particular reference to certain preferred embodiments thereof, but it will be understood that variations and modifications can be effected within the spirit and scope of the invention.
Patent | Priority | Assignee | Title |
4445269, | Aug 27 1981 | The United States of America as represented by the Scretary of the Army | Methods of making infrared photoconductors with passivation control |
4873198, | Oct 21 1986 | First Solar, Inc | Method of making photovoltaic cell with chloride dip |
5296384, | Jul 21 1992 | Raytheon Company | Bake-stable HgCdTe photodetector and method for fabricating same |
5312772, | Aug 06 1988 | Seiko Epson Corporation | Method of manufacturing interconnect metallization comprising metal nitride and silicide |
5401986, | Jul 21 1991 | Raytheon Company | Bake-stable HgCdTe photodetector with II-VI passivation layer |
5849102, | Feb 28 1996 | LONGITUDE SEMICONDUCTOR S A R L | Method of cleaning a surface of a semiconductor substrate by a heat treatment in an inert gas atmosphere |
6743294, | Jun 16 1995 | SINGLE CRYSTAL TECHNOLOGIES, INC | Continuous crystal plate growth process and apparatus |
Patent | Priority | Assignee | Title |
3703408, | |||
3769558, | |||
3793069, | |||
3811954, | |||
3888697, |
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