A traffic coordinator is disclosed which utilizes a master unit and a plurality of secondary units wherein the secondary units are positioned at artery cross streets for controlling the main artery traffic in a coordinated fashion. Both the master unit and secondary units contain microprocessors for calculating parameters utilized in the coordination system. The coordination system may be installed in already existing timer-controlled intersections and serves to provide a highly efficient real time control of artery green bands, offsets and splits to achieve optimum traffic flow.
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105. Apparatus for coordinating a plurality of traffic signal lights along an artery having a plurality of side street intersections comprising:
(a) means for storing in sequence a plurality of cycle length values, said cycle length values associated with platoons of traffic moving along said artery, and (b) means connected to said storing means for retrieving said cycle length values in sequence and for individually and sequentially controlling said plurality of traffic signal lights to effect said retrieved cycle length values at each associated intersection as said platoons of vehicles move along associated intersections of said artery to thereby coordinate said traffic along said artery.
85. A method of coordinating a plurality of traffic signal lights associated with side street intersections for controlling traffic at said intersections and along a common roadway comprising steps of:
(a) storing a plurality of cycle length values, said cycle length values associated with groups of vehicles moving along said roadway, (b) automatically retrieving said stored cycle length values, and (c) automatically, sequentially and individually controlling said traffic signal lights in response to said retrieved cycle length values at offset times corresponding to the position along said roadway of the side street intersections, thereby producing cycle lengths at said intersections corresponding to said retrieved cycle length values.
1. A coordinator for use with a plurality of controllers for coordinating traffic at least along an artery, each controller associated with a side street intersection for controlling traffic signals at said intersection, said coordinator comprising:
(a) means for storing a plurality of values corresponding to cycle lengths, said cycle length values associated with platoons of traffic moving along said artery, and (b) means connected to said storing means for retrieving said cycle length values and for sequentially controlling each of said plurality of controllers in an individual manner to effect said retrieved cycle length values at each associated intersection as said platoons of vehicles move along associated intersections of said artery to thereby coordinate said controllers and traffic along said artery.
101. A method of coordinating a plurality of traffic signal lights positioned along a common roadway for controlling said roadway and a plurality of side street intersections comprising the steps of:
(a) sensing vehicles along said roadway to provide input signals to a master unit, (b) calculating in said master unit cycle length values in real time corresponding to said sensed vehicles, (c) transmitting said cycle length values to a plurality of secondary units, each secondary unit associated with a side street intersection, (d) storing said cycle length values in said secondary units, (e) individually retrieving said cycle length values in said secondary units for sequential application as force-off commands to associated controllers controlling said traffic signal lights at said side street intersections, and (f) generating said force-off commands at said secondary units at offset times corresponding to the position of the secondary units along said roadway.
73. A traffic coordination system controlling vehicle traffic flow along a main traffic artery and a plurality of side street intersections comprising:
(a) a master unit having programmable computing means, (b) at least one inbound and one outbound volume vehicle detector each measuring vehicles entering said artery and for providing inbound and outbound vehicle volume signals to said master unit in response to inbound and outbound vehicle volume respectively, said inbound and outbound vehicle detectors positioned proximate opposite extremities of the artery under control by said coordination system, (c) at least one inbound and one outbound occupancy vehicle detector for providing inbound and outbound occupancy signals to said master unit in response to inbound and outbound vehicle occupancy respectively, said inbound and outbound occupancy detectors positioned within said artery and removed from said corresponding inbound and outbound volume detectors, (d) a plurality of secondary units each unit interconnected to said master unit and having means for receiving and storing data therefrom, (e) said master unit computing means comprising means for calculating a cycle length value for artery traffic in response to received vehicle volume and occupancy signals, (f) a plurality of controllers, one controller connected for operating traffic signals at each side street intersection of said artery, and (g) a secondary unit connected to each controller for providing traffic signal control commands thereto in response, at least in part, to data received and stored from said master unit, whereby traffic is coordinated along said artery in response to sensed vehicle flow.
119. A traffic coordinator for use on a roadway having a plurality of intersections and traffic lights and means for sensing vehicle traffic along said roadway, said sensing means including means for generating signals indicative of said sensed traffic, said coordinator comprising:
(a) a master unit comprising: (i) input interface means for receiving said signals, (ii) data processing means connected to said input interface means, said data processing means including a microprocessor, data memory storage means and program memory storage means for programming said microprocessor, said data processing means operable for calculating a cycle length value in response to said received signals and for generating cycle length signals corresponding thereto, (iii) output interface means connected to said data processing means for transmitting said cycle length signals, (b) a plurality of secondary units, one secondary unit associated with each of said intersections along said roadway and associated with an offset time from a preselected reference, each secondary unit comprising: (i) input interface means operable for receiving said transmitted cycle length signals from said master unit, (ii) data processing means connected to said input interface means of said secondary unit and including a microprocessor, data memory storage means and program memory storage means for programming said microprocessor, said data processing means of said secondary unit operable for storing representations of said cycle length signals and for retrieving same in the order of storage for generating force-off command signals corresponding to said cycle length signals at time determined by said associated offset times, and (iii) output interface means connected to said data processing means of said secondary unit for receiving said force-off command signals and for applying same to actuate traffic lights at said associated intersections. 2. A coordinator as recited in
means for receiving input signals, and means cooperating with said storing means for calculating said plurality of cycle length values in response to said input signals, whereby said stored cycle length values correspond to said calculated cycle length values.
3. A coordinator as recited in
input signals form a master unit which further comprises means for transmitting said calculated cycle length values, and said means for storing and retrieving said plurality of cycle length values form a plurality of secondary units, each secondary unit associated with one of said plurality of controllers and each secondary unit further comprises means for receiving said transmitted calculated cycle length values from said master unit.
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(a) to monitor a gap time between successive volume signals, (b) to compare the gap time to a reference time to determine when the gap time exceeds the reference time to establish a gapout condition, (c) to count the number of volume signals corresponding to traffic actuations, AR, by vehicles during at least the artery red band time immediately preceding the artery green band time, (d) to multiply the number AR by a red headway time ER to form a product TR, (e) to determine if a gapout condition occurs prior to a maximum green band time, and, (i) to determine the quantity TG =(AG)(EG) where, AG is the number of actuations during the green band time prior to the occurrence of the gapout condition, and EG is a green headway time, and (ii) to compare the quantity SG =TR +TG to the time at which the gapout condition occurs from the start of the green band time, and (iii) to select the larger of the two compared times as the calculated green band time to establish said cycle length for transmission to said secondary units, and (f) to restrict the cycle length value transmitted to said secondary units to correspond to a green band time less than or equal to said maximum green band time.
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TR =(AR +LCP)ER 49. A coordinator as recited in
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means for sensing vehicles entering said artery in both inbound and outbound directions to provide inbound and outbound direction signals, and means for selecting an inbound, outbound or average mode in response to said inbound and outbound direction signals.
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86. A method as recited in
(a) receiving input signals, and (b) automatically calculating from said received input signals said cycle lengths values.
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(a) sensing vehicles within said coordinated roadway, (b) generating additional input signals in response to said vehicles sensed within said coordinated roadway, and (c) calculating said cycle length values from said input signals and said additional input signals.
90. A method as recited in
(a) calculating a modification of said offset times in response to said additional input signals, and (b) controlling said traffic light signals at said modified offset times.
91. A method as recited in
(a) sensing vehicles within said coordinated roadway, (b) generating additional input signals in response to said vehicles sensed within said coordinated roadway, (c) calculating a modification of said offset times in response to said additional input signals, and (d) controlling said traffic light signals in response at said modified offset times.
92. A method as recited in
calculating one cycle length value in response to said input signals, calculating another cycle length value in response to said additional input signals, and said method further comprising the steps of selecting the larger cycle length value from said one and another cycle length values and storing said selected larger value for coordinating said traffic signal lights.
93. A method as recited in
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(a) sensing vehicle volume entering said coordinated roadway for providing input vehicle volume signals, and (b) calculating the cycle length value in real time from said input vehicle volume signals for the group of vehicles being sensed, whereby said stored cycle length values correspond to groups of sensed vehicles entering said coordinated roadway.
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106. Apparatus as recited in
means for receiving input signals, and means cooperating with said storing means for calculating said plurality of cycle length values in response to said input signals, whereby said stored cycle length values correspond to said calculated cycle length values.
107. Apparatus as recited in
said calculating means and said means for receiving input signals form a master unit which further comprises means for transmitting said calculated cycle length values, and said means for storing and retrieving said plurality of cycle length values form a plurality of secondary units, each secondary unit associated with one of said plurality of side street intersections and further comprises means for receiving said transmitted calculated cycle length values from said master unit.
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120. A coordinator for coordinating traffic at least along an artery having traffic lights at a plurality of intersections along said artery, said coordinator comprising:
(a) a digital computer means for calculating values corresponding to cycle length green times, said green time values calculated in real-time in response at least to traffic flowing along one intersection of said plurality of intersections of said artery, (b) means connected to said calculating means for controlling traffic signals at said one intersection for implementing a green time value equal to at least said calculated green time value at said one intersection to thereby define a platoon of vehicles at said one intersection, (c) means for setting a plurality of offset times, each offset time corresponding to the distance of each of the remainder of said plurality of intersections from said one intersection, each offset time being a predetermined constant value in units of time, and (d) means for controlling each of said plurality of traffic signals at the remainder of said plurality of intersections of said artery in a sequential and individual manner to implement an artery green time value equal to at least said calculated green time value, said green time value implemented at said fixed offset times at each of said remainder of intersections as platoons of vehicles approach said intersections to thereby coordinate traffic along said artery. 121. A coordinator as recited in
favor inbound and outbound traffic flow. 122. A coordinator as recited in claim 121 wherein said calculating means are operable in said average mode to automatically calculate optimum offset values corresponding to optimum green time values to substantially equally favor traffic flow in both said inbound and outbound directions. 123. A method of coordinating a plurality of traffic signal lights associated with a plurality of side street intersections for controlling traffic at said intersections and along a common roadway comprising the steps of: (a) automatically calculating a green time value in a digital computing means, said green time value calculated in real-time in response at least to input signals indicative of sensed traffic flowing along said common roadway at one of said plurality of intersections, (b) implementing a green time value equal to at least said calculated green time value along said common roadway at said one intersection substantially simultaneously with said calculating step by controlling traffic signal lights at said one intersection to thereby define a platoon of vehicles moving along said common roadway at said one intersection, (c) setting a plurality of offset times for each of the remainder of said plurality of intersections, said offset times being predetermined constant values in absolute units of time and being constant from one cycle to another and independent of said calculated green time values, (d) automatically implementing a green time value equal to at least said calculated green time value at the remainder of said plurality of intersections by sequentially controlling traffic signal lights at the remainder of said intersections to effect at least said calculated green time value along said common roadway at said predetermined offset times, and (e) while maintaining said offset times at said predetermined value, repeating steps (a), (b) and (d) above to define another platoon of vehicles for coordinating flow of sequential platoons of vehicles along said common roadway. 124. A method as recited in claim 123 wherein said input signals represent sensed vehicles entering said roadway in both an inbound and outbound direction and wherein said calculating step is done in response to said input signals to provide a directional coordination of said traffic signal lights in response to sensed inbound vehicles and sensed outbound vehicles. 125. A method as recited in claim 124 further comprising the step of automatically calculating an average offset value for each of said plurality of intersections, said average offset value calculated to provide optimum green band times to substantially equally favor traffic in said inbound and outbound directions. 126. A method as recited in claim 123 further comprising the steps of: (a) sensing vehicles within said coordinated roadway, (b) sensing additional input signals in response to said vehicles sensed within said coordinated roadway, (c) calculating a modification of said predetermined offset times in response to said additional input signals, and (d) controlling said traffic signal lights in response to said modified offset times. 127. Apparatus for coordinating a plurality of traffic signal lights along an artery having a plurality of side street intersections comprising: (a) programmable digital computer means for sequentially determining green time values, each green time value being part of a cycle length value, and (b) additional programmable digital computer means connected to receive signals corresponding to said determined green time values for individually and sequentially controlling said plurality of traffic signal lights to effect cycle length values having green time values at least equal to said determined green time values at said intersections as said platoons of vehicles move across said intersections to thereby coordinate said traffic along said artery. 128. An adaptive traffic coordination system for use on a roadway having a plurality of intersections and traffic lights and means for sensing vehicle traffic along said roadway, said sensing means including means for generating signals indicative of said sensed traffic, said coordinator system comprising: (a) a programmable digital computing means for receiving said signals and for calculating in real-time green time values in response to said received signals, said green time values tailored to individual groups of vehicles entering said roadway as determined by said received signals, and (b) additional programmable digital computing means positioned at and associated with said intersections for controlling traffic lights at said intersections by sequentially effecting cycle lengths having green time values at least equal to said calculated green time values at said traffic lights thereby maintaining flow of said groups of vehicles along said roadway. 129. An adaptive coordination system as recited in claim 128, wherein said additional programmable digital computing means are operable for controlling said traffic lights to effect cycle phases tailored to each individual intersection. 130. An adaptive traffic coordination system comprising: (a) a first computing means for receiving signals indicative of vehicles traveling along a traffic artery and for calculating green time values in response thereto, (b) said first computing means having: (i) a central data processing unit, (ii) data memory storage means for storing data utilized by said central data processing unit, and (iii) program memory storage means for storing programs controlling operation of said central data processing unit, (c) a plurality of second computing means positioned along at least some intersections of said artery for controlling traffic lights at said at least some intersections in response to said calculated green time values, each of said second computing means having: (i) a central data processing unit, (ii) data memory storage means for storing data utilized by said central data processing unit, and (iii) program memory storage means for storing programs controlling operation of said central data processing unit; whereby said green time values are tailored to individual groups of vehicles moving along said artery and said traffic lights are coordinated to maintain traffic flow of said individual groups. |
BACKGROUND OF THE INVENTION
Field of the Invention
Description of the Prior Art
SUMMARY OF THE INVENTION
BRIEF DESCRIPTION OF THE DRAWINGS
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
SYSTEM OVERVIEW
MODULE DESCRIPTION AND DEFINITIONS
Master Unit 50
Directional Module
System Module
Inbound and Outbound Modules
Volume Module
Occupancy and Speed Modules
Average Module
Display Module
Secondary Unit 40
Split 1 and Split 2 Modules
Offset Module
Display Module
Selector Position
Interface Module-Master and Secondary
SYSTEM HARDWARE DESCRIPTION
FUNCTIONAL DESCRIPTION OF THE MASTER UNIT
Overall Description
Real Time Traffic Sampling
Master Cycle Length Computation
Volume Computations
Occupancy Computation
Average Cycle Length Selection
Directional Commands
Commands Based Upon Occupancy
Output Decisions Update Intervals
Manual Override
System Percent Average
Display
FUNCTIONAL DESCRIPTION OF THE SECONDARY UNITS
Average Offsets
Transition Response
Force Off Operation
Free Operation
Flash/Pre-Emption Operation
Timer Monitoring
Standby Operation
Automatic Input Test
SOFTWARE DESCRIPTION
MASTER UNIT
Update
PREXMIT
COMPOSE
GAPOUT
GAPEND
SYNCEND
GRNUPDIR
REDTIME
GRNIN
DIRSEL
CONVRT (Calls OCCSEC)
GRNUPAVG
MANUAL CYCLE
CTRMNTR (Counter Monitor)
CYCTWS
RANAVG
QUEUE ROUTINES
SECONDARY UNIT
Overview of Secondary Operation
Cycle Execution
Transitions
Queue Recovery
Timing
Dual Counter Concept
Direction Change Processing
Overall Block Diagram of Secondary Unit
LATCHES
LAMPFORM
FORMATCP (Format, Complement, Pack)
LDECLP (Load ECLP)
DECISION
TRANSMOD
LIMITCKK
NUMPHASE (Phase Number)
SECONDARY UNIT (Continued)
SPLITIME
PHDR (Phase Decrement)
PHTMSET, TWS, SPLITSUM, PERSEC
TRANSITION
LENGTHEN
MODO
SECSYNC
CKRANG
QRECOV (Queue Recovery)
STORE
AV/DIR (Average to Directional)
QUEUE
SHORTEN
OFFSEC, OFFMAS
CTRMAS
CTRSEC
FREEOP
MONITOR
SCREEN
STREETPH
GETPHASE
APPENDIX
Master Unit
Secondary Unit
1. Field of the Invention
The invention is in the field of traffic coordinators, particularly those coordinators utilized for controlling arterial systems.
2. Description of the Prior Art
Many different types of traffic control systems have been devised in the prior art to meet particular traffic needs. Typically, traffic controllers are located at an intersection and may be either pretimed or traffic actuated devices. Many attempts have been made to coordinate the operation of the various controllers. Simple systems utilize time clocks or simple program units to coordinate a plurality of timers to thereby permit progressive traffic flow patterns. More sophisticated systems utilize a separate master coordinator (traffic computer) unit which may be programmed to control arterial systems or a complete grid network. Examples of such prior art systems are shown, for example, in U.S. Pat. Nos. 3,818,429, 3,660,812, 3,506,808, 3,258,745, 3,307,146 and 3,252,133. Typically, traffic control systems provide means for determining cycle lengths, offset and split information by utilizing either traffic actuated vehicle detectors to monitor traffic flow or stored parameter programs set to correspond to historical data for the intersection or artery under consideration. U.S. Pat. No. 3,258,745, for example, illustrates a traffic control system for an artery utilizing traffic actuating controllers and permitting adaptive control of split data in response to vehicle presence. U.S. Pat. No. 3,506,808, for example, discloses the utilization of both volume and occupancy detectors to determine appropriate cycle length in an analog computing and control system. Digital processing techniques for a traffic control system are shown, for example, in U.S. Pat. No. 3,818,429. Most of these prior art systems, however, lack the flexibility necessary to control a large number of traffic conditions, are complicated to install and control no provisions for coordinated operation during communication breakdown. Additionally, prior art coordinated traffic systems do not permit a means for achieving different cycle lengths simultaneously throughout the coordinated system to follow a platoon of vehicles through the system. As a consequence, cycle length is typically changed throughout the entire system at one time so that the coordinated system cannot truly operate to optimize the traffic flow pattern for the different platoons travelling therein.
It is therefore an object of the invention to provide a traffic coordination system which overcomes the disadvantages of the prior art and provides an economical and easily installed system for controlling arterial traffic.
Another object of the invention is to provide a traffic coordinator which operates in a real time to vary cycle length in a rippled fashion such that new cycle length information is sequentially applied at the controlled intersections to insure efficient movement of each of a plurality of platoons of cars through the system.
Another object of the invention is to provide a distributed processor coordination system such that system commands and calculations applicable to the entire artery are done in a single master unit whereas the interpretations of these commands particularized to the condition at the individual controlled intersections are carried out in secondary units by separate microprocessor means.
Yet another object of the invention is to provide a data communication system for use in a distributed processor traffic coordinator.
Yet another object of the invention is to provide a means for enabling coordinated traffic control during a breakdown in communication between a master unit and a plurality of secondary units in a coordinated system.
Another object of the invention is to provide a traffic coordinator sensitive to both volume and occupancy values within a controlled artery to achieve a real time calculation and selection of cycle lengths for each platoon of vehicles entering the artery.
In accordance with the invention, an arterial traffic coordinator is provided for use with a plurality of controllers and traffic detectors. Each controller is associated with a side street intersection for controlling traffic signals at the intersection. The detectors sense vehicle volume into the artery and vehicle occupancy within the artery for providing corresponding volume and occupancy signals. The coordinator comprises a means for receiving the volume and occupancy signals, a means for calculating an optimum cycle length in response to the received volume and occupancy signals and a means for storing the calculated cycle lengths corresponding to each platoon of vehicles. The coordinator further comprises means, connected to the storing means for retrieving the calculated cycle lengths, and for sequentially controlling the plurality of coordinators to effect the calculated cycle length at each associated intersection so that each platoon of vehicles moving through the intersection is controlled by its own optimum cycle length thereby achieving a coordinated traffic control.
The invention further provides for a means of changing the cycle length without the necessity of changing offset. To accomplish this end offset times are settable in seconds of travel time as opposed to percentages of cycle lengths. In this manner a constant speed through the system may be obtained while permitting variable cycle lengths.
The invention is further characterized as a distributed processing coordination system comprising a programmable master unit and a plurality of programmable secondary units. The master unit calculates system parameters such as cycle length and directional information in response to sensed volume and occupancy values. The secondary units response to the received master information, but act in accordance with separate program instructions and in accordance with individual input parameters corresponding to the associated intersection. The independent processing capability of the secondary units prevents undesirable rapid and/or blind response to information from the master unit.
Further subject matter disclosed herein is the subject of a copending application of Marshall B. McReynolds and Jack D. VanTilbury, Ser. No. 843,730, filed Oct. 19, 1977 and assigned to the same assignee as herein and entitled "Average/Mode Traffic Control System". For directional inbound and outbound modes, the coordinator operates to calculate a specific cycle length to each platoon entering the artery and the calculated cycle length is rippled through the artery as the platoon of vehicles moves through the intersections. In the average mode of operation an optimum cycle length is calculated to effect substantially equally by favored traffic flow in each of two directions. More generally, an average mode apparatus is provided which comprises means for establishing a directional offset time for each of the intersections which is proportional to the distance of the intersection from a reference intersection, as for example the first or last intersection in the artery. The apparatus further comprises means for dividing a reference cycle length time into each of the directional offset times for determining a remainder fraction, means for selecting an average-mode offset time for each intersection from one of the group of approximately zero percent and approximately fifty percent of the reference cycle length time in accordance with the value of the remainder fraction, and means for controlling traffic signal lights at the intersections by utilizing the selected average-mode offset times as offset values with respect to the reference intersection.
These and other objects of the invention will become clear in relation to the foregoing specification taken in conjunction with the drawings wherein:
FIG. 1 is a diagrammatic illustration of a typical artery having side streets and showing the interconnection of the master and secondary units forming the coordination apparatus;
FIG. 2 illustrates the orientation of FIGS. 2A and 2B in a master unit;
FIGS. 2A and 2B are front plan views of the modules employed in accordance with the invention;
FIG. 3 is a front plan view of a secondary unit illustrating the various front panel controls of the modules utilized in accordance with the invention;
FIG. 4 is a block schematic diagram of the different types of modules utilized in the master and secondary units;
FIG. 5 is a schematic diagram of the central processor utilized in the master and secondary units in accordance with the invention.
FIG. 6A is a schematic diagram of a random memory storage means utilized in the master and secondary units;
FIG. 6B is a schematic diagram of a programmable read only memory utilized in the master and secondary units;
FIG. 7 is a schematic diagram of a switch module in accordance with the invention;
FIG. 8 is a schematic diagram of the LED display circuitry;
FIGS. 9A-9D are schematic drawings for the circuitry in the display module of the master and secondary units;
FIG. 10 is a schematic drawing of the master calling circuitry within the interface module of the master unit;
FIG. 11 is a schematic drawing of the circuitry within the interface module of a secondary unit;
FIG. 12 shows a timing diagram depicting cycle length computation utilized by the master unit;
FIG. 13 is an overall flow diagram of the operation of the master unit in accordance with the invention; and
FIG. 14 is a flow chart of the main driver routine for the operation of the secondary unit in accordance with the invention.
As illustrated in FIG. 1, the traffic control system of the instant invention may most advantageously be utilized to control artery traffic as shown in FIG. 1. A main artery 10 which may comprise a four lane highway, two inbound lanes and two outbound lanes, for example, is shown intersected by a plurality of side streets 12a-12e. Although only five side streets are shown it is readily understood that the number may be greater or less than five to control various lengths of artery traffic. Artery 10 comprises an inbound roadway 14 and an outbound roadway 16. At the beginning of inbound roadway 14 are positioned two inbound volume detectors 18a and 18b which may be conventional vehicle traffic detectors actuated by the vehicle. Naturally, if the inbound roadway consists of only one lane, then only a single detector 18a is employed. Similarly, at the beginning of the outbound road 16 two outbound volume detectors 20a and 20b are positioned to detect vehicle passage. Additional vehicle detectors are positioned between the inbound volume detectors and outbound volume detectors as for example the inbound occupancy detectors 22a and 22b and the outbound occupancy detectors 24a and 24b.
At the intersection of each sideway street 12 with the main artery 10 there is shown a traffic signal 30a-30e respectively. It is understood that the traffic signal at each intersection may comprise a plurality of lights, one governing each lane, and additional lights directing right and left turns, pedestrain crossing, leading greens and so forth as may be desired. The various traffic flow patterns governed by the signals are referred to as phases. Each traffic signal is controlled by means of associated controllers 32a-32e which may, for example, be of conventional type such as the Crouse-Hinds model DM-200. Controllers 32a-32e are effectively timers which serve to energize the various traffic signals 30a-30e and are capable of being forced off (force to red) after selectable time periods. The issuance of force-off commands to the controllers is, in fact, the mechanism by which coordination is obtained. For a detailed explanation of the operation of an exemplary controller, reference is made to the Crouse-Hinds Technical Data Bulletin, TDB-106T, November 1976, incorporated herein by reference. The coordination system described herein may coordinate any of a large number of types of controllers, and is designed in accordance with specifications of the National Electrical Manufacturers Association (NEMA) as set forth in the Standards Publication, NO. TSI-1976. Secondary units 40a-40e connected respectively to controllers 30a-30e serve to override the normal controller function by issuing force-offs as dictated by coordinated master/secondary system considerations. Each secondary 40a-40e is connected by a plurality of conductors 42a-42e to each associated controller 32a-32e, respectively. Each secondary unit 40a-40e is connected to a master unit 50 by means of a communication path 52. The communication path 52 may comprise either multi-conductor cables or conventional telephone interconnections so as to permit relatively easy installation into existing traffic control equipment.
The controllers 32a-32e may be of actuated type having associated traffic detectors for the side streets. The traffic control system in accordance with the invention effectively coordinates the operation of all of the conventional controllers 32 since the force-off information is now provided by the controllers associated secondary unit 40 as directed by the master unit 50. Additionally, each controller 32 is fed a large maximum artery green time (MAX II), and a continuous recall is made in the controller 32 to green artery phase. As a result the controllers 32 will always permit artery green unless forced-off by a secondary unit command.
The master/secondary communication scheme is a simplex-type communication. The master unit 50 operates in a broadcast mode to transmit data to all secondaries, each of which responds to the incoming data.
Lines L18a-L18b are associated with detectors 18a and 18b respectively and provide vehicle sense data to the master unit 50. Similarly, lines L20a-L20b, L22a-L22b, and L24a-L24b are connected to master unit 50 to provide corresponding vehicle detection information thereto. Although these input lines to the master unit 50 are shown connected to vehicle sensing detectors, it is clear that input signals to the master unit may originate from other sources such as weekly programmers or the like to set up desired platoons on the artery. The coordinator, in accordance with one aspect of the invention, may thus store externally generated cycle length values (whether or not generated from vehicle sensing means) and apply them in sequence to control the traffic light signals at each intersection.
The front panel controls and interconnections of the master and secondary units are shown in FIGS. 2 and 3 respectively. The master unit 50 is seen to comprise a plurality of separate modules labeled inbound, volume, outbound, system, direction, interface, display, average, occupancy and speed. Secondary unit 40 comprises a plurality of modules labeled interface, display, offset, split 1 and split 2. Both the secondary unit 40 and the master unit 50 contain as interface module and a display module. The remaining modules in both the secondary and maaster units may be characterized as switch modules in that they primarily comprise a plurality of thumbwheel switches (TWS) which may be set by the operator. Additionally, these switch modules comprise individual indicators to provide various output data.
The various thumbwheel switch settings which provide input data and the various indicators which provide output data are explained more fully below wherein the various terms adjacent to the switches and indicators are described.
PAC Master Unit 50Thumbwheel switches are provided on the direction module for setting the set points utilized in determining whether the coordinated system should operate in the INBOUND, OUTBOUND or AVERAGE mode. Actuations on the inbound (IN) and outbound (OUT) volume detectors are utilized in the formula IN/(IN+OUT)×100, and compared to the percentage values selected on the IN and OUT thumbwheel switches to select among the three possible modes.
The minimum green time is also settable on the direction module of the master unit. The minimum green is settable in seconds and is an overriding criteria for insuring that the arterial green period always exists for the settable minimum time.
The average sample time in minutes is settable on the direction module for two conditions. If a decision has been made to change from directional to average during a given cycle time the "INTO" thumbwheel switch selects a time period over which the decision must persist as dictated by persistent traffic conditions. The master unit will thus not enter into an average mode of operation from a directional mode unless the conditions dictating the change persists for the time period set on the "INTO" thumbwheel switch. Similarly, the master unit remains in the present average cycle length for a time period settable by the thumbwheel switch labeled "IN".
The maximum side street green time is settable on two sets of thumbwheel switches, each set comprising three thumbwheel switches defining time periods set in seconds. The first set of switches is for the Split 1 condition (S-1) whereas the second set of switches corresponding to a larger side street time is for the Split 2 condition (S-2). An indicator is energized corresponding to the selected split. The master unit will automatically select the Split 2 condition if a predetermined green band is exceeded. The settable maximum side street time is essentially the Red phase (artery) time.
The system module also contains a set of thumbwheel switches utilized to set the maximum green period for the artery green as given in seconds. This maximum green period is an overriding criteria similar to the minimum green period.
The system module also contains three thumbwheel switches labeled Yin, Yout and X. These thumbwheel switches are utilized to convert occupancy levels as measured by the occupancy detectors into cycle length in seconds. The Y values correspond to a percentage value having a cycle length equal to the maximum green time setting, and the X switch corresponds to a percentage of cycle length corresponding in time to the minimum green time in seconds.
The inbound and outbound modules are essentially identical and apply to the inbound and outbound directions respectively. The upper pair of thumbwheel switches is utilized to set a time value in which an initial gap time between cars is linearly reduced to a minimum gap time between cars. Thumbwheel switches are separately provided to set both the initial gap in seconds and the minimum gap in seconds as well as the time to reduce in a linear fashion from the initial gap to the minimum gap. If the gap between any two cars exceeds the time allowed for the gap then a "gap out condition" occurs which, under certain circumstances, terminates the green artery phase.
Separate thumbwheel switches are also provided to allow a time period settable in seconds for the last car passage. This time interval effectively enables a car just crossing a volume detector to pass through the intersection prior to its turning red. The last car passage time is thus added to a green band calculated on volume figures and/or occupancy figures. After a gap out condition is recognized, a time which is equal to the front panel setting of the last car passage is typically added to the green band after which the green period terminates. A last car passage time of at least two seconds is provided even if the front panel thumbwheel switches are set to less than two seconds.
The volume module is divided into an inbound portion and an outbound portion wherein each portion contains pairs of thumbwheel switches labeled red and green. These thumbwheel switches correspond to headway settings in seconds for the red artery time and the green artery time in both inbound and outbound directions. The red headway time essentially corresponds to the amount of time alloted a car which passes a volume detector during an artery red. The headway time given for a vehicle actuating a volume detector during the green period (green headway) is typically less than the red headway time inasumch as the vehicle is already moving and less time would be required for it to enter and pass through the intersection.
The occupancy and speed modules contain corresponding sets of thumbwheel switches to permit the master unit to direct speed changes to the secondary units. In principal one wishes to increase the traffic flow speed to compensate for increased occupancy values. A change in the speed of the system will effectively increase or decrease the offset of the secondary units from the offset figure initially put in on the secondary unit thumbwheel switches. Each occupancy value, expressed in percent of occupancy, on the master Occupancy module corresponds to an adjacent percent speed change on the Speed module of the master unit. Four separate speed modifier settings are possible. 100% indicates no modification; 101% to 199% indicates an increase while 000 to 099% indicates a decrease in system speed. The effective speed modification percentage is indicated by an energized indicator (LED) adjacent to the selected thumbwheel switches.
The average module is utilized to set four different average cycle lengths in seconds, one of which is selected by the master unit during the AVERAGE mode of operation. A maximum cycle length of 299 seconds may be selected. One of the four presettable cycle lengths is selected depending upon which one is closest to the calculated value of (IN+OUT)/2 where the IN and OUT values are the larger of either the volume cycle length value or occupancy cycle length value. The presettable values on the average module may be optimally determined using a nomograph supplied by TESCO of Alexandria, Virginia and described in U.S. Pat. No. 4,122,994 incorporated herein by reference.
The numeric display located on the face of the display module indicates the following parameters as enabled by the adjacent select switch. For cycle lengths in excess of 199 seconds a +(plus) is activated indicating numbers of 200 to 299. For parameters expressed in percentage a - (minus) is activated. A flashing display denotes manual override operation.
Ten selectable parameters from throughout the unit are available and appear on the 21/2 digit display of this unit.
The ten position selector shall be assigned as follows:
| ______________________________________ |
| 3 An alternate display of Vol./Ocp. |
| in seconds |
| 2 An alternate display of Occupancy ex- |
| pressed in Sec./% INBOUND |
| 1 Green band in seconds derived |
| from volume |
| 0 Present effective green band in seconds |
| 9 Green band in seconds derived |
| from volume |
| 8 An alternate display of Occupancy ex- |
| pressed in Sec./% OUTBOUND |
| 7 An alternate display of Vol./Ocp. |
| in seconds |
| 6 Gap value in seconds and |
| tenths of seconds |
| 5 Present effective cycle length |
| in seconds |
| 4 An alternate display of Tr in Sec./ |
| ##STR1## |
| ______________________________________ |
This computation is based on IN and OUT vehicle counts per each cycle.
PAC Split 1 and Split 2 ModulesThe Split 1 module is utilized to allow setting of various force-off times in seconds for associated phases of the intersection. The top thumbwheel switch is reserved for the artery phase whereas the bottom three sets of thumbwheel switches are reserved for side street phases. The Split 2 modules is essentially identical to the Split 1 module although different force-off times may be utilized. Typically, the Split 2 module has a longer side street service time for the arterial traffic flow which may correspond also to a larger green time dictated by the master unit.
The phase thumbwheel switches permit association of the artery phase (as well as the side street phases) from the secondary unit 40 to the controller without the need for special logic circuits or wiring changes. Identical secondary units 40 may thus be employed for use at intersections wherein controllers have any assignment of artery and side street phases.
The offset module of the secondary unit has a plurality of thumbwheel switches for setting the offset time for inbound and outbound traffic with respect to a reference point. The reference point may, for example, by any point in the system not necessarily physically associated with the master unit location and is typically selected to be at the first intersection for inbound traffic flow or at the first intersection for outbound traffic flow. The offset is set in seconds by simply dividing the distance from the reference point by the velocity of traffic flow. Percent offset may also be selected during the average mode of operation utilizing the two thumbwheel switches provided in the offset module. Indicators are energized adjacent the inbound and outbound offset directions depending upon which is in effect at the time. Additionally, a percent and automatic indicator are provided to correspond to the percent offset and for the automatic computation of average offset when in the Average mode.
A two and one-half (21/2) digit numeric display is provided on the display module to indicate the following information when selected by an adjacent selector: A plus indication displayed along with the 1 in the most significant digit position implies the value 2=200.
0--Effective speed wrap in % to 199%.
1--Incrementing secondary cycle in either seconds or %.
2--Effective cycle length in seconds.
3--Offset in seconds (Difference between Master and Secondary units in seconds.)
4--Offset transition, i.e., necessary correction expressed in seconds and updated each cycle. Will normally be 0 when no transition is underway.
Incrementing arterial phase followed by decrementing side street phase intervals in seconds or %.
Positions 5 thru 9 enable settable standby cycle lengths of 50 thru 90 seconds respectively. Positions 0 thru 4 enable a standby cycle length of 40 seconds.
The standby cycle length is in effect upon initial turn on of the unit and upon a communications failure that has exceeded time out. Operation in standby is indicated by the appearance of the "minus" sign preceding the numeric display.
The interface and display modules of the secondary unit 40 comprises two I/O pin connectors 70 and 72 respectively. Similarly, the interface and display modules of master unit 50 have I/O pin connectors 80 and 82 respectively. I/O pin connector 70 of each secondary unit is interconnected to the I/O pin connector 80 of the master unit via the communication path 52 (FIG. 1), and the I/O pin connector 72 of each secondary unit is interconnected to its associated controller 32 via conductors 42. I/O pin connector 82 of the master unit is interconnected to the various vehicle detector lines L18a-b, L20a-b, L22a-b and L≧a-b. Each display module is seen to further comprise a display and a thumbwheel selector switch. The interface module of both the secondary and master units are seen to comprise, in addition to the I/O pin connectors, a plurality of manual buttons. For the master interface module manual override buttons are provided in the form of slide switches, and in the secondary interface module spring loaded pushbutton switches are provided for automatic test purposes.
FIG. 4 shows a block schematic diagram of the various modules which are represented in both the master and secondary units. Both the master 50 and secondary 40 each have an interface and display module, the front panel of which is shown in FIGS. 2 and 3 respectively. The remaining modules shown in FIGS. 2 and 3 are switch modules and are of the same general type described in detail hereinbelow. The master unit 50 and secondary unit 40 also comprise modules which are internal to the units and have no front panel access. These internal units (which may have rear panel access, for example) include a CPU module, RAM module, PROM module and power supply modules. Consequently, FIG. 4 is representative of a block diagram for both the secondary unit 40 and the master unit 50. In this connection it is emphasized that the secondary unit and the master unit each contain computing means and memory storage means. Each secondary unit is, of course, programmed identically with the necessary input parameters for each secondary unit fed into its CPU via the front panel thumbwheel switches as available on the switch modules and via connections to the master unit from the interface module. The master unit 50 is programmed to control the secondary units 40 in such a fashion as to provide a system control consistent with the design objectives as explained more fully below.
FIG. 5 illustrates the CPU module which is utilized in both the master and secondary units. The CPU module may comprise for example, an Intel Model 8080A microprocessor together with its associated clock generator Model 8224. For a complete explanation of the operation and use of the microprocessor, reference is made to the Intel 8080 Systems User Manual published by Intel Corp., Santa Clara, California and incorporated herein by reference. The WAIT output of the microprocessor is fed to two "D" flip-flops Model 4013 which are clocked utilizing the TTL phase 2 output of the clock generator. The Q output of the second series flip-flops is utilized to provide the "ready" signal to the microprocessor. The effect of the two flip-flops is to extend the allowable response time for CPU associated RAM, PROM and I/O, in order to provide reliability of operation for the overall system and to permit the use of slower, commercially available components.
Address lines A0-A15 are utilized to address various other modules and memory locations in the master and secondary units. Communications between master and secondary units utilize data lines D0-D3 which are also used for all I/O. Data lines D0-D7 are used for data communication to PROM and RAM. Address lines A10-A14 are fed to comparator, Model 14585, and are utilized to provide an I/O command signal along line 90. The I/O command signal must be present during all I/O operations. Read and write strobes are also provided from the CPU along the RD and WR lines respectively.
FIG. 6A is representative of a RAM memory module utilizing for example a plurality of 256×4 static MOS RAMs, Intel Model 2112. The chip enable and read/write inputs are provided via decoders, Model No. 14556, conditioned by address lines A8, A10-A14, the read strobe RD and write strobe WR. Data and address lines are interconnected to the memory chips in a conventional manner as shown.
An exemplary PROM module is illustrated in FIG. 6B. The module is seen to comprise a plurality of 1024×8 MOS erasable PROMs such as Model No. 2708 (Intel), and decode logic circuitry consisting of Model No. 14556 decoders and NAND gates as shown. A 12 volt regulator Model 7812 is also provided. Typically, three or four PROM circuit boards may be provided each as shown in FIG. 6B. A switch means 94 is provided to enable addressing of a desired circuit board.
A detailed schematic diagram of a switch module (inbound, outbound, etc.) is illustrated in FIG. 7. The circuit shown in FIG. 7 is positioned on a single printed circuit board and is capable of reading eight different thumbwheel switches. Within certain modules, two printed circuit boards of the type shown in FIG. 7 are required wherein any excess switch reading capabilities are ignored. For example, the outbound module of master unit 50 (FIG. 2) contains a single printed circuit board as shown in FIG. 7. The system module of the master unit, however, requires two boards with the resulting capability of reading sixteen thumbwheel switches. In practice, only twelve switches need be read so that the circuitry for the remaining four switches is not utilized.
FIG. 7A shows the position of the switches which are labeled S1-S8 and are addressed respectively by the binary number 0-7. Each switch module contains a four bit comparator 91, Model No. 14585, for example, which compares the address code along the address lines A3-A6 with a hard wired address code unique to each particular switch module location. Consequently, the address bits A3-A6 are compared with the four bit hard wired code, and, if equal, an output strobe is provided along line 92. The I/O command along line 90 is also fed as a conditioning input to the comparator 91. The output of the comparator 91 goes high whenever the address matches the hard wired address code, so that a logical 1 is placed along a line 92 and fed to NAND gate 96. A second input to NAND gate 96 comes from the read strobe RD so that its output goes low whenever the particular switch module is addressed for reading. The low signal from the NAND gate 96 is fed to an analog mux/demux Model No. MC14051 used as a three-to-eight data selector. Depending on the particular code appearing on the address lines A0-A2, one of the switches S1-S8 is selected which subsequently provides an output along the data lines D0-D3. These data lines, of course, are part of the bidirectional data bus and are fed to the CPU shown in FIG. 5.
The output of the comparator 91, along line 92 is also shown connected to another NAND gate 98. The second input to this NAND gate is the write strobe WR. The output of NAND gate 98, the output enable signal, is fed to a quad display circuit during an output or write command. In reference, for example, to master unit 50 it is seen that the outbound module contains eight thumbwheel switches and three display indicators. The eight thumbwheel switches are simply the switches S1-S8, whereas the display indicators are shown in FIG. 8 and form part of the quad display circuitry. Thus, each switch module in both the master and secondary units contains at least one quad display and a maximum of four indicators may occur on any given module. The output enable signal is fed to a quad latch 99, for example, Model No. 14042 to latch the write data appearing on the data lines D0-D3. The latched data is fed to power inverter 100, for example Model No. ULN2003A (Sprague) which subsequently feeds indicating diodes D1-D4. In this manner, the hard wired address code provided as an input to the comparator 91 of FIG. 7 serves to direct the address decoder for both the switches S1-S8 and the indicators D1-D4.
The display module is shown in detail in FIGS. 9A-9D. FIG. 9A illustrates the address decode for the display module which is implemented by logic circuit 102 utilizing address lines A3-A6. Additionally, the command I/O is provided as an input to the logic circuit 102. The output of the logic circuit 102 is fed along line 104 to NAND gates 106 and 108. NAND gate 106 is provided with an input from the write strobe WR and NAND gate 108 is provided with an input from the read strobe RD. The output of NAND gate 106 goes low whenever the display module is being addressed and a write command is to be implemented. The low or logically zero output is fed along line 110 to the inhibit input of an analog mux/demux 112 (Model 14051 for example used as a three-to-eight decoder). Decoder 112 provides a plurality of write strobes WS to be utilized with additional circuitry of the display module. These write strobes are identified by their binary decode so that decode 2 corresponds to write strobe WS-2 etc.
In a similar fashion the output of NAND gate 108 provides a logically zero output along line 114 to the inhibit input of decoder 116. Decoder 116 provides a plurality of read strobes RS, for use with additional circuitry in the display module. The particular line selected from the decoders 112 and 116 is dependent upon the address appearing on address lines A0-A12. The read strobe lines are also identified by their address decode. The circuitry shown in FIG. 9A is common to both the master and secondary display modules.
As may also be seen in FIG. 9A, two thumbwheel switches S1 and S2 are provided and are shown connected to the decoder 116. If a read command is given to the display module, these switches S1 and S2 may be addressed from address lines A0-A2 as address # zero and one respectively. Upon selection of either switch S1 or S2 the input lines to the decoder 116 are fed to the common pin 3 terminal of 116 so that the data bus D0-D3 may carry the BCD signal generated by each thumbwheel switch. It is noted that switch S1 is optional and is not utilized in the display modules for the secondary or master units as shown in FIGS. 2 and 3 respectively. Upon issuance of a write command the decoder 112 may be activated by address lines A0-A2. A decode of a binary zero or one is used to display one of two digits of the three digit seven-segment display shown for both the master and secondary display modules. The circuitry of FIG. 9A may be utilized to select either the intermediate significant digit (ISD) or the least significant digit (LSD) of the seven-segment display. The display circuitry for the ISD and LSD may comprise Model No. 14511 BCD to seven-segment decoder/driver, a resistor dropping network, and seven-segment LED display, Model No. MAN 3640A (Monsanto).
FIG. 9B illustrates additional circuitry for the display module which is common to both the master and secondary units. The circuitry of FIG. 9B controls the most significant digit in the seven-segment display as well as the "+" sign. The write strobe WS2 is utilized to activate a quad latch 120 (Model 14042) to drive LED display 122 (Model MAN3630A). Additional latches 124 and 126 are strobed by write strobes 3 and 4 to provide 24 volt level output of connectors labeled - . For the master unit 50, these 24 volt level output lines are fed to the I/O pin connectors 82 whereas for the secondary unit 40 these 24 volt output level lines are fed to the I/O pin connectors 72. The current sinks operating from a 24 volt level are provided on these output pin connectors from the 5 volt logic signals provided from the latches 124 and 126 via power inverters 128 (Model ULN2003A) and resistor network 130. Thus, these strobes are utilized to provide output data either to the display 122 or the 24 volt output level lines. The data originates from the data bus D0-D3. Various additional write strobes are fed to other circuitry within the display module as to be described hereinbelow.
FIG. 9B illustrates some of the read strobes which are utilized to latch input data into the data bus D0-D3. The input data is provided to the master or secondary via I/O pins 82 or 72 respectively which pins are connected to lines - as shown. The 24 volt level signal is passed through conditioning circuit 132 to translate the voltage level to 5 volts as utilized for inputs to the strobed inverter buffers 134 and 136. Input data from these buffers is fed to the CPU along the data lines D0-D3.
Additional read/write strobes are passed to still other circuitry of the display module to be described hereinbelow.
FIG. 9C illustrates additional circuitry for the display module which is applicable to the secondary units. Write strobes WS5 and WS6 are utilized to feed data from the data line D0-D3 to the interface module and I/O pins 72 respectively. The I/O pin outputs are spares and may be available for additional expansion of the system. The 24 volt level outputs to the interface module are provided by power inverters and resistor networks as in FIG. 9B. The four outputs conditioned by WS5 comprise the test level call signals which test operation of the secondary interface modules at 100%, 84%, 67% and 50% voltage levels. Write strobe WS6 is utilized to strobe a data code for activating a flash call generated by the secondary software. The flash call would be generated, for example, under system software control if the controller associated with the particular secondary did not respond to force-off commands and additionally failed to respond to the interval advance procedure. The D0 bit in the data bus line together with the write strobe WS6 would provide a signal along line 140 through power driver circuit 142 and solid state relay circuit 144. The output of solid state relay circuit 144 along pin 22 provides a 115 V 60 Hz source to the controller 32 for calling the flash condition.
Read strobes are also shown in FIG. 9C for strobing in the test call information and coded message data from the secondary interface module. The coded message data originates from the master data bus and is transmitted to the interface module of the secondary units via communication path 52. Read strobe RS4 is utilized to strobe in the test call information whereas read RS6 is used to strobe in the coded message information. Read strobe RS5 strobes 60 Hz sync data to enhance synchronization of operation of the master and secondary units. Read strobe RS7 is utilized to gate in additional input data from the I/O pin connector 72. Spare pins are also provided.
FIG. 9D illustrates additional display module circuitry which is applicable to the master unit only. Write strobe WS5 latches output data from the data bus D0-D3 to provide 24 volt level data which is the coded message transmitted to the secondary (via the master interface module and I/O pin connector 80). Write strobe WS6 is utilized to gate failure detection data to the master I/O pin connector 82 output via latch 150 and a power inverter and resistor network as shown. Additional output data may be provided by the write strobe WS6 and latch 150 to energize the indicators D17 and D18 which appear on the face of the master display module. Latch 150 also controls the selection of groups of behind front panel switches 152 to provide data to the master unit CPU permitting external programming for system data which typically will not change once the system is installed. For example, these switches may be used to store a BCD code for instructing a change from Split 1 to Split 2 operation. The data is selected utilizing a quad select gate, for example, Model No. CD4019.
Also illustrated in FIG. 9D are the read strobes which provide additional information to the master from the I/O pin connectors 82. Four lines of input data are provided via RS4. RS5 enables sensing of the 60 Hz sync information as was done in the display module of the secondary units. Read strobe RS6 is utilized to strobe data from input pin 15 to the data bus, and input pins 13 and 14 are connected to a data selector 154 (Model No. 14053) which is also connected to receive manual IN and manual OUT information from the interface module.
FIG. 10 is a schematic diagram of the interface module appropriate for the master unit 50 of FIG. 2. Information is transmitted between the master unit and secondary units via communication path 52 (see FIG. 1). A 24 V DC level communication line may be provided or, optionally, a 115 V AC level line and appropriate circuitry (not shown) may be used. The circuitry illustrated below provides a 24 volts DC level. The coded message signal is represented as a single line, but it is understood that in practice four lines are provided with four separate transistor circuits to provide the coded message to the secondary units along the pins 5 - 8 of I/O pin connectors 80 of the interface module for the master unit 50. The transistors shown are utilized to convert the 24 volt sink lines to 24 volt source lines for driving the data over the communication path 52 to the interface modules of the secondary units. All output data on the right hand side of FIG. 10 is fed along the communication path 52 to all secondary units simultaneously. Flash calls, pre-empt calls and free op calls shown on the left hand side of FIG. 10 may be provided as optional input calls along I/O pin connectors 80.
The manual switches located on the face of the interface module of the master unit 50 are represented by switches S1-S4 in FIG. 10. The manual enable switch S4 may be closed together with switch S1 to provide IN and OUT directional signals to the master CPU. The manual enable switch S4 activated in conjunction with switch S2 selects the Split 2 condition whereas activation of manual enable switch S4 in conjunction with switch S3 selects "free-op" operation via a line fed directly to output pin 4 , on the I/O pin connector 80. For transient isolation optical isolators are provided between the flash, pre-empt and free-op interconnections from pins 11 , 12 and 14 and their associated output conductors.
FIG. 11 illustrates the 24 volt DC interface circuitry for the interface module of the secondary unit 40 shown in FIG. 3. The coded message and free op information are provided along pins 4 - 8 illustrated in the drawing as a single line for each of representation. Filter circuitry and optical isolators are utilized to convert the 24 volt signals from the master unit to logic level signals for feeding further circuitry in the secondary display module. Test level command information is generated in the secondary units for testing operation of the secondary interface module which may be subject to damage from transients and the like. The system's software steps the test level commands from the 100% to 84%, 64% and 50% levels sequentially to provide tests for the flash call, pre-empt call, free op call and coded message call.
Tables I and II show the pin assignments for the 24 pin I/O connectors 72 and 82 and 1 pin I/O connectors 70 and 80 respectively. The tables list the pin assignments for both the master and secondary units. The "phase green in" data listed in Table I for the secondary unit allows the master unit to monitor the green phase of the corresponding timer for two different timing rings each having as many as four green phases. Force-off outputs are provided for each ring on pins 9 and 13 , and the MAX III, Call and call to artery green is provided on pins 10 and 12 respectively. The master pins 12 - 15 permit percent average calls to be made as selected by the operator by external means (not shown). Table II lists the pin assignments for the I/O pin connectors 70 and 80. Clock, data and sync information appear on pins 5 - 8 . The data communication telemetry format is discussed in detail below.
| TABLE I |
| ______________________________________ |
| MASTER SECONDARY |
| Function Pin Function |
| ______________________________________ |
| Inbound Vol. Det. |
| 1 1 |
| Inbound Vol. Det. |
| 2 2 |
| Outbound Vol. Det. |
| 3 3 |
| Outbound Vol. Det. |
| 4 Phase 4 |
| Inbound Ocp. Det. |
| 5 Green 5 |
| Inbound Ocp. Det. |
| 6 6 |
| Outbound Ocp. Det. |
| 7 7 |
| Outbound Ocp. Det. |
| 8 8 |
| Indicator Inhibit Call |
| 9 F.O. Ring 1 |
| Spare Call 10 Max II |
| Split 2 Call 11 Int. Adv. |
| % Avg. Call,CL-1, No SC |
| 12 Call Artery φ |
| % Avg. Call,CL-2, SC-2 |
| 13 F.O. Ring 2 |
| % Avg. Call,CL 3, SC-3 |
| 14 φ , Omit |
| % Avg. Call,CL-4, SC-4 |
| 15 Indicator Inhibit |
| Unit Fail 16 Call Non. Art. φs. |
| Det. Fail 17 Sum. Checks |
| 24V 18 24V |
| Inbound 19 P.E. Out(115 V) |
| Logic. Gnd. 20 Logic Gnd. |
| Chassis Gnd. 21 Chassis Gnd. |
| Occupancy 22 Flash Out(115V) |
| 115V Neut. 23 115V Neut. |
| 115V AC 24 115V AC |
| ______________________________________ |
| TABLE II |
| ______________________________________ |
| MASTER PIN SECONDARY |
| ______________________________________ |
| Flash 1 Flash Call |
| P.E. 2 P.E. Call |
| Spare 2 Spare Call |
| Free Op. 4 Free Op. Call |
| CMA CLOCK 5 CMA Call |
| CMB (D0,D2) |
| 6 CMB Call |
| CMC (D1,D3) |
| 7 CMC Call |
| CMS (SYNC) 8 CMS Call |
| Spare 9 Spare |
| 115V AC Input 10 Spare |
| (AC only) |
| Flash Call 11 Spare |
| P.E. Call 12 Spare |
| Spare Key 13 Spare |
| Free Op. Call 14 Spare |
| 24V Input for Call |
| 15 Spare |
| Ground 16 Ground |
| ______________________________________ |
The master unit 50 is designed to provide all of the system control functions for the coordinator system in accordance with the invention. The master unit basically samples traffic conditions, performs various traffic control decisions and communicates the results of these decisions to the plurality of secondary units 40. The prime function of the master unit is to calculate the most effective cycle length for the present sensed traffic pattern considering both the traffic detected by the volume detectors as well as by the occupancy detectors. The master unit may also be utilized to control the effective offset for each of the secondary units as well as to provide special "system" commands such as flash, free-op, pre-empt (P.E.), alternate split and percent average commands. The master unit also contains manual override switching means to effect manual operation of the system commands.
The master unit is responsive for sampling traffic conditions from both the volume and occupancy detectors. Volume detectors 18 and 20 provide a pulse signal upon actuation by a vehicle whereas the occupancy detectors, which serve to provide an internal traffic sampling, are of the pulse-duration type and thus stay in one state when a vehicle is present and in another state when a vehicle is not present. Indicators associated with the volume and occupancy detectors are energized to indicate vehicle activity. The master unit provides a failure indication by means of these indicators. These indicators are energized in a flashing mode whenever a fault condition is detected. The indicators for the volume detectors 18a, 18b and 20a, 20b are shown on the volume module of FIG. 2, and the indicators for occupancy detectors 22a, 22b and 24a, 24b are shown on the occupany module. The indicators associated with the detector flashes upon a failure condition as determined by the program in the master unit. The criteria established for indicating a failure condition for the volume detectors are a lack of any activity for sixteen minutes or a continuous actuation which exceeds two minutes. The criteria for a failure condition for the occupancy inputs are a lack of activity for sixteen minutes and a continuous activation which exceeds five minutes. Input signals which exceed the above criteria are ignored in the master unit.
The prime purpose of the master unit is to calculate the effective cycle length which is derived utilizing input information from both the volume and occupancy detectors. The coordinator system may operate in the INBOUND mode, OUTBOUND mode or AVERAGE mode. For each of these three conditions the master unit determines the most effective cycle length which is communicated to each of the secondary units. For example, if the system is operating in an INBOUND directional mode the larger of the two inbound volume detector signals is utilized in the volume computation, and the larger of the two inbound occupancy values are utilized in the occupancy computation. The specific manner in which the volume and occupancy values are utilized is set forth in detail below. The resultant cycle length is communicated to the secondary units. Two constraints are placed on the overall calculation. The first constraint is that the calculated cycle length cannot be less than the sum of the minimum arterial green time plus the maximum side street time. The second constraint is that the calculated cycle length cannot be more than the sum of the maximum arterial green time plus the maximum side street time. The minimum and maximum green times are presettable on thumbwheel switches in the directional and system module of the master unit 50 respectively. The maximum side street time is also settable for two separate values corresponding to the Split 1 and Split 2 system configurations. These thumbwheel switches for the Split 1 and Split 2 configurations appear on the system module of the master unit 50. An associated indicator is energized to indicate which value is in effect.
The volume computations are utilized in determining cycle length for both directional mode and average mode of operation. Basically, the volume computation depends upon the extent of sensor activity and the periods within the cycle that the sensor activity occurs. The system cycle may thus be defined as comprising two time periods or bands:
Total system cycle length=SR (red period)+SG (green period).
The red period, SR is equal to the effective side street time which is the Split 1 or Split 2 side street times presettable on the system module of the master unit. This maximum side street time is equivalent to the red time for the artery. The green period, SG, is calculated each cycle from activity detected during the red period, SR, and the preceding last car passage (LCP) time, and continuing through the green period SG itself.
SG may be defined as comprising two time intervals, namely, SG =TR +TG. TR is the time interval determined by activity occurring during the red period, SR, and the preceding last car passage time. TG is the time interval determined by activity occurring during the green period before gapout is recognized. SG is, however, at all times constrained such that it may not exceed the front panel setting of the maximum green time as settable on the system module of the master unit 50.
The time intervals TR and TG are calculated as follows:
TR =(ER)(AR)
OR the minimum artery green whichever is greater, where:
ER =the extension time per actuation time (front panel setting of the red headway on the volume module), which actuations occur during the period SR and the preceding last car passage time; and
AR =the number of actuations detected while ER is in effect.
The calculation for the quantity TG is similarly given as:
TG =(EG)(AG)
where:
EG =the extension time per actuation (front panel setting for green headway on volume module of the master unit), which actuations occur during the SG period less the last car passage time; and
AG =the number of actuations detected during time EG is in effect.
The green period, SG, is normally terminated by gapout, plus the time allowed for the last car passage, unless the quantity TR +TG, plus the last car passage time represents a longer green time than would be allowed by gapout termination. In this case, the longer period is used. In either case, SG is not allowed to exceed beyond the maximum green time.
Gapout termination is determined as follows: At the start of SG, gap time equals the initial gap time (thumbwheel switch setting on inbound and outbound modules of the master unit 50) and retains the initial value until the gapout inhibit period is ended. At the end of the gapout inhibit period, the time to reduce period (thumbwheel switch settings on inbound and outbound modules) begins, and the gap time is reduced linearly over this period until the gap time equals the minimum gap setting (thumbwheel switches). If the minimum gap value is reached, it is retained for the remainder of the cycle.
Gapout recognition is inhibited and thus the appearance of a gap is ignored for an interval called the gapout inhibit period. This time period is simply the time TR minus the last car passage time (thumbwheel switches on inbound and outbound modules). When the gapout inhibit period is terminated, gapout timing begins. At the beginning of such gapout timing, the gapout time is equal to the initial gap setting, and the gap size is then linearly reduced. The gapout count continues unless a car is sensed by either of the volume detectors in which case the count is set to zero and beings again. When the gapout count equals the gap time, gapout occurs. When gapout occurs, the system operates to terminate SG after assuring sufficient time for the last detected car to clear, i.e. LCP time. An overall constraint, however, is that the total green time may not exceed the maximum green as set on the system module. Additionally, the gapout may not necessarily terminate SG if the accumulated volume or occupancy totals demand further extensions of the green time within the overall maximum green constraint. The basic reason for inhibiting the gapout count for a time period related to the value TR is to allow time for cars which have been backed up beyond the volume sensor during the red arterial phase, and therefore cannot immediately move as the light turns green, to pass across the volume sensor. If time were not provided an anomalous gap reading would appear shortly after the light turned green and the cycle could terminate too soon.
FIG. 12 illustrates a cycle length computation based on volume sensing utilizing the algorithm set forth above.
The occupancy values are based upon a running average obtained from thirty second increments averaged over a two minute period. The two minute averaging period may be varied over one minute increments to a maximum period of eight minutes via program memory modifications. Typically, a two minute window is set and the average is recomputed every thirty seconds for the most recent two minute window (most recent four readings). The occupancy values are derived from occupancy sensors which provide an input for the complete duration in which the vehicle is over the sensor position. Consequently, if during the thirty second sensing time a vehicle is stationary over the senor a 100% occupancy will be registered for this particular thirty second time period. The 100% occupancy value will be averaged into the preceding three 30 second occupancy values to give a total two minute window which is updated every thirty seconds in a sliding fashion. The occupancy values are thus expressed in percentage of time in which the occupancy signal is present indicating the presence of a vehicle. It is necessary, however, to convert these percentage occupancy values into a cycle length counterpart value so that a comparison may be made with the cycle length as computed from the volume detectors described above. For the purpose of converting the occupancy percentage figure into a cycle length, thumbwheel switches labeled "Yin ", "X" and "Yout " are provided on the system module of the master unit 50. The conversion is derived from a straight line conversion of a portion of the occupancy values whose endpoints are defined by these preset values and whose endpoints match the two limits of the possible cycle length, namely, the minimum cycle defined by the minimum artery green time (direction module) and the maximum cycle defined by the maximum artery green time (system module). The minimum cycle match point is preset on the thumbwheel switch labeled "X" and is settable throughout a range of 0-9 corresponding to a 0-90% of occupancy. This set point is effective for both directions and is termed the "X" set point. The maximum cycle match point is determined by the setting of the thumbwheel switch labeled either Yin or Yout depending upon the directional mode in effect. The thumbwheel switch positions range from 1 to 9 corresponding to a 10 to 90% occupancy and the zero value of the thumbwheel switch corresponds to the 100% occupancy value. Consequently, any occupancy value may be converted utilizing the linear conversion defined by the two endpoints into a cycle length value.
The actual directional cycle length selected for transmission to the various secondary units is simply the larger of the cycle lengths as calculated from volume considerations and from occupancy considerations separately.
The master unit also provides a means for selecting the average cycle length which is communicated when a non-directional (average) traffic mode is in effect. Four values of the average cycle length are presettable on the average module of the master unit 50 (FIG. 2). A maximum of 299 seconds may be selected for a cycle length. When the average mode of traffic flow is in effect, the larger of the inbound and outbound cycle lengths, whether derived from either a volume input or an occupancy input, is applied to the formula (IN+OUT)/2, and the result of this computation is compared to the four preset values available for the average system configuration. The preset value which most closely approximates the absolute value of the computation is the effective cycle length communicated to the secondary units when the average mode or system configuration is being utilized. The system cycle for the above is taken to be the outbound system cycle. An adjacent indicator indicates which cycle length is presently being communicated to the secondaries.
An additional function of the master unit is to determine when a directional command need be given so as to change the mode of operation of the coordinator system between the three modes, INBOUND, OUTBOUND and AVERAGE.
In order to accomplish the directional commands the master unit totals the number of volume vehicle actuations which are achieved within the present effective length. The larger number of actuations selected from the two volume detectors at each end of the system (inbound detectors and outbound detectors) are applied to the following formula: ##EQU1## The derived value expressed in percent is compared to the two preset values (thumbwheel switches) which are expressed in percentages on the direction module of the master unit. Values derived exceeding the higher preset value cause an inbound directional command. Directional values lower than the lower preset value cause an outbound directional command. Derived values falling between or equal to the two preset values cause an average directional command. The program of the master unit is also provided with error detection subroutines such that if the inbound preset limit is lower than the outbound preset limit the associated IN/OUT indicators flash alternately and an average directional command is issued by the master unit until the fault condition is corrected. Proper operation is achieved for directional offset commands when the inbound percentage value is set higher than the outbound percentage value.
The master unit issues "speed change" commands which act to change the effective offset at the secondary units depending upon the level of occupancy detected within the system. The offset changes are effectively speed modification commands which are based upon the occupancy level within the system as selected from the inbound and outbound modes of operation. The occupancy level expressed in percentage is determined using the running average obtained from thirty second increments averaged over a two minute window as explained above. These occupancy levels, expressed in percentage, are compared to four preset levels which correspond to the thumbwheel switch settings on the occupancy module of the master unit 50. Occupancy values exceeding the higher preset value (upper set of thumbwheel switches) cause a speed change #4 command to be issued. The speed change #4 command is a percent change in the offset and is settable using the upper set of thumbwheel switches of the Speed module of the master unit 50. Three additional speed change commands (labeled #3-#1 from top to bottom) are settable with thumbwheel switches on the Speed module. Occupancy values lower than the lowest preset value results in no speed change being issued. Occupancy values falling between these preset values cause preset speed change numbers #1-3 to be issued whenever the occupancy level exceeds the associated preset set point value. In the event that the preset value has been incorrectly set, i.e., not in increasing values, the four associated indicators flash and no speed change command is issued. A unit fault command is issued under these circumstances.
The master unit continuously provides updated information to the secondary units. The update intervals are controlled by the effective cycle lengths as derived from the system cycle. The transition from green to red (SG to SR) is the synchronization point for update information. No output of the master unit changes more frequently than or out of synchronization with the green to red synchronization point. There are, however, two exceptions as to the interval of update. These two exceptions are, however, still synchronous with the system cycle.
The first exception is the offset decision which effects a directional to average change. The directional to average update change is governed by a preset update interval of 0-9 minutes as determined by the "INTO" thumbwheel switch on the Direction module of the master unit 50. The value of zero on this thumbwheel switch implies the effective cycle length.
The second exception to the update interval is that pertaining to cycle length selection decisions in the average configuration. These are governed by a preset update interval of 0-9 minutes. The update interval is selected by a thumbwheel switch labeled "IN" in the directional module of the master unit 50. The value of zero implies the effective cycle length.
The master unit contains a plurality of slide switches utilized for manual control. When the manual override is enabled, the thumbwheel selector switch on the face of the display module of the master unit is utilized as a cycle length selector allowing individual call to any of four average cycle lengths as follows:
| ______________________________________ |
| Select Position |
| Effective Cycle Length |
| ______________________________________ |
| 1 Average No. 1 |
| 2 Average No. 2 |
| 3 Average No. 3 |
| 4 Average No. 4 |
| 5-9-0 Average No. 1 |
| ______________________________________ |
The associated indicator is energized and the numeric display flashes to indicate manual override operations. The numeric display indicates the cycle length selected in seconds.
When called, by external control, the system percent average operation is effective at the next system cycle SG to SR transition. Lacking any other input call the accompanying cycle length is taken to be the #1 TWS average setting on the average module with no speed change. When the above call is enabled along with another call (see Table I) the accompanying effective cycle length is:
Average No. 2 with Speed change No. 2
Average No. 3 with Speed change No. 3
Average No. 4 with Speed change No. 4
The display module of the master unit 50 utilizes two seven-segment displays for the least significant digit (LSI) and the intermediate significant digit (ISD). The most significant digit (MSD) is a combination of the plus or minus sign and a "1". For cycle lengths in excess of 199 seconds the "+" sign is activated indicating numbers of 200 to 299. For parameters expressed in percentage, the "-" sign is activated. A flashing display is utilized to denote manual override operation.
Ten selectable parameters from throughout the unit are available and appear on the display unit as governed by the selector switch on the display module as described heretofore.
Each secondary unit, such as the one shown in FIG. 3, contains a microprocessor and memory unit for enabling control of the specific intersection associated therewith. The secondary unit issues force off commands to the timer (controller 32) governing the intersection. The secondary unit receives the cycle length information transmitted to it by the master unit, and has memory space available for storing twenty-four individual cycle length messages. The cycle length is stored until the appropriate time for its use (depending upon the offset of the secondary unit). Thus, the master unit may effectively change the cycle length for each successive cycle when in a directional operation, and the respective cycle length associated with each platoon of cars passing through the system will be called into play by the appropriate secondary unit at the appropriate time. Thus, the cycle length associated with each platoon within the coordinated arterial system will be "rippled" through the artery in a successive fashion such that ech platoon travels with its own cycle length.
The directional offset is settable using the thumbwheel switches on the offset module of the secondary unit 40. Offset relationships in each direction are determined in actual seconds of travel time from the start of the system utilizing a desired speed for vehicle traffic. Separate thumbwheel switches are provided on the offset module for both inbound and outbound directions. Thus, different speed limits may be set, if desired, for each direction.
Directional offset modifications may be made by the master unit. When such speed change offset modifications are commanded by the master unit the modified offset value utilized is the one dictated by the master unit.
The secondary unit automatically calculates and implements average offsets which equally share the maximum possible green band between each direction for a given cycle length. The operation is based upon the offset setting used for the outbound direction, and thus the average speed is the same as that set into the outbound program. Alternately average offset may be set in percentage of cycle length as is more conventional in previous methods. A system calling command, communicated from the master unit, selects the preset percentage average offset operation.
In calculating the automatic average offset, each secondary unit compares its directional offset time with a reference cycle length which may be, for example, the presently effective cycle length. In effect, the reference cycle length is divided into the directional offset time to determine a remainder fraction, that is, the fraction by which the directional offset time falls within any multiple of a reference cycle length. Assuming the reference cycle length is 100 seconds and outbound offsets occur at 40, 80, 160 and 215 seconds for first through fourth intersections, the remainder fractions are simply (40/100), (80/100), (60/100), and (15/100) respectively. The average offset is taken to be either approximately zero or approximately fifty percent of the effective cycle length depending upon the value of the remainder fraction. A number of alternatives are possible. Using the example above, one may assign an average offset of zero (zero percent of reference cycle length) to all remainder fractions less than or equal to 1/2, and an average offset of 50 seconds (fifty percent of reference cycle length) for all remainder fractions greater than 1/2 . Thus the first and forth intersections would have a zero average offset value, and the second and third intersection would have a 50 second average offset value. Alternately, the zero or fifty percent assignment may be made depending upon other criteria for the remainder fraction. One such alternative is to assign the zero percent value if the remainder fraction falls within a portion of the reference cycle length time defined by 0 to 24 or 75 to 100 percent thereof, and the fifty percent value if the remainder fraction falls within another portion of the reference cycle length time defined by 25 to 75 percent thereof. The software listings within the secondary utilize the above alternative in calculating the average-mode offset values for each of the secondary units in the system. The automatic average offset calculation is made within each secondary unit utilizing its particular outbound offset value as a reference input parameter.
After a change in the offset value, the secondary unit resynchronizes itself with the new offset value by increasing or shortening the effective cycle length. For moderate offset changes, synchronization is accomplished within a single cycle. Larger offset changes are spaced over not more than three cycles of operation. Rapid synchronization is generally desirable, and the secondary unit will determine whether synchronization can best be reached by lengthening or shortening the cycle length. The effect of such lengthening or shortening to the traffic flow is also taken into account, and lengthening is generally favored when there is no choice preponderantly in favor of either mode. Before a shortening cycle length is attempted the secondary unit calculates the feasibility of such an approach by measuring early artery green return and the ratio of artery to side street service. The secondary unit may, for example, not be able to shorten a given cycle length since the side streets have a minimum green period which cannot be further reduced even in the presence of a force-off. Further, the side street will not react to a force-off during pedestrian crossing times.
In the event that a controller and the associated secondary unit fall out of phase association, the secondary unit makes use of the force-off command to re-establish association. The secondary unit does not issue a force-off command before the associated controller has moved into phase association with the secondary unit. After association has been achieved the secondary unit issues a force-off command when it moves into the next phase unless the controller has also advanced to a new phase. The force-off command is held for approximately five seconds or until the controller advances, whichever event occurs first.
The secondary unit causes the controller to be under coordination control at all times unless a free operation has been issued from the master unit. When in the free operation (free op) mode the secondary unit ceases to issue appropriate force-off commands to the controller and also drops the command for Max II extension limits and removes the constant arterial detector calls.
The secondary unit issues a 115 V, 60 Hz, command when directed by the master unit. This voltage is used to effect flash operation of the controller. Similarly, pre-empt operation may be effected upon command by the master unit in response, for example, to special intersection needs (fire station nearby, etc.).
Each controller has associated therewith a timing means which may comprise mechanical cams, electronic counters and the like. In the event that any given timer associated with an intersection controller fails to advance for one complete coordination cycle the secondary unit takes control of the interval advance circuit in the controller and steps it through each phase for the alloted split period as set on the secondary unit. (The interval advance (int. adv.) signal is connected to pin 11 as listed in Table 1). Under these conditions the display portion of the display module of the secondary unit is utilized to indicate a failure of the timer by flashing the vertical stroke of the "+" symbol. If the timer fails to advance, even in response to the interval advance circuit, the secondary coordination unit issues a flash call.
In the event of a loss in communication between the master unit and the secondary unit, the secondary unit continues to operate on the already communicated cycle length, offset and split information in the order of storage within the secondary unit. After the cycle length and other data associated with each platoon has been utilized, the secondary unit then continues to operate on the last fully communicated combination of cycle lengths, offset and split information.
Selectable standby cycle lengths are provided for use in the event of a loss of communcation from the master unit after a thirty minute time interval. The secondary unit reverts to normal operation under command of the master unit upon re-establishment of communication.
The secondary unit performs an automatic self test with regard to the interface module input circuits when called to do so by actuation of appropriate pushbutton switches on the face of the interface module. Separate tests may be provided for pre-empt, flash and coordination unit inputs. The self test calls appropriate functions into service for that time that the test is enabled by the operator. The test consists of applying input levels of 100%, 84%, 67% and 50% of the designed input levels on the inputs in sequence. In the case of the pre-empt or flash functions the resultant output may be observed and an evaluation may be made of the result and the "display" will indicate the percent level presently being applied. In the case of the coordination functions the response will be automatic and the results will appear in the adjacent display at the completion of the test. At that time the display will sequentially indicate the failed test level and the pin number of the inputs that have failed at this level. A non-fail test will display 00.
It is clear that although the secondary unit as described herein is a separate physical unit from its associated controller, it may equivalently be incorporated into the controller unit without effecting the system operation.
The computer program of the master unit calculates the traffic signal cycle length and related parameters from three data sources. The first souce is the thumbwheel switches on the front panel of the master unit; the second source is the real time inputs representing cars entering and occupying the section of artery controlled by the master/secondary units. Thirdly, certain general override functions can be initiated by remote inputs. Since the program has final say, it can interpret any of these inputs, and does do so if they seem incorrect as compared to the parameters which are part of the program and constitute the final definition of what is a proper and correct front panel setting or sensor input.
While it is instructive to consider that the program is in a Red phase or Green phase, or in some particular subphase of one of these, the method employed to represent the assorted states which the sytem can get into employs a combination of explicit flags and different paths of program logic to uniquely represent the different possible situations.
The first few layers of information processing of the clock and of the real time inputs is done by regular polling. The sensor inputs (occupancy and volume for example) are sampled every 33 ms, and counters are incremented to indicate the number of pulses for volume inputs, percent of time which an occupancy input is found to be on, or merely the state of a clock counter. The system outputs are updated at regular (100 ms) intervals. At longer time intervals, 30 seconds, the sensor data is examined to check for the possibility of a fault.
The continuous processing of inputs and outputs so far described may be considered as background processing whereas the foreground processing constitutes the second by second update of system state as represented by Directional mode (Inbound/Average/Outbound) and Phase (Red/Green). The system flags include DIRSTAT (Directional mode), SYSTAT (red/green; sync; red/green ect.), GAPPROC (current directional cycle length has/has not been calculated), and GAPFLG (a gap over the threshold has been observed). In conjunction with these flags, a set of timers control the minimum waiting time before changing state. These include SPEEDTM which keeps track of the time between changes in speedwarp, INAVGTM which keeps track of the time spent in AVERAGE directional mode, INTOAVGTM which keeps track of the time spent waiting to enter Average mode, and AVCYCTM which keeps track of the time to be spent in a particular average cycle length before changing. These timers are setup and interrogated at times specific to the logic of phase changes, but they are decremented by the background timing logic every 30 seconds. Thus, these timers are an interface between the regular background and the context sensitive foreground.
To handle the foreground logic, the state of the flags controls the selection of a specific routine among several which is to be called each second. During green time either GRNUPDIR, or GRNUPAVG, or MANUAL is called once a second. During red time either REDTIME or MANUAL is called once a second. These four routines share certain basic duties. They all increment a counter, (ACTGN) which is the accumulating time in the current phase, and check this time against various limit values in order to change flags. The differences among these four routines lies in the logic whereby assorted variables are calculated and the flags are set and reset. Numerous subroutines perform calculations which are shared among the main routines, and several subroutines exist for logical clarity rather than the convenience of multiple applications of the same logic. For instance, during a directional nonmanual (automatic) green phase (GSPEND and SYNCEND are called precisely once to perform unique operations which would otherwise fall into the purvue of GRNUPDIR. Information output portakes of both clock regularity and variations with phase.
The telemetry is composed as a sequence of messages whose content changes with the current state of system variables when the message is generated. The messages are typically 4.8 seconds long, and thus, are somewhat dated by the time they are completely sent. To partially combat this, the state of sync is appended to every nibble of information sent. The sync delay is at most 300 ms. The front panel display is updated every 100 ms.
Thus the presence or absence of pulses on the inputs is quantized into 100 ms slots for visual presentation. Similarly, the presence or absence of a gap between cars is quantized into one second slots.
Basic timing information is developed from an input which is 60 Hz divided successively by (2), (3), (2) giving 4 inputs the slowest of which is 5 Hz. The program loops examine this input until a change is observed. It then updates the software clock and executes assorted routines depending on the current time slot. These routines finish and control returns to the waiting loop until the next clock transition.
The significant time slots, or intervals between major routine executions are 33 ms, 100 ms, 1 s and 30 s. The first of these is used primarily to sample the volume and occupancy inputs. 100 ms is used mostly to update display outputs, and to initiate lengthy routines which are allocated an N.1 slot. (N indicates that the routine is executed each second but on the 0.1 second mark - not exactly on the second.) The 30 second slot is used to maintain long term counters and to check up on validity of inputs. The major routines which determine system state run on the one second mark.
The system state is either Red phase or Green phase. The Directional mode of the system is either one of manual inbound, manual average, manual outbound, inbound, average, outbound or percentage average. The Green phase can be broken down into sections. In particular, a sync pulse is transmitted by the master unit and persists for all but the last 2 seconds of the Green phase in order to inform the secondaries of an impending phase change. During the first portion of the Green phase, the green headway is used with the volume sensors as part of the cycle length determination. During the last car passage time, or following a gapout in a non-manual directional mode, the red headway is used. In a non-manual directional mode, Green phase time is further subdivided into a gap inhibit period followed by a gap waiting period followed by a possible extension period after a gap has been acknowledged but before the last car passage period. Unlike the previously mentioned phases which are fixed by thumbwheel switch (TWS) settings, the second and third subphases of a non-manual Green phase can be skipped depending on traffic.
At one second intervals, the time keeping driver executes one of the major phase routines (which depend on system state). These routines share the responsibility of (1) incrementing a counter, ACTGN, reflecting time accumulated in the current phase, (2) advancing system state when this counter exceeds the previously established limit, and (3) performing calculations towards determining the current cycle length and/or future cycle durations.
The major states of the system are represented by different program routines, but the large quantity of continuous repetitive work is handled by frequently executed but short and simple background routines. This ranges from nearly continuously called routines such as RTCLK which monitors the real time clock waiting for the next transition to routines operative once every several traffic cycles such as AVCYC which calculates the average cycle length during average cycles, but only repeats after a timeout period measured in minutes.
The master unit calculates a system cycle length and parameters for Directional mode and speed change from volume and occupancy real-time input, and transmits this information to each of the secondary units. Basically, cycle length increases with increased traffic, and direction is governed by the relative balance of inbound and outbound traffic. Speed change is proportional to traffic as measured by occupancy.
Directional mode is selected by comparing panel settings (TWS) with the calculated value of inbound volume/(inbound volume+outbound volume) in percent as follows:
| ______________________________________ |
| Criteria Directional Mode |
| ______________________________________ |
| ##STR2## AVERAGE |
| ##STR3## INBOUND |
| ##STR4## OUTBOUND |
| ______________________________________ |
To avoid undue variation, changes of Directional mode are constrained so that IN⇄AVG⇄OUT and IN⇄OUT. Furthermore, two time delays are enforced. "IN" is the minimum amount of time which the system can stay in any cycle length in AVERAGE mode. "INTO" is the minimum amount of time it will remain in a Directional mode even though it may wish, by calculation above, to go into AVERAGE. To execute a transition, the calculation must be consistent throughout the waiting period. Thus frequent variations due to random traffic is discouraged, but truly necessary transitions are delayed by no more than the waiting times. Both the IN and INTO time periods are settable on TWS located in the direction module of the master unit 50.
Assorted error checking and comparison results in the selection of a maximum valid inbound and outbound volume and occupancy values. These values enter into the cycle length calculation along with the panel settings and are defined as follows:
| ______________________________________ |
| VOLS = ER AR + EG AG |
| A-- Actuations |
| E-- Extentions |
| R-- Red |
| G-- Green |
| ##STR5## |
| INS = MAX (VOLSI, OCCSI) |
| S-- Seconds |
| I-- Inbound |
| O-- Outbound |
| OUTS = MAS (VOLSO, OCCSO) |
| ##STR6## (1) |
| ______________________________________ |
The calculated Average cycle length value is used to select the closest panel setting in the average module of the master unit for transmission to the secondaries. From the selected average cycle length, the Green Time is simply the average cycle length minus the side street time.
In a Directional Mode, the cycle length is calculated from the current data. At the beginning of the Green phase the value Max Grn (green) is used as a provisional Green Time. After the gap inhibit time, MAX(ER AR, MINGRN)-LCP, the gap value is considered. When the time between any two successive actuations, considering actuations in either or both lines in this direction exceeds a gap value, or the time in Green extends to MAX Green-LCP, further calculations are performed. AG ' (up to this point in Green) is used so as to find MAX{EG AG '+ER AR, MIN Green, OCC [IN or OUT]}. This value is used for the Green time unless it exceeds MAX Green in which case the latter is substituted. We now have a value for green time. Note that this value equals or exceeds the currently elapsed green time+LCP. In the latter case the system waits out the remaining time before going into LCP time. Cars counted after AG are included in the AR of the next cycle.
An overall flow chart for the Master unit operation is given in FIG. 13. The major operating subroutines are discussed hereinbelow. Program listings are given in the appendix for the key operating programs in both the master and secondary units.
The UPDATE routine is called every 33 milliseconds (30 times per second). It keeps track of sensor inputs, both volume and occupancy. It also keeps a tally of "weighted" actuations to provide the required volume derived cycle lengths.
The actions taken for the volume and occupancy sensors are different:
Volume: The volume sensors are used to determine cycle length and/or direction as well as for display. A pulse on the order of one hundred milliseconds is normally generated when a vehicle passes over the volume detectors. UPDATE counts these pulses. It does so by using the exclusive OR function, successively comparing four bit samples representing the four volume sensors. A change results in a "1" and represents either the leading or trailing edge of the sensor pulse. Only the leading edge is counted. Each leading edge increments a binary one-byte counter. This counter is subsequently used for error detection and direction determination.
Each pulse also increases a weighted count, the value of the weight depending on whether the system is in the SR or the SG mode, and whether the sensor is inbound or outbound as determined for corresponding TWS headway settings. The weighing factors are simply the factors ER and EG.
UPDATE also performs an operation preparatory to fault checking. It prepares a register for inspection by the routine called VOLFAULT. Then it inputs a new set of four volume bits, and it ANDs the contents with RAM register VOLHIGH. This is to determine whether the volume sensor is continuously high. If the sensor ever goes low, the result will be to clear the associated bit in RAM, notifying the fault checking routine VOLFAULT that the sensor has not remained high. VOLFAULT will test this register periodically and set it to all "1" (FF).
Occupancy: The occupancy sensors are used for determining cycle length as well as for display purposes and speed change. The occupancy calculation is a running average. Each detector is polled every 33 milliseconds and a count is accumulated for 30 seconds. The larger number from each pair of inbound or outbound detectors is used. At the end of 30 seconds, the accumulated totals are divided by four to insure a one byte result, and placed in a Queue as part of the running average. During UPDATE, a set of four double byte registers are incremented whenever the associated occupancy bit (each sensor is represented by one bit) is high. The accumulated totals are later processed by QUEUE. QUEUE will clear the counter after truncating it to eight bits (dropping the two LSB) and entering the new value into the appropriate circular stack location. This count may be considered an unnormalized percent of the time which the occupancy input was found to be high. Since QUEUE executes every 30 seconds, the maximum count is 900, which value fits in ten bits.
The PREXMIT routine is called every 100 ms to handle the transmission of telemetry. Each message is composed of 8 four bit nibbles, but only 2 bits of data are sent for each of the 8 nibbles. This is done by transmitting the low order 2 bits of the data followed by the high order 2 bits. Four lines are utilized for telemetry between the master and secondary units. One of the 4 available lines for data transmission is used as a clock line that is high whenever the high order bits are sent, and low when low order bits are sent. Two of the remaining lines are used for data per se and one line reflects the status of sync. The sync line is high during a Green phase and goes low a fixed time, as, for example, 2 seconds prior to a transition to Red phase.
| ______________________________________ |
| DATA TRANSMISSION EXAMPLE |
| Data nibble #1 = "1101" |
| assume SYNC = 0 |
| Data nibble #2 = "0010" |
| ______________________________________ |
| DATA LINES |
| SYNC D1 |
| D0 |
| ______________________________________ |
| LINE D3 |
| D2 CLOCKLINE |
| ______________________________________ |
| "0" "0" "1" "0" Nibble #1, low order bits |
| "0" "1" "1" "1" Nibble #1, high order bits |
| "0" "1" "0" "0" Nibble #2, low order bits |
| "0" "0" "0" "1" Nibble #2, high order bits |
| ______________________________________ |
Each 1/2 data nibble is transmitted for 300 ms. PREXMIT counts the number of nibbles transmitted (NIBCTR), and when this count equals 16, a routine called COMPOSE is called to format a new message. Since each 1/2 data nibble is transmitted for 300 ms, and it takes 16 nibbles (counting the SYNC and clock as part of the nibble) to transmit a message. Thus, 4.8 seconds elapse during the transmission of each message.
During a sequence of average cycles the length of each is calculated 2 seconds before the end of Green phase and transmitted as ECLT (effective cycle length time) during the operating time, namely the immediately following Red phase. During a sequence of Directional cycles, the cycle length is unknown until GAPEND time. The cycle length transmitted during the Red phase which precedes this is that of the preceding cycle. The length of the current cycle is only transmitted implicitly by the cessation of SYNC. The coded cycle length information thus serves as a check on the time information transmitted implicitly by the end of the SYNC pulse. In practice offsets between secondaries at the ends of the system and their corresponding adjacent secondaries are longer than 4.8 seconds and thus the secondaries have received both the end of SYNC pulse and the coded message prior to platoon arrival time. During transitions from Directional to Average mode, the cycle length transmitted during the first red is the new cycle. Thus the last directional cycle length is lost. For transitions from Average to Directional, the last Average value is repeated for the first Directional Red phase.
The COMPOSE routine is called by PREXMIT every 4.8 seconds (after a 16 nibble message has been transmitted). The function of COMPOSE is to extract appropriate data from RAM and format it for telemetry. COMPOSE looks at the SYNC line, and depending on SYNC status, formats one of two possible messages.
| ______________________________________ |
| Msg #1, transmitted if SYNC on. |
| D3 D2 D1 D0 |
| ______________________________________ |
| W0 "1" "1" "0" "0" Message ID |
| "C" |
| W1 % Avg. Out In "1" D3 -D1 = |
| Direction; |
| D0 =Strobe |
| W2 D A t A Base cycle, |
| LSD |
| W3 D A T A Base cycle, |
| ISD |
| W4 "0" Split D A TA D2 =Split; |
| D1 -D0 = |
| Base cycle, |
| MSD |
| W5 -- -- -- -- All zeroes |
| W6 -- -- -- -- All zeroes |
| W7 "0" CHECKSUM D2 -D0 = |
| CHECKSUM |
| ______________________________________ |
| ______________________________________ |
| Msg #2, transmitted if SYNC off. |
| D2 D2 D1 D0 |
| ______________________________________ |
| W0 "1" "1" 0 "1" Message ID "D" |
| W1 % Avg Out IN "0" D3 -D1= |
| Direction; |
| D0 ="0" |
| W2 D A T A ECLT, LSD |
| W3 D A T A ECLT, ISD |
| W4 "0" Spdchange DATA D2 Speed Change |
| (MSD)D1 -D0 = |
| ECLT |
| W5 D A T A Speed Change |
| W6 D A T A Speed Change |
| W7 "C" CHECKSUM D2 -D0 = |
| CHECKSUM |
| ______________________________________ |
CHECKSUM is generated by counting all the binary "1"s in the message and then storing only D2 -D0 of that count as the CHECKSUM.
The GAPOUT routine determines whether a gapout condition has been reached. "Gapout" is related to time intervals between volume sensor actuations and consequently related to the distance between cars. The artery traffic signal is green as long as cars continue to stream over the sensor. When that stream is interrupted, that is, a "gap" appears, it is assumed that a "platoon" of cars has been serviced and the signal may go red. The length of the gap is not constant, but is made available to the routine for purposes of determining gapout.
The gapout condition is of interest only during the period designated SG, that is, when the artery is assumed green. Thus, the GAPOUT routine is only used during SG. When gapout is achieved, the routine sets a flag which is reset during Red phase and whenever a car is detected during green.
Although there are four volume sensors, only the two in the currently by valid direction are of interest. (In Average mode, gapout is not used). The selected volume sensors are monitored and pauses in actuation of both detectors are determined by keeping a previous reading of CARWT in local registers called GPSVOLD, and comparing them with the newest reading. Unless a difference in reading is noted, the gap counter, GAPCTR, is incremented; if an actuation occurs, it is cleared. When the tally in GAPCTR reaches the actual gap value, the gapout flag GAPFLG is set. When the next car is detected, the flag is reset and the counter returned to zero. Should the time between cars exceed 9.9 seconds the gap counter is held at this value.
The GAPEND routine calculates the Green phase duration in Directional mode. A maximum of three quantities form this raw value. The first is the current accumulated time in this Green phase plus the last car passage time. The second is the weighted volume car count up to this time. The third is the directional occupancy value in seconds. The raw value is then bounded by minimum green and maximum green and posted as ECLGN. If the occupancy value dominates then a flag OCCDET is set, otherwise it is reset. ECLGN2, the time for SYNCEND, is also setup. Finally GAPPROC is set. Thus GAPEND will not be executed again this cycle. VOLSAV is executed now so later cars will be counted with red extensions.
The SYNCEND routine is used only during a Directional mode. It is called only by GRNUPDIR, two seconds before the end of SG. The purpose of the SYNCEND program is as follows:
1. Terminates the Sync pulse.
2. Calculates ECLT, total cycle length, which is known at this time since the commitment to end green has been made.
3. Determines whether to continue in a Directional mode or switch to Average (Calls DIRSEL for this information).
4. Calls SPDCVT to set up upcoming Speed Change.
5. Calls BASCYCNW in order to obtain new split and the new (if changed) Max Side Street setting of TWS.
The new maximum side street time is needed to allow calculations of the upcoming cycle length for average, and also to have it ready for telemetry at the start of SG. However, the old value is still needed to finish the timeout of SR, which will commence after the next two seconds. Hence, a dual register BASEOLD is set aside for the Max Side Street time still actually in effect.
During a Green Directional non-manual phase the GRNUPDIR routine is called once a second on the second to time out the phase. In order to logically separate the functions, GAPEND and SYNCEND are separated out as subroutines, but are called by GRNUPDIR only. The logic of shifting between the subphases of green is handled by GRNUPDIR while the majority of the calculations for the subphase timings are handled in GAPEND and SYNCEND.
The first subphase of green is the gap inhibit period, the length of which, TRDLCP, is set by GRNIN just previous to this green time. The next subphase is spent waiting for a gap as signalled by GAPFLG set by GAPOUT. At this point GAPEND is executed, and the green phase duration, ECLGN, is established. There is now a waiting period until two seconds before the end of green. Then SYNCEND is executed which terminates sync and posts the total effective cycle length, ECLT. Then the final two seconds pass and GRNUPDIR sets SYSTAT=0 meaning red time has come. In order to assure that green time does not exceed maximum green, either the gap searching phase or both this and the gap inhibit phase may be cut short by an abrupt transition to gapend time. This limit is maximum green minus last car passage time, calculated by GRNUPDIR at the beginning of green as MAXGNLCP.
This routine operates during SR, artery red, which corresponds to artery side street service. The period SR is defined by the setting of the MAX Side Street Time thumbwheel switches. There are two sets of these switches, corresponding to Split 1 and Split 2. During REDTIME, the time for SR will not necessarily be the most recent split selected as a result of the previous GRNUP operation; it will be the split in effect at the start of GRNUP. The proper time will appear in BASEOLD, from which REDTIME gets its information.
The function of REDTIME is to time out SR and to develop certain information during that time as follows:
1. Calls RAMP, a routine which determines the increment of time to be subtracted from the gap time every second. RAMP is called three seconds after REDTIME begins, a period in which there is little processing activity. Since RAMP involves a division, it will perform the operation without interfering with other processes.
2. Calls in thumbwheel switch settings or other parameters of interest, two seconds after the start. This option is exercised only if other routines cannot efficiently service the fetch and translate operations on their own.
3. When SR is finished, as indicated by the equality between an incrementing counter ACTGN and BASEOLD, the routine GRNIN will be called. This prepares the system to enter the Green phase with certain data. In particular, the weighted values generated during REDTIME by the UPDATE routine are used in establishing an initial Green time, assuming a Directional mode.
The GRNIN routine is executed at the end of Red time by both REDTIME and MANUAL. It performs the housekeeping chore of setting SYSTAT to hexadecimal `83` corresponding to sync "on", green volume extensions, and Green phase.
GRNIN examines the weighted car count for the currently active direction (in averge it uses outbound), and selects the maximum valid value. TR (TRED) is determined by bounding the value generated with respect to minimum and maximum green. This value is used for Display purposes and to calculate the gap inhibit period TRDLCP (=TRED--Last Car Passage), which is used in the following Green phase if it is directional.
DIRSEL is a subroutine of SYNCEND, GRNUPAVE and MANUAL. It is used to determine the direction of traffic for the next cycle.
Direction decision is based on two criteria:
1. Calculated (or "desired") direction. The volume of traffic entering each end of the artery over the past cycle indicates the desired direction. Thus, if there is a heavy preponderance of inbound versus outbound actuations, the artery should favor inbound traffic. If the traffic volumes are nearly the same, the artery should be in an AVERAGE mode.
2. Previous direction of traffic. To prevent the street from swinging from one direction to another with each cycle, constraints are introduced. Switchover from inbound to outbound (or vice-versa) requires the street to go through a period of time in average. Thus, any change out of a Directional mode will initially be into average. The movement into average and the time spent in a selected average cycle length in average is subjected to time constraints set in by two single digit thumbwheel switches, representing "Minutes". These switches indicate how much time must pass before the street can change from a direction "Into" average. Once it enters average, it will dwell there until it receives a command to move into another direction. While it is in average the time "in" is measured, and there is a delay corresponding to the setting in moving between selected cycle lengths. If the calculated direction becomes inbound or outbound while the street is in average, the system will complete the current average cycle and then move into the new direction. Directional flow is given preference over average routing by this algorithm.
The first instructions calculate the "desired" direction. Based on this direction, it is seen whether a change in direction is indicated. If so, the constraints described in (2) above are checked to see if sufficient time has elapsed for the change to take place. If so, the routine sets the new direction in RAM; if not, it does not change the previous direction.
The timing is not accomplished by this routine; the routine sets flags which indicate to an external 30 second timing routine whether the "Into" or the "In" time counters should be decremented, or whether neither should be touched. DIRSEL does, however, set up the counters so that they may be decremented.
The CONVRT program converts the two directional occupancy percentage values to seconds green time. The variables X, Yin and Yout enter into the calculation as set by single digit TWS values representing percentages where:
0%≦X≦90%
10%≦Y≦100%
OCCP=OCC%=occupancy percentage developed from street data, inbound and outbound
MinGrn, MaxGrn=Minimum and Maximum green time ##EQU2## Furthermore, T is constrained so that 0≦T≦299. This value is returned as occupancy seconds green time.
For ease of calculation, the case where OCCP-X>0 is separated from the case where OCCP-X<0. Furthermore, 1/Y-X) is handled as a lookup (10 different values which (1/Y-X) can take on) followed by a multiplication. If MinGrn>MaxGrn, no computation is performed, which results in undefined values for occupancy seconds. If Y≦X the value 1/(Y-X) is set equal to (1/100).
The GRNUPAVG routine includes AVCYC as a subroutine. The routines are used during SG and serve to time out SG when the system is in an average mode. During AVERAGE mode, sensor activity is not used to determine present green time, but may be used to determine the green time for the succeeding cycle. Hence, the length of green is known before SG is entered, and the timing out process simply involves counting until the preselected average cycle green has been completed. However, calculation of a new cycle length in AVERAGE mode is relatively lengthy.
Once a cycle length has been established in AVERAGE mode, it cannot be changed sooner than permitted by a thumbwheel switch setting designated Average "In". (The same setting is also used to govern the minimum time a setting of Speed change is used.)
The subroutine AVCYC first determines whether the preset time has elapsed. If it hasn't, the same setting for the green portion of the average cycle is used, and the total cycle length is recomputed on the basis. An exception arises if split is changed, in which case the entire cycle is recomputed.
If the preset time has elapsed, a new average cycle length is computed. Computation takes place in two steps:
1. The quantity (INs +OUTs /2 is calculated as per equation (1) above.
2. The average cycle length TWS setting closest to this calculated value is used as the selected cycle length.
The factors inbound and outbound used in the calculation refer to the inbound and outbound sensors, both volume and occupancy. There are a total of four inbound and four outbound sensors. The largest inbound and the largest outbound are selected for the factors.
In this mode of operation the operator controls direction from the front panel override switches, and selects cycle length by means of the TWS normally used for display selection. The average cycle length corresponding to the TWS setting is selected where select positions 1-4 correspond to settings #1-4 respectively, and positions 5-9 and 0 correspond to setting #1.
Volume and occupancy data is maintained during MANUAL mode although not used at this time. Internally the master unit is maintained ready to revert to automatic operation. Telemetry does not distinguish between AUTOMATIC and MANUAL modes. Auto split and speed change functions are transmitted as usual. ECGNAV is used as the length of green variable so that it will be reasonably defined if the first automatic cycle after a manual period is AVERAGE.
The procedure for entering and leaving MANUAL mode mimics that for changing between AVERAGE and DIRECTIONAL. DIRSEL sets up DIRNEW to manual at SYNCEND time. Two seconds later at the beginning of red, REDTIME or MANUAL, whichever has control sets DIRSTAT equal to DIRNEW. The next second, DRVMAS calls the now appropriate REDTIME or MANUAL. If the latter, the new cycle length is read in and green and red times calculated. A telemetry message composed during the first second of REDTIME could contain a value of ECLT corresponding to the cycle that was to have been, but has been overridden, if the manual enable is recognized before a cycle that was to have been average.
MANUAL mode operates as a one second routine during both Red and Green phases of a MANUAL cycle. While the operator selects the cycle length, housekeeping continues in order to facilitate change back to AUTOMATIC mode.
During Red phase at two seconds, the cycle length is read in and ECLT and related parameters are developed. At three seconds, SETUP and RAMP are executed, as usual. Finally when ACTGN reaches BASOLD, GRNIN is executed and ACTGN reset.
During Green phase VOLSAV is executed at the beginning of LCP time as determined by the previously calculated ECLGNLCP. At SYNCEND time DIRSEL, SPDCVT, and BASCYCNW are executed. If the next cycle is to be automatic AVERAGE, AVCYC is called to establish a proper average cycle length. If the next cycle is not to be manual, a value for ECLT is calculated.
This routine is called every thirty seconds and is used to time out certain lengthy time intervals, intervals whose resolution is not critical. It is used to service counters associated with the AVERAGE mode plus Speed Change. It services the following four counters:
1. SPEEDTM--Counts the time dwelled in the same speed change.
2. AVCYCTM--Counts the time dwelled in the same average cycle length.
3. INAVTM--Counts the time the system has been in the AVERAGE mode. The AVCYC routine continually sets this counter back to its preselected full scale (from 0 to 9 minutes) as long as routine DIRSEL indicates that AVERAGE is the desired mode; the counter is allowed to time out only while the system is in AVERAGE but desires to move to a Directional mode.
4. INTOAVTM--Counts the time the system has desired to move into the AVERAGE mode, but is still in the Directional mode. This counter is continually reset back to its preselected full scale (0 to 9 minutes) as long as the DIRSEL routine indicates that the desired traffic flow is the same as the direction of flow presently in use by the system.
The CTRLMNTR routine ignores the above counters unless the D7 bit is set to "1". In that event, it is permitted to operate on the counter by decrementing it. When all the bits except D7 are zero, the routine clears the counter permitting the operating routine to inspect it for a zero condition.
The major portion of the routine is a called subroutine, and additional counters can be serviced by inserting the address and a call instruction.
This routine compares four available switch settings with a calculated cycle time, and selects the switch setting closest to the calculated cycle time. The selected setting is then stored as the new cycle length, AVSEL.
The four switch settings are designated "average cycle length" on the average module of the master unit, and each setting comprises a three digit thumbwheel switch. Maximum cycle length is 299 seconds.
Prior to entering this routine, a decision will have been made that the desired direction is AVERAGE, and that the time during which this chosen direction is applicable has exceeded a preset value. Similarly, once this routine is entered, the chosen setting will not be changed until a preset time has expired.
This routine is responsible for setting up the adjacent indicator bank to reflect the choice for cycle length. The indicators are reset by CYCLESTAT when the Directional mode switches out of AVERAGE. These indicators are also used to reflect which manual cycle length is in effect, at which time they are set by the MANUAL routine.
This routine is used to compute the average of all values of occupancy stored in queues.
There are four occupancy sensors and each sensor is continually monitored. The sensor is interrogated every 33 milliseconds and the amount of time it is On is determined by accumulating "1" responses from each sensor over a 30 second period. Thus, a 30 second period would yield a total number of 900 if the sensors were continuously on. Since this is a two byte quantity, at the end of 30 seconds the accumulated total is divided by four (shift out two LSB) to obtain a one byte quantity.
The result of the 30 second accumulation is then changed to a percentage and stored in a queue. The queue can store between 2 seconds and 8 seconds worth of data, that is, between 4 and 16 thirty second accumulations. As each 30 second "packet" is stored, the oldest 30 second packet is dropped. The number of minutes of storage is fixed in PROM.
Thus, to obtain the value of the running average of a sensor, the appropriate queue is addressed. The number of consecutive active addresses is determined by checking the governing value stored in PROM. Then, the entries in the queue are added, and the total is divided by (900/4)×No. of half minutes (that is, minutes×2).
The RUNAVG routine assumes the presence of all needed data in queues and the governing minute total in PROM. The routine accomplishes the totalling and then the division of each queue. Results are stored in RAM as a group of four one byte numbers, each byte representing a number up to 99 (which will be assumed to be 100% occupancy).
Division is avoided by setting up a table for the reciprocal of all the possible divisor quantities; there are eight possible values, assuming values from 1 to 8 are used.
A queue is used to compose a running average for each of the four occupancy sensors. Each of the four queues occupies up to one "block" of RAM space, that is, up to 16 bytes of RAM per queue.
The queues are all updated at the same time, namely every 30 seconds. Updating consists of fetching a counter, whose recycle period is fixed by a number set into PROM which represents time in half minutes (30 seconds), using the counter to build an address, and successively putting new values into the addressed slot by overwriting the oldest value. The 30 second accumulated counts are kept in RAM pairs, four such pairs, labeled OCCLK (1-4), being set aside. A pair of registers is needed since the count may reach 900. However, this degree of resolution is not needed for the queue, and in order to keep update values to a single byte, the original count is divided by four--the two least significant bits are dropped.
After each 30 second update, the running average for each queue is computed by taking the total count of all of the queue contents and dividing by the number of queue entries. This number is then converted to a percentage by determining the total number of counts possible and dividing. Since there are only a few possible values which the divisor can assume, the reciprocal can be stored in a table and the division changed to a multiplication. When the values of the running average are computed, and translated to percentages, they are stored as one byte quantities RUNAVG (1-4).
There are two Queue related routines:
1. QUEUE (2000)
2. OCCFAULT (1700)
The function of QUEUE has been explained above. OCCFAULT determines whether an occupancy sensor has been inactive for 15 minutes or fully active for 5 minutes; either condition represents a fault. OCCFAULT may either inspect the OCCLK double byte location for zero or full scale, or inspect the latest Queue location for the same values. Full scale or zero should cause a relevant clock to be incremented, the action continuing unless partial activity clears the counter. When the count exceeds preset limits the most significant bit of the counter is set and further counting inhibited. The MSB is then used as a fault indication.
PAC Overview of Secondary OperationThe secondary unit responds to commands originating at the master unit, reflecting these commands in overriding outputs to the controller. The outputs are phased so as to provide coordinated traffic flow through the artery.
In essence, the secondary unit mirrors cycle length messages from the master unit, but with a delay designated as the "offset". The offset is primarily determined by the distance of the secondary unit from the end of the artery nominally taken as the origin. The origin will be at one end for an Inbound directional mode, and at the other end for either Outbound directional or Average modes of operation.
During Directional modes of operation, the offset delay is maintained even in situations where the secondary unit is so far removed from the origin that several cycle lengths may intervene. Since each cycle length may differ from its predecessor, it is required that the secondary unit "memorize" each succeeding cycle length so that it reproduces that cycle at the proper delayed time (offset) with respect to the origin. With this facility a "platoon" of cars moving through the artery is accorded the same cycle time as when it moved through the origin, and successive platoons may receive differing cycle times in accordance with their requirements.
The various cycle lengths are stored in the secondary unit memory in a queue. The number of cycle lengths stacked up in the queue depends upon the distance of the particular secondary unit from the origin and the cycle length time. At a secondary unit distantly located, under conditions of short cycle lengths, a larger number of cycle entries will have to be stored; conversely, a secondary unit located within a single cycle length of the origin would require only a single queue entry. Provision is made to store up to 24 queue entries, a number which accomodates anticipated worst case combinations of cycle length and artery length. A flexible stack pointer arrangement in RAM memory allows ready modification for further queue entries, should they be required.
The queue has one entry for each platoon of interest to the secondary. (Platoons that have already passed a secondary are no longer of interest.) Each entry includes the time at which the platoon entered the artery, the direction of travel, the length of the cycle, and selection of one of two splits, which control the amount of time assigned to the cross street phases. This queue serves as the temporary storage for all information received from the master. The information is stored until it is used by the secondary unit to control the timer (controller) to service the corresponding platoon as it arrives at the intersection.
As information is removed from the queue it is checked for appropriateness. If the time associated with the entry does not match the time that the platoon entered the street (calculated as current time minus travel time) a search is made for a queue entry closer to the correct time. If no usable entry is found, the secondary unit reverts to standby mode and waits for a new telemetry message.
The queue is maintained as a circular list in a fixed buffer area. There are two pointers to the list; one is updated as entries are added to the list and the other as entries are deleted from the list.
Much of the secondary unit program is given over to strategies for accomodating perturbations in the traffic flow, such as momentary failures, changes in offset, changes in direction and changes in split selection. These disruptions may cause queue changes or rearrangement; an object of the program is to minimize traffic flow discontinuities until normal operation is resumed, and to minimize the time needed to resume normal operation.
All timing within the arterial system is ultimately referenced to the master unit, and to maintain system timing integrity each secondary unit maintains a clock which reproduces the action of the master unit clock, without regard to offset considerations. This clock, the "Master Clock" is kept in synchronism by a routine which monitors the sync line from the master unit. A second clock called the Running Time Clock, runs continuously, using the Master Clock as a source. The Running Time Clock has a resolution of one second and cycles at a count of 9999. This count represents a time very large in comparison with any practical offset and provides a means of keeping accurate track of events occurring within the queue. A third clock, the "Secondary Clock" governs the secondary as it times out each phase. In the absence of the types of perturbations mentioned above, this clock will mirror the Master Clock but with a phase delay equivalent to the effective offset. All three clocks are software counters utilizing the 60 Hz real time clock as the basic time source and the Master sync pulse for synchronization.
The functions of the three clocks are as follows:
1. The Master Clock serves as a local reproduction of the clock at the system master unit, allowing ready access at the secondary to the basic reference time source.
2. The Running Time Clock is used as a time tag for each new entry into the queue. When the Master Clock reads zero, corresponding to the start of a new cycle at the master unit, the Running Time Clock is read and its setting is written into the next queue location. Eventually, the contents of the queue location are retrieved for servicing by the secondary unit, and at that time the setting written into the queue entry is compared with the current Running Time Clock value. Under normal conditions, the difference between the queue value and the current value will be the offset, that is, the queue entry is retrieved for servicing exactly at the offset time in seconds after the cycle is initiated at the master unit. The Running Time Clock therefore serves as a check against changes in offset. Also, successive queue entries should, assuming no offset changes, contain Running Time Clock entries which differ from each other by the last cycle length. Failure of these conditions to obtain will bring corrective routines into play.
3. The Secondary Clock times out the actions which take place after a queue entry has been fetched. Under normal conditions this clock is simply a delayed version of the Master Clock. If corrective actions are taken, however, intermediary cycle lengths may have to be synthesized to bring the system back into synchronism, and the Secondary Clock will also serve to time out these special (transitional) cycles.
A special problem is posed when the system changes from an Average to a Directional mode. During Average mode, platoons do not move in a favored direction. Thus, at the instant of transfer to a Directional mode there is no queue built up at any secondary unit. Each secondary unit responds to this situation by immediately building a "phantom" queue, in which each entry is the cycle length of the first platoon to enter the artery in the directional mode. Each secondary unit then enters a "transitional" mode in which it moves from the last (Average) cycle length through intermediate cycle lengths until it is in step with the queue entries it has built up. After the first platoon has passed through the origin, each secondary unit will add successive platoons to its queue in the normal manner. Thus, by the time the first "directional" platoon reaches a remote secondary unit, directional flow will have been established and successive platoons will move through with their preassigned cycle lengths.
When the system changes from Directional to Average, the change is accomplished in a "ripple through" fashion rather than instantly switched over. Thus, a platoon which has been shaped while the master unit was dictating directional flow moves through the entire artery in the favored direction, and each secondary unit switches over to the Average mode only after the last "directional platoon" has passed through that secondary unit.
The actions described above are accomplished by storing in each queue entry the cycle length to be associated with it, and the direction assigned to it. Each secondary unit interprets this information as it retrieves successive queue entries, and acts through the Queue and Transition routines to respond to the information in an appropriate manner. A more detailed explanation of the key processes performed by the secondary units is given below.
As each cycle is completed, a new entry is removed from the queue and executed. This process involves examining the contents of the queue entry, the phase duration thumbwheel switches for the corresponding split module, and the appropriate offset thumbwheel switches. This information is used to calculate how long the secondary unit should remain in each of the requested phases.
In some cases, where the secondary is close to the master, the queue entry is not immediately available. The secondary will then begin to execute a very long cycle, and revise the associated phase durations when the master unit completes the transmission of the cycle length to the secondary unit.
The secondary maintains its internal cycle only as a reference for the phase of the controller. The controller must keep up with its associated secondary unit to maintain coordination along the roadway. The secondary unit maintains this synchronization by issuing a force-off command to the controller whenever it steps to the phase ahead of the controller. Thus the controller advances when the secondary unit does, and the roadway stays in coordination along its length.
There are also circumstances when the controller will skip a phase because there is no traffic on the associated side street. The secondary unit allows the controller to dwell in the resultant phase until the secondary unit overtakes the controller, wherein the force-off commands resume.
The coordination point for each cycle is the end of the arterial green phase. The length of the following cross street phases is determined by the corresponding thumbwheel switch settings. Any extra time in the cycle, not needed to service the cross streets, is added to the arterial green phase of the following cycle. Thus, the last cross street may be forced off, causing the controller to enter arterial green, when the secondary unit is still executing the previous cycle. This fact is noted by the secondary unit, and the extra time is used if any timing adjustments are required (transitions, described below).
Transition is the state of a secondary unit changing from one offset to another. The offset of a secondary unit is its distance from the entrance of the coordinated roadway, measured as traveling time (in seconds) for a vehicle traveling along the roadway. Although the physical distance (in feet) from the entrance of the coordinated roadway to an intersection (secondary unit) is constant, the offset varies with the speed of traffic flow. Also the direction of the dominant traffic flow may change, which causes offset to be calculated from the other end of the roadway. Thus, the offset is a function of physical location, direction and traffic speed.
For a transition state to be induced, a change in offset must occur. Because the physical location of a secondary unit does not change dynamically, offset changes are due primarily to changes in traffic speed or direction. (A system start-up may also cause a transition.) Changes in speed may occur frequently and are the most common cause of transitions. When the speed changes, the offsets of the secondary units change. Each one second change in offset must be corrected by a one second cycle length change in transition (unless the net offset becomes greater than one cycle length or less than zero, when a greater transition may occur).
Direction changes also cause transitions by changing offsets, there being one offset setting for each direction. The AVERAGE mode uses the outbound offset thumbwheel switch setting, but is computed differently than OUTBOUND mode, so a change to or from AVERAGE mode is considered a direction change and may cause a transition.
Startup occurs at random time with respect to the coordinated cycles, so a transition is usually required to coordinate the secondary units with the rest of the system.
There are two transition states, shorten and lengthen. The secondary unit is said to be in a lengthen state when the secondary is ahead of where it should be (in time) and needs to lengthen the next cycle(s) to restore coordination. The shorten state requires a shortening of the next cycle(s).
A secondary unit that is in transition is also out of coordination and must shorten or lengthen one or more of its cycles to restore coordination. The secondary unit accomplishes these changes as gradually and smoothly as possible, without taking more than three cycles to restore coordination. All transitions are evaluated once each cycle and appropriate action is taken. The first two transition cycles are limited to relatively small changes in cycle length. The third transition cycle is allowed larger changes, so that transition always ends by the third cycle.
The transition logic is able to change from shortening to lengthening (or from lengthening to shortening) if required. If a larger amount of shortening is required, it is better for traffic flow to lengthen over several cycles than to omit a large portion of a cycle to catch up. This allows a greater percentage of the total time to be devoted to arterial green phase, while still bringing the secondary into coordination promptly. An effect of lengthening may be to eliminate a queue entry and, in effect, drop a platoon. The transition logic also takes into account the history of the timer at the intersection in order to minimize traffic perturbations. If the timer went into arterial green phase early, or if there is a long phase on the last cross street (which may be omitted using the phase omit command), then larger shortens are possible.
Even though no errors occur in the maintenance of the queue, the queue may occasionally get out of phase with the platoons on the roadway. This can occur with a large speed change, which may cause platoons to appear or disappear, as the speed of traffic is changed retroactively by the speed change commands. Transitions may also add or delete platoons, as seen in the example above, where a cycle (and the corresponding platoon) was omitted.
These anomolies of queue operation, queue errors, are manifested by an error in the calculated time of platoon entry into the roadway, as compared to the time shown in the queue entry. The queue errors are handled in the queue recovery process. The secondary unit begins with the most recent telemetry message, assumed to be valid, and works backwards in time until it finds an entry near the correct time. This entry is then used as the next entry. If no usable entry can be found, the secondary unit enters a startup mode, which gives it another clean start and removes the data anomaly that caused the error.
There are four types of routines in the system.
a. The routines that handle the telemetry run very frequently and are, for all practical purposes, running continuously.
b. The display and telemetry message handling routines are run at 100 msec intervals.
c. The majority of the routines are run at one second intervals. All routines that count out cycle and phase durations are run once per second and thus operate on integral time intervals.
d. Queue and transition routines act only once per cycle. Once the associated values have been calculated, they remain constant for the duration of the cycle.
The reliability of the secondary unit operational characteristics results largely from the dual counter concept. This is the program structure that maintains the Master Clock and a Secondary Clock which is a reconstructed image of the Master Clock. The Master Clock is necessary to allow the secondary unit to maintain system coordination. The Secondary Clock is a counter which allows the secondary to operate properly despite a momentary telemetry disturbance. The secondary uses its internal Master Clock to keep track of what the master unit is probably doing. The Master Clock in the secondary unit acts like a flywheel that keeps the secondary unit running even if telemetry fails. Causes of telemetry failure include any failure that causes the master unit to stop transmitting messages, message checksum errors, sync line not changing state twice per cycle, clock line not changing state, or disconnected telemetry line.
When telemetry fails, the secondary uses its Master Clock to drive the modules that place messages in the queue. The speed, direction and cycle length used are identical to the last message received correctly, but the time of platoon entry is calculated for each successive cycle.
When the master unit transmits a message that calls for a direction change, the message is stored by the secondary unit, but probably not executed immediately. If the change is from a DIRECTIONAL mode (either inbound or outbound) to AVERAGE, the directional messages already in the queue represent directional platoons that will be protected as they travel down the roadway. Only the platoons that follow them will be associated with the average direction. After all directional platoons have been serviced, the execution of average cycles will begin. When an average cycle is to be executed, the most recent average cycle is taken from the queue. Immediately, after an executed direction change to average there may be several average messages in the queue. The older ones are discarded and only the most recent one is used since its information content supercedes all others. Thus all secondary units execute the same average message at nearly the same time; these messages do not ripple down the artery as the directional ones do.
If the change is from average to a directional mode, there is only one message available (the directional one) but the offset may be larger than one cycle length and therefore the queue contains messages for more than one platoon. The secondary unit handles this by creating entries in the queue for enough "phantom" platoons to cover the required offset. While the corresponding vehicles did not enter the roadway as a directional platoon, they will be serviced as if they did and their time of artery entrance is calculated and placed in the queue entry.
The secondary unit thus creates a backlog of directional quene entries to be executed when these are needed to cover a large offset change associated with the direction change. This procedure minimizes the need for large transition states associated with these direction changes.
The key programs utilized by the secondary units are discussed below and annotated program listings are given in the appendix.
An overall block diagram of the software controlling the operation of a secondary unit 40 is shown by the main driver routine TRFCTL illustrated in FIG. 14. A brief description of the main routines is set forth hereinbelow.
STARTUP--Calls PHTMSET to set the phase times for the standby cycle length. The routine jumps to the DRIVER routines starting at PRIORITY, and does not return to STARTUP unless RST 0 is executed (irrecoverble queue error or end of free-operation) or power on sequence occurs.
PHTMSET--Calls TWS for each of the three cross street phases. Calls SPLITSUM to calculate the length of main street green.
DRIVER--Loops on a call to PRIORITY until carry is set, indicating 100 millisecond mark, then jumps to TRFCTL if 1 second mark is set. If not, calls DISPLAY and returns to the loop above. TRFCTL jumps back to the DRIVER when it is finished.
PRIORITY--Handles telemetry. Calls SYNC to maintain exact synchronization between master and secondary. Reads telemetry lines and calls NIBVER to verify that the nibble is new and valid. NIBVER then calls MESSCOMP to compose the message. The message is stored by TRANSEFF and placed in final location by TRANSMOD.
TRFCTL (Traffic Controller)--The main line routine, executed once per second, that calls the primary system modules. Portions of this routine are executed only once per cycle, under control of SPLITIME.
TELCHECK--Watches for telemetry failure and sets TELFAIL if it occurs. Uses TELRESET to reset TALFAIL at the start of sync.
CTRMAS--Handles all master counters and synthesizes data during telemetry failure. After 30 minutes of telemetry failure, creates the standby mode, using PHTMSET.
CTRSEC--Handles all secondary counters. Sets ADVREQ when new cycle has started and new queue entry is available.
OFFMAS--Calculates offset on the basis of telemetered data just received from the master. Calls TWS (and FORMATCP) to read and format the offset thumbwheel switches. Calls LMITCHK to check and limit cycle length size.
QUEUE--Maintains the queue by adding and deleting entries. Calls AVDIR if synthetic platoons must be created. If an old message is removed from the queue, moves it to execution area by calling MOVEQ and sets offset error by calling SECSYNC.
OFFSEC--Calculates offset on the basis of data just removed from the queue for execution. Uses OFFMAS to do the arithmetic.
SECSYNC--If ADVREQ is set (at the start of message execution) calculates the offset error and green times. Calls LDECLP to copy ECLP from present queue entry and CKRANG to calculate the offset error.
SPLITIME--Detects the end of a cycle and initializes the new cycle.
DECISION--Calculates the exact remaining cycle length at the start of message execution. Calls PHTMSET to set the required phase times. Calls MODO to set PHDR and LDECLP to copy ECLP from the present queue entry. Calls TRANSITION if an offset error exists.
PHASE DECR--Decrements PHDR and goes to the next phase when it reaches zero.
FORCEOFF--Issues force-off command when secondary steps ahead of the street. Calls LAMPFORM to decode phase status.
LATCHES--Sets front panel indicators. Calls LAMPFORM to decode status and direction.
MONITOR--Calculates values from operator's monitor display.
INTADV--Performs the interval advance function if the associated timer sticks.
FREEOP--Puts the timer into free operation if that input goes true but not in a test mode. Does a RST 0 at the end of free operation to produce a clean restart.
DISPLAY--Displays the selected value. Performs tests if requested.
TRANSITION--Handles offset error by shortening or lengthening cycle length, or by adjusting queue. QRECOV is called to lower offset error to below cycle length. Calls SHORTEN or LENGTHEN as required. May call SNCHG to change the sign of the offset error. If QRECOV does not work, attempts to recover valid status using just the most recent queue entry. Calls AVIDR if directed, then calls MOVEQ, OFFSEC and SECSYNC.
QRECOV--Works backwards from most recent queue entry to find one with a low offset error. When it finds one, it updates the queue pointers.
SHORTEN--Calls MODO to calculate PM. If offset error is positive, calls SNCHG. Calls LENGTHEN if it is unable to handle the offset error by shortening.
LENGTHEN--If transition counter is equal to 2, calls CKRANG and STORE to set the offset error to the original sign for test of negative offset error on last transition cycle (special case--dwell in green full cycle). Calls MODO to calculate PM. If offset error is negative, call SNCHG.
A more detailed description of the subroutines governing the secondary unit operations are set forth hereinbelow.
This routine turns phase and direction indicators off. It obtains split information from PHSTAT and turns on the corresponding indicator (1 to 8 on the Split-1 and Split-2 modules). Direction is obtained from PRESQ+3 and a corresponding indicator is energized on the Direction module. LATCHES is a one second routine, and it calls LAMPFORM to decode an integer to a bit.
This routine decodes an integer to a single 0 bit and sets all other bits to 1.
Input: Accumulator
Output: Accumulator
Accumulator must not be 0 on entry.
| ______________________________________ |
| Examples: |
| In Out |
| ______________________________________ |
| 1 1 1 1 1 1 1 1 0 |
| 2 1 1 1 1 1 1 0 1 |
| 3 1 1 1 1 1 0 1 1 |
| 4 1 1 1 1 0 1 1 1 |
| ______________________________________ |
FORMATCP (Format, Complement, Pack)
The FORMATCP routine packs data read from three thumbwheel switches into two bytes.
Input: LSD in E Register
ISD in D Register
MSD in B Register
Output: φ, MSD in D
ISD, LSD in E
Example: TWS setting=1 2 3; X=undefined nibble
In: E=XC
D=XD
B=XE
Out: E=23
D=01
This routine is called by DECISION and TRANSITION. It gets the cycle length from PRESENT queue entry and stores it in ECLP (Effective Cycle Length).
This routine is called by TRFCTL (Traffic Controller) when ADVREQ (Advance Request) is set (once per cycle). It calls LDECLP to get cycle length from PRESENT queue entry, and stores it in ECLP (without flag nibble). It then calculates TRP (Time Remaining-Present)=ECLP--ACTP (Accumulating Cycle Time-Present) and calls PHTMSET (Phase Time Set). If DIFF is not zero and not in standby, it calls TRNSTN. If TRNSTN returns carry clear, the routine exits. If TRNSTN returns carry or if TRNSTN is not called, the routine calls MODO (PM=GRTR) and then moves PM (Phase M) to PHDR (Phase Decrement) with the result:
PHDR=GRTR=ECLP-ECLB(I)--ACTP,
where ECLB is the Effective Cycle Length-Base, that is, the maximum side street time as set on the TWSs of the master unit. The index (I) is used to differentiate between Split 1 and 2.
This routine stores telemetry data as follows:
ECLB: Set by the first C message after start of sync and not changed for the duration of the cycle, D7=split, D6=status of strobe (origin of information), D5-D4=direction.
ECLT: Set by the D message, D1-D3=direction Not used in any other routine,
ECLB1: Last C message for split 1,
ECLB2: Last C message for split 2. SPD WRP DIR Set by D message, takes effect next cycle. SPD WRP %AVG Set by D message, takes effect next cycle.
This routine checks a four digit value to ensure it is between 30 and 299. If it is outside this range, it is set to 30.
Input: Address of value in H, L Registers
Output: Value unchanged or set to 30
This routine is called from only one place in OFFSEC and may be placed on line or deleted.
This routine is called by PHTMSET to count the number of phases and place the maximum phase number in MAXP.
This routine is called by TRFCTL each second. It decides if the "10 second" routine should be called by testing ADVREQ. If so carry is set on return.
If ACTP>400 or TRP=0 then set parameters to start new cycle as follows:
ACTP=0
TRP=299
PHRD=299
Phase Omit=Reset
Phase Status=0
The "10 second" routine is called once each cycle (by DECISION) at a time period nominally 10 seconds into a cycle. Typically the program waits 10 seconds before testing queue to see if valid information is contained therein.
This routine is called by TRFCTL and decrements the phase decrementing counter (PHDR). If the counter reaches zero, the phase status is incremented, and the new phase duration is placed in PHDR. A phase omit on the last phase or incrementing past the last phase will set phase status to zero.
PHTMSET is the main routine and calls TWS for each of the three cross street phases. SPLITSUM calculates the length remaining for main street green, P0, as follows:
PO=ECLP-(P1+P2+P3)
and NUMPHASE sets MAXP to the maximum phase number.
TWS uses FORMATCP to do the conversion after the switches have been read.
This routine is called by DECISION for a nonzero DIFF.DIFCOM (see CKRANG routine) is lowered to less than 2 (ECLP) using QRECOV, followed by AV/DIR if needed. Offsets, DIFF, DIFCOM and ECLP are updated if required. If DIFCO is large, a search is made of other queue entries to find a more appropriate platoon. If after the search, no queue entry can be found which reduces (DIFCOM to less than 2 (ECLP), then a fault condition is assumed and the system restarts (sets RST 0, and executes next instruction from location 0).
This routine lengthens a cycle by up to 30 percent of ECLP and increments the transition counter (TRANCTR). The transition counter counts the number of cycles during a transition. The program limits this number to a maximum value of three. If the difference is negative on entry, it is changed to positive using SNCHG before proceeding. The lengthening is accomplished by adding the desired value to TRP and PM, then storing in PHDR.
If TRANCTR is already 2 on entry, and even though shortening would be preferable, the secondary must dwell in phase zero for the full cycle. This is accomplished by setting:
TRP--ECLP--DIFCOM--ACTP
PHDR is set to TRP+1; it will be decremented immediately after exit.
This routine used by SHORTEN and LENGTHEN to calculate phi-sub-m (PM). PM is set to green time remaining (GRTR) plus 1 since PHDR has not yet been decremented for this cycle.
The secondary resync (SECSYNC) routine is called by TRFCTL and others and acts only if ADVREQ is set. It calls CKRANG to determine the difference (DIFF) for the PRESENT queue entry, after QUEUE has advanced the queue. The values
SG=ECLP-ECLB (I)
GRTR=SG-ACTP are calculated, where SG is System Green and GRTR is Green Time Remaining.
This routine is called by TRANSITION or SECSYNC and determines the difference (DIFF) between the PRESENT queue entry and the predicted running time counter. On input H,L is the queue running time counter address pointer. On output D,E is difference complete (DIFCOM), the 4-nibble BCD unsigned difference. DIFF is signed BCD(-79 to +79) and is in L. H is a flag, 0-6 as follows:
| __________________________________________________________________________ |
| R 2 1 0 4 5 6 |
| __________________________________________________________________________ |
| Difference |
| ##STR7## |
| ##STR8## |
| ##STR9## |
| ##STR10## |
| ##STR11## |
| ##STR12## |
| __________________________________________________________________________ |
DIFF=(Queue time+Offset)-(Running Time Clock-ACTP) If DIFF is negative, secondary is late (need to shorten cycle to correct).
If DIFF is positive, secondary is early.
Routine is called by TRANSITION if the queue pointers get out of step. This happens when the program is unable to shorten and lengthens instead, resulting in an extra entry in the queue. The routine starts with the most recent queue entry (CQP2--queue pointer #2) and works backwards until:
1. DIFF is between -10 and -1 (slightly late), and if not, until,
2. DIFF is the smallest positive value available, and if no positive value,
3. CQP2 is used. The routine uses MOVEQ to update the present queue image (PRESQ).
Routine sets:
DIFF=L
DIFCOM=D, E Called by QRECOV.
This routine builds a phantom queue. It is called once whenever the mode changes to either direction. The change is made at all secondary stations in the same cycle, and involves lengthening a cycle from zero to NEWCY seconds. The phantom queue is built by transforming the latest validated telemetry message to a set of queue entries, one entry for each synthetic (phantom) platoon required to fill the arterial from the master sync point (entrance) up to the location of the secondary unit. The entries are created starting with the most recent entry and working backwards in time for N entries, where N is calculated by OFFMAS. The running time count in each entry in one cycle length less than for the following entry.
NEWDIR: The new direction
NEWCY: The new cycle length, converted to seconds if %AVG
OFFSET: The distance from the master sync point in seconds, at a speed change of 1.00, read from TWS
TIME: Working running time register used in calculations
POINTER: Pointer to cycle queue entries
N: Number of cycle queue entries to fill.
This routine is called by TRFCTL and maintains the queue. When ACTM (Master Counter)=0 the Running Time Counter is stored in the queue. At ENDSYNC=1, the cycle length and flags are stored in the queue, and the new queue entry is created. When ADVREQ=1 the next queue entry is made the PRESENT one, and the entry is moved to PRESQ. A change to directional causes AV/DIR to be called. A queue full of averages causes the queue to be truncated to one entry.
This routine shortens cycle being executed if at least 75 percent of the time required to be shortened is available, and the transition counter is zero on entry. Otherwise all the time required to shorten must be available or the LENGTHEN routine is called.
In particular, the routine first attempts to accomplish the shortening using slack time, ST. If this cannot handle all of the shortening required, it tries using slack time, early green time, and excess green time (over 50 percent of cycle length). If this is not enough to reach the time required, the duration of the last phase (for three and four phase systems) is added. If this sum does not cover at least 75 percent of time required, the LENGTHEN routine is called.
The equation ST=PO-SG-CLEAR is derived as follows: ps
ST=ECLB-CROSS STREETS-CLEAR
SG=ECLP-ECLB so ECLB=ECLP-SG
PO=ECPL-CROSS STREETS so CROSS STREETS=ECLP-PO therefore:
ST-(ECLP-SG)-(ECLP-PO)-CLEAR
ST=PO-SG-CLEAR
where, CROSS STREETS=time used by secondary for side street time, SG=System Green, CLEAR=yellow and red time, and ECLB=time allowed by master for cross street time (TWS setting on master). OFFSEC, OFFMAS
The principal routine of OFFMAS and it is called directly or by OFFSEC. OFFMAS acts on incoming (master) telemetry data and OFFSEC acts on data reaching the secondary through the queue. The direction associated with average is outbound.
The following values are calculated.
| ______________________________________ |
| OFFMAS OFFSEC |
| ______________________________________ |
| OFFDIR OFFDR directional offset - read from the corres- |
| ponding thumbwheel switch and/ |
| corrected for speed change value. |
| OFFAVS OFFAV average offset - calculated based on net |
| offset. If 25% ≦ net offset ≦ 75% |
| cycle- length then average offset = 50% cycle |
| length. Else average offset = 0. |
| Calculated only in average mode.-N N N--number of whole |
| cycle lengths in |
| directional offset |
| OFFN OFFN net offset = directional offset - N × |
| cycle length. This is the remainder when |
| N is calculated. |
| ______________________________________ |
The Master Counter Update (CTRMAS) routine is a one second routine and is called by TRFCTL and handles all operations that relate to telemetry messages coming from the master. The Running Time Clock and ACTM are incremented and TRM (Time Remaining--Master) is decremented. The variables SYNCFLTR and TELFAIL are used as an input to maintain synchronization with the master and determine sync duration. When sync ends, SYNCDUR (Sync Duration), ECLM (Effective Cycle Length--Master), ECLMF (ECLM-Flag), and TRM are calculated and the flag ENDSYNC is set.
This routine is called by TRFCTL. It clears ADVREQ and increments ACTP. If ACTP=1, CYCDONE is cleared. If CYCDONE=0, the queue is checked and if a NEXT entry is available, CYCDONE and ADVREQ are set. TRP is decremented.
This routine outputs the free-op bit to the controller from images in RAM. If the free operation bit is a logical true for two consecutive seconds and unit test is false, the secondary goes into free operation and all outputs to the controller are set false.
This routine sets up 0900 thru 09DB as required for operator displays. Cycle length is calcuated as the sum of ACTP and TRP. If this value is 299, the previous cycle length is used. The minus sign is used to show standby mode in all positions except 4 (offset error), which is a signed value and keeps its inherent sign.
The values calculated are displayed by DISPLAY/TEST, depending on the setting of the single TWS.
This routine checks the input traffic light drivers and the phase TWS and sets a carry if a timer phase should be "on" but is not. The ring to be evaluated is stored in D (0=ring 1, 1=ring 2). First, controller inputs are examined and if any are "on", return is made with carry clear. The street phase is calculated by STREETPH, and then SCREEN looks for existence of a corresponding phase in the ring in question. If one exists return is made with carry clear.
INPUTS: D; ring to be screened
OUTPUTS: Carry set if in a clearance Carry clear if green or absent phase
This routine determines what phase the street is actually in by looking at the associated timer inputs for both rings. These are or'ed together and the resultant phase is found by table lookup. The table is as follows:
| ______________________________________ |
| OR'ed LIGHT |
| HEX. EQUIV. SIGNALS TABLE |
| TO STREETS 4 3 2 1 VALUE |
| ______________________________________ |
| 0 0 |
| 1 0 0 0 1 1 |
| 2 0 0 1 0 2 |
| 3 0 0 1 1 1 |
| 4 0 1 0 0 3 |
| 5 0 |
| 6 0 1 1 0 2 |
| 7 0 |
| 8 1 0 0 0 4 |
| 9 1 0 0 1 4 |
| A 0 |
| B 0 |
| C 1 1 0 0 3 |
| D 0 |
| E 0 |
| F 0 |
| ______________________________________ |
If the table value is 0, the phase cannot be determined (system is in clearance) and return is made with carry set. A nonzero table value (and corresonding ring 2 value which is 4 higher) is compared with the TWS settings to determine which secondary phase corresponds. If none (due to error in TWS settings), return is made with carry set. (If setting is A, Ring 1 is Phase 1, Ring 2 is Phase 5, etc.)
Routine calculates street phases for both rings by reading and decoding the twelve position switches providing settings of 1-8 and A-D. The accumulator is preserved. A zero is returned for a phase not selected.
| ______________________________________ |
| INPUTS: H, L TWS address |
| D ring, 0 = Ring 1, 1 = Ring 2 |
| OUTPUTS: If D = B = Ring 1 |
| C = Ring 2 |
| If D = 1 - B = Ring 2 |
| C = Ring 1 |
| ______________________________________ |
Example 1: TWS reads A, register D=1, On return B=5 and C=1. This is because the letter A corresponds to street phases 1 and 5 for Ring 1 and 2, respectively.
Example 2: TWS reads 7, register D=0. On return B=0 and C=7.
The foregoing description and disclosure of the invention including the following appendix is illustrative and explanatory thereof, and various modifications and improvements may be made by those skilled in the art within the scope of the appended claims without departing from the spirit of the invention. ##SPC1## ##SPC2## ##SPC3## ##SPC4## ##SPC5## ##SPC6## ##SPC7## ##SPC8## ##SPC9## ##SPC10## ##SPC11## ##SPC12## ##SPC13## ##SPC14##
McReynolds, Marshall B., Oscar, Irving S., Van Tilbury, Jack
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| Executed on | Assignor | Assignee | Conveyance | Frame | Reel | Doc |
| Sep 09 1980 | TRAC, Inc. | (assignment on the face of the patent) | / |
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