An electronic timepiece having an A.M. and P.M. display function. The characters A or P are displayed during time setting or correction by one discretionary display element of a plurality of display elements normally used for displaying time.
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1. An electronic timepiece, comprising: an oscillator circuit for generating a repetitive time standard signal; a divider circuit receptive of the repetitive time standard signal for dividing the same and for developing a repetitive output signal having a repetition rate defining a unit of time; a time counter circuit connected to receive the dividing circuit output signal for counting the same and for developing a count representative of time; an AM/pm counter circuit connected to said time counter circuit and responsive to the count developed therein for developing a count indicative of whether the time is AM or pm; display means having a plurality of digit display positions for displaying time; decoder means connected to said time counter circuit for developing decoded output signal groups each for enabling a respective digit display position of said display means to enable said display means to display the time represented by the count developed by said time counter circuit; AM/pm decoder means receptive of one decoded output signal group from said decoder means and receptive of a control signal and connected to receive the count developed by said AM/pm counter circuit for developing the applied decoded output signal group as an output signal and responsive to the control signal for developing an output signal effective to display a character representative of AM and for developing an output signal effective to display a character representative of pm according to whether or not the control signal is applied to said AM/pm decoder means and according to whether or not the count developed by said AM/pm counter circuit represents AM or pm; a driving circuit receptive of the decoder means output signal groups for driving said display means to display time and receptive of the output signals developed by said AM/pm decoder means for driving said display means to display characters representative of AM and pm; and means for selectively developing said control signal.
7. An electronic timepiece, comprising: an oscillator circuit for generating a repetitive time standard signal; a divider circuit receptive of the repetitive time standard signal for dividing the same and for developing a repetitive output signal having a repetition rate defining a unit time; a time counter circuit connected to receive the dividing circuit output signal for counting the same and for developing a count representative of time; means connected to said time counter circuit and responsive to the count developed therein for developing an AM/pm signal representative of whether the time is AM or pm; display means having a plurality of digit display positions for displaying time; decoder means connected to said time counter circuit for developing decoded output signal groups each corresponding to a respective digit display position of said display means in order to enable said display means to display the time represented by the count developed by said time counter circuit; AM/pm decoder means receptive of one decoded output signal group from said decoder means and receptive of a control signal and connected to receive the AM/pm signal for developing the applied decoded output signal group as an output signal and for developing an output signal effective to display at a predetermined one of said digit display positions a character representative of AM and for developing an output signal effective to display at said predetermined one of said digit display positions a character representative of pm according to whether or not the control signal is applied to said AM/pm decoder means and according to whether or not the AM/pm signal represents AM or pm; a driving circuit receptive of the decoder means output signal groups for driving said display means to display time and receptive of the output signals developed by said AM/pm decoder means for driving said display means to display characters representative of AM and pm; and means for selectively developing said control signal.
2. An electronic timepiece according to
for driving said display means. 3. An electronic timepiece according to claim 1:, wherein the digit display positions of said display means are seven segment arrays. 4. An electronic timepiece according to claim 3:, wherein said AM/pm decoder means is effective to display the character A to indicate AM and the character P to indicate pm. 5. An electronic timepiece according to claim 4, wherein said AM/pm decoder means is comprised of: five two-input OR gates each having a first input connected to receive one of the output signals of the applied decoded output signal group corresponding to segments of the digit display position which will be illuminated if either A or P is displayed, and each having a second input connected to receive the control signal for enabling the corresponding segments in response thereto; a two-input AND gate circuit having a first inverting input connected to receive the control signal and a second non-inverting input connected to receive the one of the output signals of the applied decoded output signal group corresponding to the one of the segments of the digit display position which will not be illuminated when either A or P is displayed; a pair of two-input AND gate circuits including a first of the pair having one input connected to receive the control signal and another input connected to receive the one of the output signals of the applied decoded output signal group corresponding to the segment of the digit display position which will be illuminated when A is displayed but which will not be illuminated when P is displayed, a signal from said AM/pm counter circuit representative of AM and pm, and the second of the pair having a first inverting input connected to receive the control signal and a second non-inverting input connected to receive a signal from said AM/pm counter representative of AM and pm; the one of the output signals of the applied decoded output signal group corresponding to the segment of the digit display position which will be illuminated when A is displayed but which will not be illuminated when P is displayed; and another two-input OR gate circuit having two inputs each connected to an output of a respective one of said pair of AND gate circuits. 6. An electronic timepiece according to claim 1, further comprising: a switch operable during time setting for applying the control signal to said AM/pm decoder means. 8. An electronic timepiece according to
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The present invention relates to an A.M. and P.M. display method in a digital timepiece of 12 hours cycle display time.
Conventionally, for a timepiece of this type, A.M. and P.M. dislays are distinguished by flashing of particular segments (e.g. a colon to distinguish hour and minute figures or a day display segment of the like) on a display panel or, a letter simply designating A.M. or P.M. is provided to constantly display A.M. or P.M.
In the former case, however, since A.M. or P.M. are distinguished by flashing of particular segments, it is impossible for a user to read out A.M. or P.M. unless he gets used to the timepiece. While in the latter case it is disadvantageous with respect to manufacturing cost and reliability since two surplus output terminals from a timepiece circuit IC is necessary, and moreover, it is difficult to provide a letter indicating A.M. and P.M. in a small display panel such as that used in a wrist watch.
It is an object of the invention to provide A.M. and P.M. indication without providing a new display segment. A.M. and P.M. are displayed utilizing seven segments of a minute figure (1 minute or 10 minutes figure) only when the time display is corrected (hereinafter the operation is designated as time correction), wherein A.M. is designated as "A" and P.M. is designated as "P".
The reason why A.M. and P.M. are displayed only in case of time correction is that normally, a user is seldom required to read out A.M. and P.M. from the timepiece except in case of time correction, and so it is However, as for the The output 24 from the A/P flop flop flip flop or counter 16, as comprises an AM/PM signal representative of whether the time is A.M. or P.M. and the signal is fed along a line 24 to an AND gate 35 closes, only 33 which, when closed, enables the one minute counter output 2C is to be displayed.
In case of time correction, on the other hand, as the time correction switch 21 responsive to an external command is ON and the line 22 becomes logic level "1", the logic gates 31-34 and 36-39 31-32 and 34-39 in FIG. 2 close and only the gate 35 33 opens, and so the A/P flop flop flip flop output is displayed on the output 2C. While the other outputs 2A, 2B, 2E, 2F and 2G become logic "1" and the output 2D becomes logic "0". FIG. 3 shows the relation between each of the segments of the seven segment array which comprises the one minute figure digit and the A/P decoder output.
When time is corrected, the segment 2D becomes "0" (i.e. darkened non-illuminated) and the segments 2A, 2B, 2E, 2F and 2G become "1" (i.e. illuminated). Then, if the AM/PM output signal of the A/P flip flop output is selected so that the segment 2C becomes logic "1" in A.M., the digit displays "A", while when the segment 2C becomes logic "0" in P.M., the digit displays "P" and either A.M. and P.M. is immediately read out.
As illustrated so far, according to the present invention, an effective A.M. and P.M. display method can be obtained simply without providing a surplus display element or figure or an electric output terminal.
In the present embodiment, though A.M. and P.M. is displayed by the 1 minute or 10 minutes figure segments, the other display segments (e.g. seven segments for a day or a month display) can be utilized in the same way.
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Executed on | Assignor | Assignee | Conveyance | Frame | Reel | Doc |
Mar 04 1981 | Kabushiki Kaisha Daini Seikosha | (assignment on the face of the patent) | / | |||
May 18 1983 | KUSUMOTO, YASUO | KABUSHIK KAISHA DAINI SEIKOSHA | ASSIGNMENT OF ASSIGNORS INTEREST | 004150 | /0367 |
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