An apparatus for electronically controlling an internal combustion engine of automobiles, in which a processor comprising a CPU, a RAM and a ROM is determined to be in the state of its normal operation when the processor delivers a predetermined pulse train in response to an interrupt signal having a predetermined period and supplied to the processor, and in which a backup circuit is actuated by a discriminant signal indicating the abnormal operation of the processor so that the operation of controlling the internal combustion engine, normally performed by the processor, is performed by the backup circuit.
|
1. An electronic control apparatus for an internal combustion engine comprising
a processor having a central processing unit, a random access memory and a read-only memory utilized for controlling operational conditions of said engine; means for generating an interrupt signal pulse train having a predetermined period for causing an interrupt request signal to be applied to said processor; and means for detecting said processor to be in a state of its normal operation and generating an output signal in response to said processor generating a signal equivalent to a pulse train having a pulse duration substantially equal to said predetermined period.
38. An electronic control apparatus for an internal combustion engine comprising:
a processor having a central processing unit, a random access memory and a read-only memory utilized for controlling operational conditions of said engine; means for generating an interrupt signal pulse train having a predetermined period for causing an interrupt request signal to be applied to said processor; and means for detecting said processor to be in a state of its normal operation and for producing an indication when said processor is not generating a signal equivalent to a pulse train having a pulse duration controlled in accordance with said interrupt request signal.
35. For use in a processor-controlled apparatus for controlling the operation of an internal combustion engine in response to sensor signals representative of operating conditions of the engine supplied thereto, an arrangement for detecting misoperation a malfunction of said apparatus comprising:
first means, coupled to said processor, for periodically generating an interrupt signal and causing an interrupt request signal to be supplied to said processor; and second means, coupled to said processor, for generating an output signal representative of a malfunction of said apparatus in response to said processor failing to generate a signal equivalent to a periodic pulse train the period of which corresponds to the period of said interrupt signal.
8. An electronic engine control apparatus adapted for use with a combustion engine comprising
digital processing means having a central processing unit, a random access memory and a read-only memory, utilized for controlling operational conditions of said engine; interrupting signal generating means for generating an interrupting signal pulse train having a predetermined period to be applied to said digital processing means in response to delivery of data representative of an interval period corresponding to said predetermined period from said digital processing means; and detecting means for detecting said digital processing means to be in a state of its normal operation in response to said digital processing means producing output data corresponding to a pulse train having a pulse duration substantially equal to said predetermined period of said detecting means.
37. For use in a processor-controlled apparatus for controlling the operation of an internal combustion engine in response to sensor signals representative of operating conditions of the engine supplied thereto, an arrangement for detecting normal operation of said apparatus comprising:
first means, coupled to said processor, for generating a first data signal representative of the frequency at which an interrupt signal for causing an interrupt request to be coupled to said processor is to be generated; second means for storing a second data signal the value of which is periodically changed at a constant frequency; third means, coupled to said first and second means, for generating said interrupt signal in response to the value of said second data signal having a predetermined relationship with said first data signal; and fourth means, coupled to said processor, for generating an output signal representative of normal operation of said apparatus in response to said processor generating a signal equivalent to a periodic pulse train the frequency of which corresponds to the frequency represented by said first data signal.
36. For use in a processor-controlled apparatus for controlling the operation of an internal combustion engine in response to sensor signals representative of operating conditions of the engine supplied thereto, an arrangement for detecting misoperation a malfunction of said apparatus comprising:
first means, coupled to said processor, for generating a first data signal representative of the frequency at which an interrupt signal for causing an interrupt request to be coupled to said processor is to be generated; second means for storing a second data signal the value of which is periodically changed at a constant frequency; third means, coupled to said first and second means, for generating said interrupt signal in response to the value of said second data signal having a predetermined relationship with said first data signal; and fourth means, coupled to said processor, for generating an output signal representative of a malfunction of said apparatus in response to said processor failing to generate a signal equivalent to a periodic pulse train the frequency of which corresponds to the frequency represented by said first data signal.
15. An electronic control apparatus for an internal combustion engine having:
sensor means for producing signals representative of operating conditions of said engine; actuator means for controlling respective energy conversion functions of said engine in response to control signals applied thereto; an input/output unit coupled to receive signals produced by said sensor means and to deliver control signals to said actuator means, and a data processing unit, coupled to said input/output unit, for carrying out engine control data processing operations in accordance with signals produced by said sensor means and thereby generating engine control codes that are coupled to said input/output unit; said input/output unit comprising: first means for generating an engine control timing signal pattern through which operational events of said engine are controlled; second means, coupled to said data processing unit, for storing said engine control codes; third means, coupled to said first means, for generating respective engine timing codes the values of which are selectively modified by said engine control timing pattern; fourth means, coupled to said second and third means, for comparing respective ones of said engine control codes with respective ones of said engine timing codes and producing respective output signals when said respective engine control codes define a prescribed relationship with respect to said engine timing codes; fifth means, coupled to said fourth means, for producing control signals to be coupled to said actuator means in response to the output signals produced by said fourth means; sixth means, responsive to the generation of an output signal by said fourth means, for generating an interrupt signal of a prescribed duration to be coupled to said data processing unit; and seventh means, coupled to said data processing unit, for generating a signal representative of a malfunction of said data processing unit, in response to said data processing unit failing to generate a prescribed signal representable by a pulse train having a pulse duration corresponding to said prescribed duration.
25. An electronic control apparatus for an internal combustion engine having:
sensor means for producing signals representative of operating conditions of said engine; actuator means for controlling respective energy conversion functions of said engine in response to control signals applied thereto; an input/output unit coupled to receive signals produced by said sensor means and to deliver control signals to said actuator means, and a data processing unit, coupled to said input/output unit, for carrying out engine control data processing operations in accordance with signals produced by said sensor means and thereby generating engine control codes that are coupled to said input/output unit; said input/output unit comprising: first means for generating an engine control timing signal pattern through which operational events of said engine are controlled; second means, coupled to said data processing unit, for storing said engine control codes; third means, coupled to said first means, for generating respective engine timing codes the values of which are selectively modified by said engine control timing pattern;
fourth means, coupled to said second and third means, for comparing respective ones of said engine control codes with respective ones of said engine timing codes and producing respective output signals when said respective engine control codes define a prescribed relationship with respect to said engine timing codes; fifth means, coupled to said fourth means, for producing control signals to be coupled to said actuator means in response to the output signals produced by said fourth means; sixth means, responsive to a selected one of the respective output signals produced by said fourth means, for generating an interrupt signal to be coupled to said data processing unit; and seventh means, coupled to said data processing unit, for generating a signal representative of a malfunction of said data processing unit, in response to said data processing unit failing to generate a prescribed signal the state of which changes within a prescribed period of time following its previous change of state. 2. An electronic control apparatus according to
an interval register in which said processor sets data representative of said predetermined period, a counter the contents of which are sequentially incremented in accordance with a clock signal supplied thereto, and an interrupt request signal generating circuit for generating said interrupt signal in response to the contents of said counter reaching a value corresponding to said data representative of said predetermined period stored in said interval register.
3. An apparatus as claimed in
a first pulse generating circuit for receiving said pulse train and for generating a single pulse having a predetermined duration in response to the leading edge of a pulse of said pulse train, a second pulse generating circuit for receiving said pulse train and for generating a single pulse having a predetermined duration in response to the trailing edge of a pulse of said pulse train, and an OR circuit for receiving the outputs of said first and second pulse generating circuits to form a logical sum and for delivering a continuously constant level signal in response to said pulse train being applied to said first and second pulse generating circuits.
4. An apparatus according to
a backup circuit for controlling the supply of fuel to the engine, said backup circuit delivering a predetermined signal to control the supply of fuel in response to a signal representing the rotational speed of the engine crankshaft and a signal representing the flow rate of air drawn into the engine; and a circuit for actuating said backup circuit in response to the absence of the output signal of said detecting means.
5. An apparatus according to
a backup circuit for controlling ignition timing, said backup circuit delivering a predetermined signal to control ignition timing in response to a signal representing the rotational speed of the engine crankshaft and a signal representing the flow-rate of air drawn into the engine; and a circuit for actuating said backup circuit in response to the absence of the output signal of said detecting means.
6. An apparatus according to
a circuit for actuating said backup circuit in response to the absence of the output signal of said detecting means.
7. An apparatus according to
a backup circuit for controlling ignition timing, said backup circuit delivering a previously fixed signal to control ignition timing; and a circuit for actuating said backup circuit in response to the absence of the output signal of said detecting means.
9. An electronic engine control apparatus as claimed in
an interval register for storing the data representative of said interval period from said digital processing means; counting means the contents of which are successively incremented in response to a clock signal which is applied to said counting means; and an interrupt generator for generating an interrupting signal, said interrupt generator including a comparator, inputs of which are coupled to the outputs of said interval register and said counting means, for comparing the output of said interval register with the output of said counting means.
10. An electronic engine control apparatus as claimed in
a first pulse generating circuit for generating a single pulse having a predetermined duration in response to the leading edge of a pulse of said pulse train received from said processing means; a second pulse generating circuit for generating a single pulse having a predetermined duration in response to the trailing edge of a pulse of said pulse train received from said processing means; and an OR gate for receiving the outputs of said first and second pulse generating circuits to form a logical sum and for outputting a signal having a continuously constant level in response to said pulse train being applied to said first and second pulse generating circuits.
11. An electronic engine control apparatus as claimed in
a register holding data representing the valve opening period of a fuel injector for said engine; a backup circuit outputting a desired data signal to control the fuel injection of said engine, said backup circuit receiving a data signal representing the rotational speed of said engine and a data signal representing the flow rate of air drawn into said engine; gate means for gating either of the outputs of said backup circuit and said register in response to the output signal from said detecting means, inputs of said gate means being coupled to the outputs of said backup circuit and said register, and the output of said gate means being coupled to the input of said comparator; and an actuator for controlling the fuel injection of said engine, said actuator being coupled to receive the output of said comparator.
12. An electronic engine control apparatus as claimed in
a register holding data representing a crank angle of said engine; a backup circuit outputting a desired data signal to control the ignition timing of said engine, said backup circuit receiving a data signal representing the rotational speed of said engine and a data signal representing the flow rate of air drawn into said engine; gating means for gating either of the outputs of said backup circuit and said register in response to the output signal from said detecting means, the inputs of said gating means being coupled to the outputs of said backup circuit and said register, and the output of said gating means being coupled to the input of said comparator; and an actuator for controlling the ignition timing of said engine, said actuator being coupled to receive the output of said comparator.
13. An electronic engine control apparatus as claimed in
a register holding data representing the valve opening period of a fuel injector for said engine; a backup circuit outputting predetermined fixed data for controlling the fuel injection of said engine; gating means for gating either of the outputs of said backup circuit and said register in response to the output signal from said detecting means, the inputs of said gating means being coupled to the outputs of said backup circuit and said register, and the output of said gating means being coupled to the input of said comparator; and an actuator for controlling the fuel injection of said engine, said actuator being coupled to receive the output of said comparator.
14. An electronic engine control apparatus as claimed in
a register holding data representing a crank angle of said engine; a backup circuit outputting predetermined fixed data for controlling the ignition timing of said engine; gating means for gating either of the outputs of said backup circuit and said register in response to the output signal from said detecting means, the inputs of said gating means being coupled to the outputs of said backup circuit and said register, and the output of said gating means being coupled to the input of said comparator; and an actuator for controlling the ignition timing of said engine, said actuator being coupled to receive the output of said comparator.
16. An electronic control apparatus according to
17. An electronic control apparatus according to
a backup circuit for controlling the supply of fuel to the engine, said backup circuit delivering a prescribed signal to control the supply of fuel in response to a signal representing the rotational speed of the engine crankshaft and a signal representing the flow rate of air drawn into the engine, derived in accordance with outputs of respective sensor means; and means, responsive to the signal generated by said seventh means, for activating said backup circuit.
18. An electronic control apparatus according to
a backup circuit for controlling ignition timing, said backup circuit delivering a prescribed signal to control ignition timing in response to a signal representing the rotational speed of the engine crankshaft and a signal representing the flow-rate of air drawn into the engine derived in accordance with outputs of respective sensor means; and means, responsive to the signal generated by said seventh means, for activating said backup circuit.
19. An electronic control apparatus according to
a backup circuit for controlling the supply of fuel to the engine; and means, responsive to the signal generated by said seventh means, for activating said backup circuit.
20. An electronic control apparatus according to
a backup circuit for controlling ignition timing; and means, responsive to the signal generated by said seventh means, for activating said backup circuit.
21. An electronic control apparatus according to
a backup circuit for generating a prescribed data signal to control said respective actuator means to supply fuel to said engine, said backup circuit receiving a data signal representative of the flow of air drawn into the engine and a data signal representative of the rotational speed of the engine crankshaft; and gate means for coupling either of the outputs of said backup circuit and the fuel supply code stored by said second means to said fourth means in dependence upon the generation of a signal by said seventh means.
22. An electronic control apparatus according to
a backup circuit for generating a prescribed data signal operate a respective actuator means to control the ignition timing of the engine, said backup circuit receiving a data signal representative of the rotational speed of the engine crankshaft and a data signal representative of the flow rate of air drawn into the engine; and gate means for coupling either of the outputs of the backup circuit and the crank angle code stored by said second means to said fourth means in dependence upon the generation of a signal by said seventh means.
23. An electronic control apparatus according to
a backup circuit for generating a prescribed data code to control said respective actuator means to supply fuel to said engine; and gate means for coupling either of the outputs of said backup circuit and the fuel supply code stored by said second means to said fourth means in dependence upon the generation of a signal by said seventh means.
24. An electronic control apparatus according to
a backup circuit for generating a prescribed data code to control a respective actuator means to control the ignition timing of the engine; and gate means for coupling either of the outputs of said backup circuit and the crank angle code stored by said second means to said fourth means in dependence upon the generation of a signal by said seventh means.
26. An electronic control apparatus according to
27. An electronic control apparatus according to
a backup circuit for controlling the supply of fuel to the engine, said backup circuit delivering a prescribed signal to control the supply of fuel in response to a signal representing the rotational speed of the engine crankshaft and a signal representing the flow rate of air drawn into the engine, derived in accordance with outputs of respective sensor means; and means, responsive to the signal generated by said seventh means, for activating said backup circuit.
28. An electronic control apparatus according to
a backup circuit for controlling ignition timing, said backup circuit delivering a prescribed signal to control ignition timing in response to a signal representing the rotational speed of the engine crankshaft and a signal representing the flow-rate of air drawn into the engine derived in accordance with outputs of respective sensor means; and means, responsive to the signal generated by said seventh means, for activating said backup circuit.
29. An electronic control apparatus according to
a backup circuit for controlling the supply of fuel to the engine; and means, responsive to the signal generated by said seventh means, for activating said backup circuit.
30. An electronic control apparatus according to
a backup circuit for controlling ignition timing; and means, responsive to the signal generated by said seventh means, for activating said backup circuit.
31. An electronic control apparatus according to
a backup circuit for generating a prescribed data signal to control said respective actuator means to supply fuel to said engine, said backup circuit receiving a data signal representative of the flow rate of air drawn into the engine and a data signal representative of the rotational speed of the engine crankshaft; and gate means for coupling either of the outputs of said backup circuit and the fuel supply code stored by said second means to said fourth means in dependence upon the generation of a signal by said seventh means.
32. An electronic control apparatus according to
a backup circuit for generating a prescribed data signal operate a respective actuator means to control the ignition timing of the engine, said backup circuit receiving a data signal representative of the rotational speed of the engine crankshaft and a data signal representative of the flow rate of air drawn into the engine; and gate means for coupling either of the outputs of the backup circuit and the crank angle code stored by said second means to said fourth means in dependence upon the generation of a signal by said seventh means.
33. An electronic control apparatus according to
a backup circuit for generating a prescribed data code to control said respective actuator means to supply fuel to said engine; and gate means for coupling either of the outputs of said backup circuit and the fuel supply code stored by said second means to said fourth means in dependence upon the generation of a signal by said seventh means.
34. An electronic control apparatus according to
a backup circuit for generating a prescribed data code to control a respective actuator means to control the ignition timing of the engine; and gate means for coupling either of the outputs of said backup circuit and the crank angle code stored by said second means to said fourth means in dependence upon the generation of a signal by said seventh means.
|
|||||||||||||||||||
The present invention relates to subject matter described in the following applications:
U.S. Ser. No.: 943,930; Filed: Sept. 20, 1978; Hiroastu Tokuda et alBRIEF DESCRIPTION OF THE DRAWINGS IINTV INTVSTG register 408 by the processor 1402, the counter 1404 receives the stage signal INTV as a clock signal and performs a count-up operation in accordance with the operation of the incrementor 478 for the constant period T1 of time, that is, until the result of the count-up coincides with the period T1, as seen in FIG. 18(A). Accordingly, the counter 1404 delivers a signal a shown in FIG. 18(A), which is supplied to one of the two inputs of the INTV interrupt generating circuit 1406. On the other hand, since the output of the INTV register 408 is supplied to the other input of the INTV interrupt generating circuit 1406, the circuit 1406 generates an interrupt signal b pulse train (FIG. 18(B)) at the period T1. The signal b is stored as an interrupt factor in the bit position 4, i.e. 24 bit (shown in FIG. 20A), of the STATUS register (FIG. 4) and then ANDed with the contents of the corresponding 24 bit of the mask register shown in FIG. 4, to supply an interrupt requesting signal IRQ.
FIG. 19 is a flow chart illustrating the operation of the processor when an interrupt occurs. First, to ascertain the interrupt factor, the content of the bit position 4 of the STATUS register is sent to the processor while the interrupt factor is reset at the same time, that is, the content of the bit position 4 of the STATUS register is reset (see the step ○1 in FIG. 19). The interval interrupt factor is alloted to, for example, the bit position 4(24 bit), as shown in FIG. 20A and it is checked or determined whether or not the signal 1 from the INTVBF register 516 (FIGS. 4 and 8) has been held in the bit position 4. If there is held an interval interrupt factor in the bit position, the state of the previous CHECK signal c is checked, that is, whether the state of the previous CHECK signal c is "0" or not, is checked (see step ○2 in FIG. 19). The CHECK signal, represented as a signal c in FIGS. 17 and 18, is supplied from the discrete I/O circuit 130 to the one-shot circuits 1408 and 1410 and alternates between high and low levels at the period T1. Also, as shown in FIG. 20B, the CHECK signal is allocated to the 24 bit of the discrete I/O circuit 130 and can be rewritten by the processor 1402.
The processor 1402, as shown in the steps ○3 and ○4 in FIG. 19, delivers to the discrete circuit 130 the inverted version of the output state of the previous CHECK signal. Therefore, as described above, the CHECK signal c alternately takes ON and OFF states, as shown in FIG. 18(C).
The one-shot circuit 1408 generates a pulse having a duration of T2(T2>T1) which is produced in response to the leading edge of the CHECK signal c while the one-shot circuit 1410 generates a pulse having the same duration T2 which is produced in response to the trailing edge of the CHECK signal, the generated pulses being respectively signals d and e shown in FIGS. 18(D) and 18(E). Since these signals d and e are supplied to an OR gate, the output signal f of the OR gate is as shown in FIG. 18(F).
Accordingly, as long as the processor is operating normally and therefore the CHECK signal takes the ON and OFF state alternately, the STOP signal f, which is the output of the OR gate shown in FIG. 18(F).
Now, when the processor stops its operation for some reason or when it performs an erroneous operation, the processor fails to properly process the interval interrupt so that the CHECK signal, which is the output of the discrete circuit 130, remains in the ON or OFF state. Namely, if the processor commits an error or malfunction at the instant A as shown in FIG. 18, CHECK signal c is no longer generated. Accordingly, the one-shot circuits 1408 and 1410 generate no pulses, the STOP signal f turns OFF, and the lamp driving circuit 1412 is actuated to cause the lamp 1414 to indicate that the processor is in fault. When the fault of the processor is discovered, the driver (automobile driver) may change various automatic control operations into manual ones.
As described above, the fault which may occur in the processor can be detected without fail by a comparatively simple circuit. When the processor fails in its operation, the functions of controlling the fuel injection and the ignition lead angle are considered to be abnormal. It is, therefore, dangerous if a man continues to drive a vehicle with a defective processor. It is necessary to operate a backup circuit for delivering at least control signals essential for safe driving of the vehicle, when the processor is discovered to be defective.
FIG. 21 shows a circuit for actuating such a backup circuit as mentioned above by the use of the STOP signal f derived from the circuit shown in FIG. 17 and for controlling the fuel injection in place of the defective processor. Reference numeral 412 indicates an INJD register for determining the fuel injecting duration under the control of the processor 1402; 1422 a counter constituted of the instantaneous register 450 and the incrementor 478; 480 a comparator; 1000 a backup circuit; 1001 and 1002 AND gates; 1003 an OR gate; 522 and 524 the INJFF register and the INJBF register, respectively; 186 the power amplifier shown in FIG. 3; and 66 the fuel injector. The circuit 1000 may be of any type which can determine the fuel injection duration on the basis of the rotational number N and/or the air-flow rate QA or the negative pressure.
When the processor is operating normally, the STOP signal f is in the ON state so that the output of the INJD register 412 is supplied through the AND gate 1001 to the comparator 480. When the processor fails, the STOP signal f is in the OFF state. Accordingly, the AND gate 1001 is closed, the output of the backup circuit 1000 is supplied through the AND gate 1002 to the comparator 480, and fuel is injected in accordance with the output of the backup circuit.
FIG. 22 shows a circuit for actuating the backup circuit by the use of the STOP signal f and for controlling the ignition lead angle in place of the failed processor. Reference numeral 414 indicates the ADV register; 1424 a counter constituted of the register 452 and the incrementor 478; 480 a comparator; 1010 a backup circuit; 1001-1014 AND gates; 1015 and 1016 OR gates. The backup circuit 1010 may be of any type which can determine the ignition coil condition start lead angle QD and the ignition coil firing lead angle QA on the basis of the rotational number N and/or the air-flow rate QA or the negative pressure in the intake manifold. When the STOP signal f is in the ON state, the outputs of the ADV register 414 and the DWL register, which are set therein from the processor 1402, are selected. While the STOP signal f is in the OFF state, the outputs QD and QA of the backup circuit 1010 are selected.
FIG. 23 shows a specific example of the backup circuit shown in FIGS. 21 or 22, in which reference symbols QA and N denote respectively the 10-bit information representing the air-flow rate measured by the flow meter 14 and the 10-bit information representing the rotational speed of the engine. While the processor 1402 is operating normally, all ten bits of each of the items of information QA and N are used to perform a control operation with high precision. On the other hand, when the processor fails, a high precision control cannot be expected and it is only necessary to perform such controls as are essential for safe driving of the vehicle. Therefore, it is needless to use all ten bits of each item of information, that is, it suffices to use the three higher order bits, i.e. bits 7, 8 and 9. The three higher order bits of each of the signals QA and N are converted to decimal numbers by a decoder. Now, if the three higher order bits of the signals QA and N are respectively 1,0,1 and 1,0,0, those binary quantities are converted respectively to 5 and 4 in decimal notation through decoding. Accordingly, the address (5, 4) in the memory M is selected so that the information stored in the address (5, 4) and corresponding to a word controls the fuel injection and the ignition lead angle.
FIG. 24 shows a backup circuit of simple configuration without using the signals QA and N. The backup circuit is shown as adapted for the control of, for example, fuel injection as in FIG. 21. Since the stop signal f is at high level (1) during the normal operation of the processor 1402, all the gates of an AND gate group 1001A are open so that the contents of the INJD register 412 are supplied through the AND gate group 1001A to an OR gate 1003. In this case, all the gates of an AND gate group 1002A are closed since they receive the signal f through an inverter. When the signal f goes low (0) owing to the failure of the processor 1402, all the gates of the AND gate group 1001A are closed while all the gates of the AND gate group 1002A are opened. As a result, the AND gate group 1002A delivers a predetermined type of bit information (0,1, . . . 0,1, in FIG. 24), which is supplied to the OR gate 1003 to control the fuel injection in place of the failed processor 1402.
The present invention can be also achieved by an alternative embodiment in that there is provided a soft-counter program, a detecting program for detecting that values counted under the soft-counter program have reached a predetermined value, and means for clearing the counted contents by an interrupt signal with a constant period which corresponds to the signal b of the above-mentioned embodiments, in which the abnormal operation of a central processing unit can be detected by the fact that the counted contents have reached a predetermined high level so that the counted contents are no longer cleared when the central processing unit fails to process normally the interrupt signals.
As described above, according to this invention, a fault in the processor serving as the center of an automobile control apparatus can be detected by a simple circuit construction and moreover, as explained with the embodiment, the peripheral control circuits except the processor can be switched over to the fail-safe side, whereby an automobile control apparatus having high safety can be provided.
Namely, according to the embodiment, the controls of fuel injection and ignition lead can be performed by the backup circuit when the processor is operating abnormally, whereby safe driving can be continued. Moreover, the lamp is lit up when the operation of the processor is abnormal, so that the driver may be warned against an accident due to the defect of the processor.
Tokuda, Hiroastu, Imai, Masumi, Takato, Masao
| Patent | Priority | Assignee | Title |
| 5155729, | May 02 1990 | SIEMENS ENTERPRISE COMMUNICATIONS, INC | Fault recovery in systems utilizing redundant processor arrangements |
| 5694770, | Aug 09 1994 | EMITEC Gesellschaft fuer Emissionstechnologie mbH | Method and assembly for operating an electrical heater of a catalytic converter system |
| 6708089, | May 20 2002 | Mitsubishi Denki Kabushiki Kaisha | On-vehicle electronic controller |
| 7299122, | Nov 15 2005 | On demand boost conditioner (ODBC) |
| Patent | Priority | Assignee | Title |
| 3082374, | |||
| 3816717, | |||
| 3906207, | |||
| 3969614, | Dec 12 1973 | Ford Motor Company | Method and apparatus for engine control |
| 4099495, | Sep 03 1975 | Robert Bosch GmbH | Method and apparatus to determine the timing of a periodically repetitive event with respect to the position of a rotating body, and more particularly ignition timing, fuel injection timing, and the like, in automotive internal combustion engines |
| 4119070, | May 12 1975 | Nissan Motor Company, Ltd. | Closed-loop mixture control system for an internal combustion engine with circuitry for testing the function of closed loop |
| 4245315, | Feb 27 1978 | SIEMENS-BENDIX AUTOMOTIVE ELECTRONICS L P , A LIMITED PARTNERSHIP OF DE | Ignition limp home circuit for electronic engine control systems |
| 4255789, | Feb 27 1978 | SIEMENS-BENDIX AUTOMOTIVE ELECTRONICS L P , A LIMITED PARTNERSHIP OF DE | Microprocessor-based electronic engine control system |
| Executed on | Assignor | Assignee | Conveyance | Frame | Reel | Doc |
| Jan 05 1984 | Hitachi, Ltd. | (assignment on the face of the patent) | / |
| Date | Maintenance Fee Events |
| Date | Maintenance Schedule |
| Nov 11 1989 | 4 years fee payment window open |
| May 11 1990 | 6 months grace period start (w surcharge) |
| Nov 11 1990 | patent expiry (for year 4) |
| Nov 11 1992 | 2 years to revive unintentionally abandoned end. (for year 4) |
| Nov 11 1993 | 8 years fee payment window open |
| May 11 1994 | 6 months grace period start (w surcharge) |
| Nov 11 1994 | patent expiry (for year 8) |
| Nov 11 1996 | 2 years to revive unintentionally abandoned end. (for year 8) |
| Nov 11 1997 | 12 years fee payment window open |
| May 11 1998 | 6 months grace period start (w surcharge) |
| Nov 11 1998 | patent expiry (for year 12) |
| Nov 11 2000 | 2 years to revive unintentionally abandoned end. (for year 12) |