Piggy back row grabbing system

Abstract

A common channel video communication system for providing a piggy back transmission television field comprising a plurality of television video scan lines over the common channel. The television field is comprised of both at least one video displayable row of video data characters contained in a pseudo video scan line occupying one of the plurality of television video scan lines and normal television video displayable information occupying the balance of the plurality of the television video scan lines. The common channel provided piggy back transmission television fields enable the provision of conventional television as well as real time updateable row grabbed information.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is related to commonly owned U.S. Pat. No. 3,889,054, issued June 10, 1975, and is an improvement on the row grabbing system described therein; and is related to the following commonly owned copending U.S. patent applications: "Information Retrieval System Having Selectable Purpose Variable Function Terminal", filed Sept. 10, 1975, and bearing U.S. Ser. No. 611,927, by the contents of which are specifically incorporated by reference herein, this system being a further improvement on the system described in the aforementioned copending patent application, as well as being the preferred system for combining a conventionally provided television transmission therewith so as to ultimately provide a piggy pack transmission of digital data along with normal TV picture data over a conventional single normal television channel as will be described in greater detail hereinafter, such as an existing CATV channel. Preferably, the digital data contained in the pseudo video scan line portion of the piggy back transmission TV operation to transmitter portion 8202a which shall be described in greater detail hereinafter with reference to FIGS. 1, 3, 6, 7 and 8. The transmitter portion 8202a preferably provides both serial data information and status and control information to a preferred master combiner and synchronizer portion 8204, with the status and control information being bidirectional, that is transmitted to and from master combiner and synchronizer portion 8204, whereas the serial data information is unidirectional only, that is, it is only transmitted to master combiner and synchronizer portion 8204, both being provided from the transmitter portion 8202a to the master combiner and synchronizer portion 8204 in the presently preferred embodiment of the present invention. As will be described in greater detail hereinafter, with reference to FIGS. 3 and 4, the master combiner and synchronizer portion 8204 preferably combines the pseudo video scan line information transmitted from computer 2000a to generate a pseudo video scan line output for the desired number of TV scan line positions which are to contain such digital data in the TV field and combines this digital data containing pseudo video scan line or lines with the normal TV scan lines of this TV field which contain the normal TV picture data to provide the piggy back row grabbing transmission signal. This is preferably accomplished by the master combiner and synchronizer portion 8204, as will be described in greater detail hereinafter with reference to FIGS. 3 and 4, by the master combiner and synchronizer portion 8204 preferably connecting the normal TV picture data or video to the output data line 1902 during the time that digital data is not enabled so that a conventional composite video signal portion is provided which contains the normal TV picture information, while preferably enabling digital data for one or a few TV scan lines (scan line positions) towards the end of the vertical period during which the pseudo video scan lines are connected to or provided from the output data line 1902 over the same conventional TV channel as the aforementioned normal TV picture data. If the aforementioned dual interleaved transmission scheme is utilized, then the master combiner and synchronizer portion 8204 would also preferably place packets of digital information comprising a pseudo video scan line from one computer, for example computer 2000a, on odd televison scan line positions while placing packets of digital information comprising a pseudo video scan line provided from the other computer, such as computer 2000b by way of example, on even television scan line positions during the interval in the TV field when digital data was enabled, with both the odd and even television scan lines being combined to comprise the single transmitted composite pseudo video scan line output of master combiner and synchronizer portion 8204 which pseudo video scan line may preferably each comprise a total of 13 displayable television scan lines on a row grabbing terminal, such as the terminal described in U.S. Pat. No. 3,889,054. In such a dual interleaved transmission system, if either or both computers 2000a and 2000b stop sending packets of such digital information, in the interleaved mode, their respective associated or assigned scan line positions in the output portion 8204 preferably remain video "black". If either the odd or even transmission of such information, from either computer 2000a or 2000b, respectively, is turned off or not employed, as presently preferred, the system 10 will operate with a single computer 2000a in the manner described in the aforementioned copending patent application U.S. Ser. No. 611,843 , now U.S. Pat. No. 4,042,958, porch color burst and port sections of the composite video signal are preferably identical with conventional standard television transmission standards. Lastly, FIG. 5C shows a typical digital data or pseudo video scan line of the preferred piggy back transmission TV field, shown in more detail in FIG. 13, illustrating the same preferable location in time for the preferred start bit 9900 as in the normal TV picture line of FIG. 5B.

Typical Transmitter Portion-Detailed Description

Referring now to FIGS. 7 through 9, the typical preferred transmitter portion 8202a of the preferred cable head 13 of the present invention shown in block in FIG. 1 for providing the pseudo video scan line portion of the piggy back transmission TV field shall now be described in greater detail. As previously mentioned, if a second typical preferred transmitter 8202b comprises the preferred cable head 13 in an interleaved system as opposed to the presently preferred single transmitter system, then this second transmitter 8202b will preferably be identical in function and operation with transmitter portion 8202a. FIG. 7 shows those portions of the transmitter circuit 8202a which receive data from the conventional computer 2000a connectors 8640 shown illustratively in two parts labeled 8640a and 8640b, respectively which interconnect the transmitter 8202a with the associated computer 2000a. This connector 8640 is used for both the input and output lines. Data from the computer 2000a is preferably fed on parallel lines in either a 12 bit or a 14 bit configuration depending on which type of computer is utilized. Integrated circuits 8601 through 8604 which are conventional line transceiver circuits are provided and serve to receive data from the computer 2000a or to transmit data back to the computer 2000a depending upon which mode the transmitter 8202a is operating in. As was previously described, data transfer takes place in either of two modes; one mode is a direct memory access mode where data is fed continuously at maximum rate from the computer 2000a memory unit directly to the transmitter 8202a and the other mode is the status transfer mode which is utilized primarily for single word reverse direction. In both modes certain control and acknowledgement signals are preferably required between the computer 2000a and the transmitter 8202a to establish valid times for receiving and returning data in either mode.

Considering first the direct memory access mode, a control signal from the computer 2000a is preferably applied to an inverter 8608 to initiate this mode of operation. This signal is preferably asserted when the computer 2000a is ready to transmit data by direct memory access. A NAND gate 8605 is provided which is an enabling gate which receives the ready command from an inverter 8608 and also has a second enabling input provided thereto from the transmitter 8202a first in-first out buffer via path 8644. This circuit will be described in greater detail hereinafter, but suffice it to say at this time that this line must be asserted before data can be received by the transmitter 8202a. A third input is preferably provided to gate 8605 from a pair of inverters 8610 and 8611 which are connected to the computer 2000a along a path which is always asserted at the time that data break is initiated and serves to terminate the data break at the proper time. With all enabling input condition at gate 8605 met, the output of the gate 8605 preferably falls to a low level which is provided to the D input type flip-flop 8606. This flip-flop 8606 is preferably clocked by the transmitter 8202a data clock and, accordingly, the output of the flip-flop 8606 falls at the initiation of the next clock pulse. Similarly, a following flip-flop 8607 preferably responds to the next succeeding clock pulse and its output is asserted at that time. This output signal is transmitted via an inverter 8609 back to the computer 2000a as an acknowledgement that the ready status of the computer 2000a has been received and, furthermore, that the transmitter 8202a is ready to accept data. The sequence of events that then follows is that the computer 2000a applies valid data to the data line received by line transceivers 8601 through 8604. At this time the control line 8643 preferably sets the line transceivers 8601 through 8604 in their received state. In this state, the line transceivers 8601 through 8604 preferably pass data from the input to output lines which are then applied to the input of the first in-first out buffer which will be described in greater detail hereinafter. Returning once again to the control circuit, and specifically to gate 8605, once data has been strobed into the first in-first out buffer the FIFO IN ready line 8644 drops to a low level. Preferably, after two clock delays, the acknowledgement signal to the computer 2000a has returned via inverter 8609 and is returned to its original state. This signifies that the first data word has been received by the transmitter 8202a. A second cycle of control command acknowledgement and data word reception then follows, preferably exactly in the manner described above for the first word. This process continues as long as the computer 2000a remains in its direct memory access mode. At the completion of the data break, the DONE line from the computer 2000a, which is applied to inverter 8610, signifies that the data break has been completed and disables gate 8605. This terminates the direct memory access mode.

Control of the other mode, that is status transfer is accomplished by the interconnection between the transmitter 8202a and the computer 2000a shown at 8640b. This operation is preferably initiated by the INTERRUPT OUT line from the computer 2000a applied to an inverter 8614 being asserted. As a result of this assertion, another inverter 8615 presets a flip-flop 8618 and a NOR gate 8616 clears another flip-flop 8617. Flip-flop 8617 is connected to the clock input of a flip-flop 8618 which in its preset state enables a gate 8622 which permits the data clock which is applied to the other input of that gate 8622 to be applied to the computer 2000a via the INTERRUPT IN line via an inverter 8263. Transmission of this train of clock pulses from the transmitter 8202a to the computer 2000a is the transmitter's 8202a acknowledgement to the INTERRUPT OUT command. Preferably, at this time the computer 2000a applies a status word to the data input lines applied to transceivers 8601 through 8604. A control line 8643, which is connected to the output of flip-flop 8617, is preferably still in the state which sets the line transceivers 8601 through 8604 in the receive mode. Thus, the transceivers 8601 through 8604 make available at their output the status word and this word is applied to the inputs of conventional latches 8612 and 8613. After a short time has passed sufficient to insure that the data lines have stabilized, the computer 2000a asserts the INTERRUPT ACTIVE line going to the transmitter 8202a and received therein at an inverter 8619. The output of the inverter 8619 is preferably applied to the D input of another D type flip-flop 8620 so that at the initiation of the next subsequent clock pulse the output of that flip-flop 8620 is asserted enabling a gate 8621 whose output then drops to its low state; the output of gate 8621 being fed as the strobe input to the latches 8612 and 8613, the data applied to the latches 8612 and 8613 preferably being strobed into the latches 8612 and 8613 at the falling edge of this signal. The data remains at the output of the latches 8612 and 8613 preferably until at some later time when the status word reception cycle is repeated. At this time both the INTERRUPT ACTIVE line and the INTERRUPT OUT line applied to inverters 8614 and 8619 are preferably returned to their original state under control of the computer 2000a program. This completes the status work output transfer from the computer 2000a.

Preferably, automatically and immediately following a status word output transfer is accomplished. This is accomplished as follows. On the next clock pulse following return of the INTERRUPT ACTIVE line to its original state, the output flip-flop 8620 is set at a high level. This transition applied to the clock input of flip-flop 8617 causes the output of flip-flop 8617 to chage state; that is, to go from a high to a low level. This low level is preferably applied to the control line 8643 of the input transceivers 8601 throug 8604 to set them in the transmit mode. In this state, the line transceivers 8601 through 8604 connect their data input line 8648a and 8648b to the computer 2000a data bus through connector 8640a. The origin of these lines which provide the output status word will be described in greater detail hereinafter. Suffice it to say at this time that we have thus far described how, under the direct memory access mode, data is received from the computer 2000a and applied to the FIFO input lines 8648; that during a status output transfer the computer 2000a output status word is latched into buffers 8612 and 8613; and that during a status input transfer to the computer 2000a, the data on lines 8646 is applied to the computer 2000a data bus. It should be noted that line transceiver 8601 is preferably utilized only when the transmitter 8202a is fed from a 16 bit computer; when a 12 bit computer is utilized instead for computer 2000a, transceivers 8602 through 8604 process the 12 bits and line transceiver 8601 is not needed. Furthermore, when a 12 bit computer is utilized, one 12 bit word is preferably utilized to transfer two 6 bit characters. The transmitter 8202a preferably has the capability of operating with 7 bit characters. A unique feature of the pseudo video scan line transmission portion of the present invention is that it provides a capability to generate a seventh bit for at least certain characters by use of the status word. This feature generally is useful only when it is desired to set the seventh bit of some character at a value and to leave it at the same value for a very large number of consecutive character transmissions. This is precisely the situation that is often required for setting up a seventh bit for group addresses and for special characters in the row grabbing system described in the aforementioned copending U.S. patent application. , now U.S. Pat. No. 4,042,958 The particular bits which are used for seventh bit generation are preferably connected from the status word latches 8612 and 8613 to a multiplexer 8627 and are preferably selected by the multiplexer 8627 to be made available at the correct time at the output of the multiplexer 8627.

Now describing the circuit components that do the word counting as necessary to control the multiplexer 8627. One of the preferred basic functions of the transmitter 8202a is to format the words received by the computer 2000a into serial output data packets which contain 38 characters. These packets comprise the data content of the pseudo video scan line or lines portion of the piggy back transmission TV field. Since the first in-first out buffer is preferably loaded with words which consist of two characters each, it is necessary to preferably count 19 outputs of the FIFO to determine the completion of one data packet. Conventional word counters 8626, 8628 and 8629 accomplish this counting. At the beginning of any television scan line all counters 8626, 8628 and 8629 are cleared by the post-sync pulse provided via path 8648. Everytime a word is transferred out of the FIFOs, a clock pulse is made available for the counters 8626, 8628 and 8629 on line 8649. When counter 8626 is set at count 0, that is its initial condition, multiplexer 8626 preferably selects the C O input line from the plurality of input 8651 to counter 8627 and applies it to one output 8653 thereof. At the same time, it selects the C O input to counter 8627 from the plurality of inputs 8652 and applies it to the 8654 output line. Preferably, when the first word has been strobed out of the FIFO, counter 8626 advances to count 1 and the multiplexer 8627 selects line C 1 of plurality 8651 to be connected to output 8653 and selects also line C 1 of plurality 8652 to be applied to output line 8654. This process continues up to a count of 3 when, at the same time a gate 8625 applies a low level to the enabling inputs of counter 8226 and halts its counting operation until it is recleared at the start of the next television scan line. As a result, the multiplexer inputs C 3 of 8651 and 8652 are connected to the two output lines 8653 and 8654, respectively, for the remainder of the television scan line. As a result of these connections, it is possible for the computer 2000a to establish unique bit assignments for the seventh bit of each of the initial address characters and to establish a fixed bit assignment for all of the data characters. Odd and even data characters 7 bits, however, are preferably selected separately so that the result is that the seventh bit of all odd data characters will have one value and the seventh bit of all even data characters will have a value which may be the same or different as that of the odd characters. The remaining circuit components shown in FIG. 7 are preferably utilized to establish initialization and reset conditions, such as the input circuit to an inverter 8637 which, with a subsequent inverter 8638, is utilized to provide a negative initialization pulse when power is first turned on. As a result, initialization pulses are made available at the output of inverter 8638, at the output of a gate 8636 and at the output of a NOR gate 8633. Means is also provided for a reset pulse to be generated under computer 2000a control. This is accomplished during data output transfer by the computer 2000a setting the bit of the status word that ends up on line 8653 applied to NAND gate 8635. As a result of the signal on line 8661, a reset pulse is generated by NAND gate 8635 during every status transfer, during which time the other input to gate 8635 also goes high. Thus, as long as the line 8661 remains high, reset pulses will be continuously generated. Normally the status word is preferably set to cause a reset on one status transfer, a reset pulse having been created thereby as previously mentioned, the reset bit being cleared on the next subsequent status word transfer. The reset pulse from gate 8635 preferably causes a FIFO reset from gate 8636 and causes flip-flop 8634 to be cleared. With flip-flop 8634 cleared, a reset assertion is made at the output of gate 8632 and appears at the output of gate 8633 as a master reset pulse labeled RESET L. This particular reset pulse is preferably removed at the start of the next vertical drive period by flip-flop 8634 which is preferably clocked to its set state at the start of the vertical drive pulse provided at the clock input of flip-flop 8634. A slightly different form of reset under computer 2000a control is preferably accomplished when the computer 2000a sets the bit of the status word associated with line 8660. With this bit set, gate 8624 applies a negative reset pulse to gate 8632 during every status word transfer. In similar manner, in the previously described reset mode, a reset negative level is preferably provided at the output of NOR gate 8633. In this case, the reset is under direct control of the status word bit, whereas when the reset was generated by flip-flop 8634, the reset condition once started was maintained until the start of a vertical drive pulse. The reset associated with flip-flop 8634 is preferably utilized when it is specifically desired to halt transmission of data characters and to resume transmission at the start of the next vertical field. The status output bits labeled, respectively, INTERCONTROL OUT H, LAMP 2H, and LAMP 1H, on lines 8665 through 8667, respectively, are preferably utilized for signal indication and control purposes which will be described in greater detail hereinafter.

Referring now to FIG. 8, character input data is preferably applied via lines 8648a and 8648b to FIFOs 8670 through 8673. The FIFOs 8670 through 8573 are initially cleared by the reset line 8688. Data is strobed into the FIFOs 8670 through 8673 by the FIFO strobe line 8690 which is generated by flip-flop 8607 (FIG. 7). The FIFOs 8670 through 8673 preferably have capacity for storing 64 words. After the FIFOs through 8673 have been cleared and at least one word has been strobed in, data shortly becomes abailable at the FIFO output line. Availability of data at the output is signalled by the OUTPUT READY lines which are connected to gates 8675 and 8676. Thus, a high level at the output of gate 8676 indicates that all FIFOs 8607 through 8673 have valid output data available. Similarly, each FIFO 8670 through 8673 has a line which indicates that its input is ready to receive data. The INPUT READY lines are preferably connected to gates 8674 and 8677 such that the output of gate 8677 is high when the inputs of the FIFOs 8670 through 8673 are ready to receive data. The function of the INPUT READY high line 8644 was previously described in relation to the portion of the transmitter 8202a shown in FIG. 7.

The circuits consisting of components 8678 through 8686 are preferably utilized for the purpose of computing and inserting a check sum at the end of a data packet. These circuits 8678 and 8679 are preferably conventional binary adders which are connected to add two 7 bit numbers. The bits of one number are preferably connected to the A inputs and the bits of the other number are preferably connected to the B inputs. The 7 bit sum is then available at the output lines. The units are preferably connected so a carry is correctly propagated from the least significant bit to the most significant bit; however, no carry output is generated. As shown and preferred, the adders 8678 and 8679 add together the two 7 bit characters which are always available at the 14 bit output lines of the FIFOs 8670 and 8673. Thus to start with, characters 1 is added to character 2 to make their sum available at the output; then, after the next word is available at the FIFOs 8670 through 8673, character 3 is added to character 4, and so forth. This operation preferably continues for the duration of each data packet. Circuits 8680 and 8681 are also preferably binary adder circuits identical to adders 8678 and 8679. These adders 8680 and 8681 add the previous sum made available by adders 8678 and 8679 to another 7 bit number which preferably comes from a conventional storage latch 8682. For the purpose of discussion it is assumed initially that the output of latch 8682 is zero. In that case, the summation outputs of adders 8680 and 8681 are the same as the input values. Thus as the time just prior to the strobing of characters 2 and 3 out of the FIFOs, the sum of characters 1 and 2 is available at the output of adders 8680 and 8682. At the occurrence of the first FIFO strobe output on line 8690, two things happen simultaneously. First, the output of adders 8680 and 8681, namely the sum of the first two characters, are latched into buffer latch 8682 and made available at the output line of that circuit 8682. Then, the second and third characters are made available at the output of the FIFOs 8670 through 8673. As a result, at this time, connected to the input of adders 8680 and 8681, are the summation of characters 1 and 2 on one set of inputs and the summation of characters 3 and 4 on the other set of inputs. This results in, at the output of these adders 8680 and 8681, the presence of the total summation of characters 1, 2, 3 and 4. Thus, as the line progresses, at all times available at the output of adders 8680 and 8681 is the total accumulated sum of all characters transmitted up to that point. Preferably, after characreters characters 37 and 38 have been strobed out of the FIFOs, the output of adders 8681 and 8681 represents the check sum of the 38 characters processed up until that time Acutally Actually, as presently preferred, the last data character is character number 37. However, since characters are preferably handled in pairs, a dummy 38th character is included in the addition but the computer 2000a sets that dummy character to a value of zero. Thus, the summation represents the addition of characters 1 through 37. A plurality of inverters 8683 preferably form the ones complement of the check sum and provide it at the input lines of conventional multiplexers 8685 and 8686. These multiplexers 8685 and 8686 preferably serve to switch these check sum lines onto the output data lines in place of the FIFO data at the precise time necessary for the check sum to be picked up as the 38th output character. As a result, the 14 output lines 8695a through 8695n represent the character pairs necessary to form the proper final output data including the check sum. The switching of these multiplexers 8685 and 8686 is preferably accomplished by the control line 8696 labeled CHECK SUM SELECT H. This line 8696 is preferably asserted at the 18th count of the word counter 8629 (FIG. 7) which signal would then be present at the output of gate 8631 (FIG. 7).

Referring now to FIG. 9, conventional shift registers 8700 and 8701 are preferably provided to convert the 14 bit parallel input data provided via lines 8695a-8695n into serial data as necessary for final transmission. A negative pulse on line 8711 which preferably occurs once per character, preferably latches the parallel input data provided via 8695a-8695n into the shift registers 8700 and 8701. This data is then preferably shifted out serially under control of the 5.1 megaherz system clock provided via line 8712. A conventional multiplexer 8702, illustratively shown in two sections 8702a and 8702b is provided, with section 8702a connecting the output data line alternatively to the output of one or the other of the shift registers 8700 or 8701. The multiplexer 8702 is preferably switched at the character rate by control line 8714 which is shown connected as the control input to the other section 8702b of the multiplexer 8702. The output data from section 8702a is preferably connected to an inverter 8715 which makes the final output data available on line 8716. The other circuits shown in FIG. 9 are preferably utilized to generate control waveforms necessary to operate the various circuits of the transmitter 8202a already described. Flip-flops 8703 and 8704 are preferably provided to generate an initial delay after the FIFOs 8670 through 8673 first have data available. Inasmuch as data is preferably shifted out at a fixed rate for one television scan line period of the piggy back transmission TV field, preferably it is desired to insure that the FIFOs are adequately loaded with data before a line transmission is initiated. Flip-flops 8703 and 8704 thus provided an initial delay after reset equivalent to two television scan line periods which is an adequate time to insure that the computer 2000a has loaded the FIFOs 8670 through 8673 with adequate data. A three input gate 8705 is provided which tests its input lines 8720, 8721 and 8722 to determine if all conditions are met for initiating the transmission of a data packet. If the system is still in reset, as indicated by a signal present on line 8720, if the FIFOs output are not ready as indicated by a signal present on line 8721, or if the LINE ENABLE is not asserted on line 8722, the output of gate 8705 will be low and the system will be inhibited from transmitting a data packet. The aforementioned LINE ENABLE line 8722 is the one that is directly connected to the picture select circuit 8807 in the presently preferred single transmitter system, and, if a two transmitter interleaved system is utilized, it is the one that selects which of the two transmitters 8202a or 8202b is used for a particular television scan line.

When all conditions necessary to transmission are present, the output of gate 8705 goes high and at the trailing edge of the next post-sync pulse, provided via line 8648, flip-flop 8706 is set. This flip-flop 8706 preferably initiates a transmission sequence by removing the clear condition from the shift registers 8700 and 8701 and from flip-flops 8707 and 8708, the FIFO flip-flops, and the character ODD/EVEN flip-flop. One output of flip-flop 8706 preferably enables the multiplexer 8702b via path 8730. Flip-flop 8708 is preferably toggled at the character rate to generate the select input for multiplexer 8702 on control line 8714. The LOAD ENABLE waveform is connected to both the J and the K inputs of J-K flip-flop 8708 via line 8731. This pulse on path 8731 is preferably one clock period long. Thus, the flip-flop 8708 is toggled at the negative clock transition which occurs during the LOAD ENABLE pulse. The output of flip-flop 8708 provided via line 8714 is preferably high during odd character periods and low during even character periods. One input of multiplexer section 8702b is preferably connected to the LOAD ENABLE line 8731 while the other input is grounded. Therefore, the output of this multiplexer section 8702b which is provided via line 8713 consists of alternate LOAD ENABLE pulses. Thus, output line 8713 is preferably connected to the K input of flip-flop 8707. As a result, the output of flip-flop 8707, which is provided via line 8735, is set high at the completion of the last bit of each odd character and remains high during the first bit of the subsequent even character. Thus, this line 8735 is high during the first bit of even characters 2, 4, 6, etc., and is low at all other times.

Preferably, at the completion of an active television scan line associated with the portion of the piggy back transmission TV field assigned to the pseudo video scan line or lines, the transmit sequence is terminated by the word 18 pulse which is provided via line 8737. This is preferably applied to the clock input of the LINE DRIVE flip-flop 8709 via an inverter 8738. As a result, at the completion of word 18, flip-flop 8709 is set and its output provided via path 8739 goes low, clearing the READY flip-flop 8706. The output of flip-flop 8706 then returns to its original quiescent state. It should be noted that in the preferred exmple being described herein, the completion of the word 18 pulse corresponds to the completion of dummy character number 40. This is because the word 18 pulse actually is present during words 18 and 19, and as shown in FIG. 11, the completion of word count 19 preferably occurs when characters 39 and 40 are present at the FIFOs output. As further shown and preferred in FIG. 9, inverters 8740, 8741 and 8742 are provided as lamp drivers to provide power to the signal indicator lamps via signals LAMP 1L, LAMP 2 L, and TRANS. LAMP L, respectively.

As was previously mentioned, the function and operation of transmitter portion 8202b is preferably identical with that described above with reference to the function and operation of transmitter portion 8202a, described in detail above. As was also previously mentioned, these transmitter portions 8202a and 8202b preferably provide serial data unidirectionally to the master combiner synchronizer 8204 as well as receiving and transmitting bidirectional status and control signals to the master combiner synchronizer 8204. The output of the master combiner sychronizer 8204, which was previously described in detail with reference to FIGS. 3 and 4, is the composite video signal and a separate color burst signal both of which are provided to the output network 8206, as shown and preferred in FIG. 1. The function and operation of this output network 8206 for providing a well defined controllably distorted output signal of the type represented by the waveform illustrated in FIGS. 12C and 12E for the pseudeo video scan line portion of the piggy back transmission TV field shall now be described in greater detail hereinafter with reference to FIGS. 10 and 12A through 12E, the pre-equalization filter 8207, as was previously mentioned, preferably being disabled during the normal TV video portion of the piggy back transmission TV field by the disable signal provided via path 8804.

Pre-Post Equalization of a CATV Channel

As was previously described in the commonly owned copending U.S. patent application "Improved Row Grabbing System," filed Sept. 10, 1975 and bearing U.S. Ser. No. 611,843, now U.S. Pat. No. 4,042,958, and as particularly illustrated in FIGS. 21A through 21C thereof, data to the receiver terminal 28a or 28b present in a pseudo video scan line may contain significant distortion resulting from conventional vestigal sideband modulation schemes utilized for the preferred CATV transmission as well as from phase delay distortion present in any cable or CATV transmission system and the bandwidth limitations inherent in the FCC channel allocations. These distortions generally occur in any television transmission. and are not normally compensated for due to the low level fidelity requirements of conventional normal TV television transmission and display and, accordingly, pre-equalization filter 8207 is disabled during such transmission. The nature of these types of distortions was described in the aformentioned U.S. patent application, now U.S. Pat. No. 4,042,958, and illustrated in FIGS. 21A and 21C therefore. FCC channel allocations normally provide for equalization with respect to conventional television transmission; however, this equalization is not sufficient for the type of digital data transmission which is accomplished by the pseudo video scan line portion of the preferred piggy back transmission of the present invention and, thus, the aforementioned distortions occur in such portion of the piggy back transmission TV field. The preferred equalization system of the present invention which, as will be described in greater detail hereinafter, preferably takes place in the output network 8206, as well as in the preferred RF demodulator/equalizers 8850a and 8850b which are preferably identical channel type dedicated equalizers, omits the need for the distortion compensation circuit of the type described in the aforementioned U.S. patent application , now U.S. Pat. No. 4,042,958, for the pseudo video scan line portion of the piggy back transmission TV field.

Referring now to FIGS. 10 and 12A through 12E, the output network 8206 shown in block in FIG. 1, shall now be described in greater detail with reference to the schematic of FIG. 10. The illustrations of the various exemplary waveforms present throughout the output network 8206 shown in detail in FIG. 10 are showns in FIGS. 12A through 12E. FIGS. 12A through 12C refer to the various exemplary waveforms present at points A, B and C (FIG. 10), respectively, in the output network 8206. FIG. 12D refers to the exemplary energy distribution of the waveform illustrated in FIG. 12A and FIG. 12E refers to the exemplary energy distribution of the waveforms illustrated in FIGS. 12B and 12C, the energy distribution of the waveforms illustrated in FIG. 12C being the same as that of the wavefrom illustrated in FIG. 12B. The preferred pre-equalization filter network 8207 is preferably utilized in output network 8206 to limit the energy content of the composite video input data signal, illustratively represented by the waveform of FIG. 12A, and provided via path 8253 to filter 8207 at point A, without adding any significant group delay distortion. This pre-equalization filter 8207 produces an output signal at point B from the input waveform of FIG. 12A which output signal is represented by FIG. 12B. The waveform of FIG. 12B preferably has an energy distribution of the form illustrated in FIG. 12E. Thus, as can be seen by comparing FIG. 12D, the energy distribution of the input waveform of FIG. 12A, and FIG. 12E, the energy distribution of the output waveform of FIG. 12B, the energy distribution of the signal provided at the output of pre-equalization filter 8207 is preferably brought well within the restriction of the CATV transmission system being utilized. Thus, this signal present at the output of filter 8207 will not be significantly distorted by the CATV transmission system utilized with respect to the band limiting distortions which would normally occur in the absence of the pre-equalization filtering function of filter 8207. As shown and preferred in FIG. 12B, this output signal as compared to the input waveform of FIG. 12A is a controllably distorted digital signal well defined in accordance with the characteristics of the preferred filter network 8207 to be described in greater detail hereinafter.

As shown and preferred in FIG. 10, the output of the preferred filter network 8207 is provided to the base of a buffer amplifier 8500, which is preferably a conventional transistor amplifier, which prevents overloading of filter 8207 in conventional fashion. This buffer amplifier 8500 preferably feeds one input to mixer or summing network 8209 such as one preferably comprising resistors 8501 and 8502, with the other input to the mixing network 8209 preferably being the color burst signal provided via path 8250 through resistor 8502. The output of the summing network 8209 is preferably provided through a capacitor 8503 which conventionally provides AC coupling into the AC coupled output amplifier comprising the video driver 8208. Amplifier or video driver 8208, preferably contains a group delay equalizing network comprising resistors 8504, 8505 and capacitor 8506. Network 8504-8505-8506 preferably compensates for any distortion introduced by envelope detection of vestigal sideband TV demodulation. Thus, network 8504-8505-8506 preferably introduces the specific type of distortion required for the RF demodulator/equalizer 8850a and 8850b used for a given channel in the CATV transmission system utilized. The output of the video driver 8208 which is illustratively represented by the waveform of FIG. 12C, thus preferably contains further controllable distortions therein. These further controllable distortions which are now preferably present in the waveform of FIG. 12C, when passed through the cable TV television distribution system in which signal distortions of the type which normally result from the vestigal sideband modulation and demodulation process occur, and through the RF demodulator/equalizer 8850a and 8850b associated with the channel, result in the waveform of the type illustrated in FIG. 12B at the output of the RF demodulator/equalizer 8850a or 8850b. Thus, when the distortions which normally occur due to this vestigal sideband modulation and demodulation occur on or are combined with the signal of the type illustrated in the waveform of FIG. 12C, it preferably results in the output waveform illustrated in FIG. 12B at the output of the preferred RF demodulator/equalizer 8850a and 8850b. The configuration of the preferred video amplifier or driver 8208 is preferably a conventional video amplifier of the type utilized in a television distribution system but which has been modified to the extent previously described with reference to the network of 8504-8505-8506. The aforementioned filter network 8207 is preferably a conventional sin² filter configuration with the values being chosen so as to preferably limit the energy without adding group delay distortion, as previously mentioned. These values are typically, by way of example, 370 μf for the sum of capacitors 8207a and 8207b, 2000 μf for the sum of capacitors 8207c and 8207d, 272 μf for the sum of capacitors 8207e and 8207f, 250 μf for the sum of capacitors 8207g and 8207h, 5.5 to 8.4 μh for variable inductor 8207i and 1,8 μh for inductor 8207j, and produce a half pulse response whose half amplitude duration is preferably, by way of example, 147 nanoseconds. Thus, output network 8206 as a result of the functioning of filter 8207 and the functioning of network 8504-8505- 8506 in video driver 8208, preferably provides a well defined controllably distorted output at point C, illustratively represented by waveform FIG. 12C having a well defined controlled energy distribution, illustratively represented by FIG. 12E, which is well within the capabilities of a standard CATV television distribution system, so that any distortions which might normally occur in the signal, provided to the CATV distribution system resulting from the use of such a pseudo video scan line transmission system are compensated for.

It should be noted that unless otherwise indicated in the specification, all circuitry components are preferably conventional although the overall system of the present invention as well as the utilization of such circuitry for the preferred transmission scheme is not conventional.

It is to be understood that the above described embodiments of the invention are merely illustrative of the principles thereof and that numerous modifications and embodiments of the invention may be derived within the spirit and scope thereof.

Claims

1. a common channel video communication system for providing a television field comprising a plurality of television video scan lines over said common channel, said television field being comprised of both at least one video displayable row of video data characters contained in a pseudo video scan line occupying one of said plurality of television scan lines and normal televison video displayable information occupying the balance of said plurality of television video scan lines; said system comprising means for providing said television video scan lines comprising said normal television video information; means for providing said pseudo video scan line; and means operatively connected to said normal television video information providing means and said pseudo video scan line providing means for combining said normal television video information television video scan lines and said pseudo video scan line for providing said television field over said common channel, said pseudo video scan line providing means comprising means for providing said pseudo video scan line having a television video scan line format and capable of comprising a complete self-contained packet of digital information sufficient to provide said one row as an entire displayable row of video data characters, said displayable one row comprising a plurality of television video scan lines, said pseudo video scan line having an associated transmission time equivalent to said television video scan line, said packet of digital information comprising at least address information for said displayable one row and data information for said displayable characters in said displayable one row, said displayable one row being capable of providing a continuous video display of a selectable grabbed row of video information comprising said video data characters on a video display means from continuously transmittable video information. said system further comprising television signal distribution means for distributing said provided television field over said common channel to said video display means for providing at least said grabbed row continuous video display and receiver means operatively connected between said common channel television signal distribution means and said video display means for processing said distributed television field and capable of providing a displayable video row signal corresponding to said displayable one row to said video display means from said one composite pseudo video scan line output signal for providing said continuous video display, said receiver means comprising means for updating said grabbed displayable row as said data portion of said displayable received distributed pseudo video scan line portion of said television field is updated.

2. A system in accordance with claim 1 wherein said combining means comprises means for interleaving said television video scan lines comprising said normal television video information with said pseudo video scan line for providing an in phase composite combined interleaved television field to said common channel as said common channel television field.

3. A system in accordance with claim 1 wherein said normal television video displayable information has an associated video display mask comprising said balance of said plurality of television video scan lines and said combining means comprises means for interleaving said television video scan lines comprising said normal television video information with said pseudo video scan line for providing said pseudo video scan line outside said associated video display mask, whereby said one displayable row is not viewable in said video display mask.

4. A system in accordance with claim 3 wherein said interleaving means comprises means for providing said pseudo video scan line at the bottom of said television field.

5. A system in accordance with claim 1 wherein said normal television video information providing means comprises means for receiving a normal composite video signal containing composite sync information and said normal television video information and means operatively connected between said receiving means and said combining means for separating said composite sync information from said normal television video information for separately providing said composite sync information and said normal television video information to said combining means.

6. A system in accordance with claim 5 wherein said combining means comprises phase locked loop means responsive to said separated composite sync information and said provided pseudo video scan line for interleaving said television video scan lines comprising said normal television video information with said pseudo video scan line for providing an in phase composite combined interleaved television field to said common channel as said common channel television field.

7. A system in accordance with claim 1 wherein said combining means comprises means for providing a video black signal for said one television video scan line of said television field when said pseudo video scan line is not provided to said combining means.

8. A system in accordance with claim 1 wherein said combining means comprises means for providing a composite video scan line output signal comprising sync information for each of said plurality of television video scan lines comprising said television field.

9. A system in accordance with claim 8 wherein said composite video scan line output signal providing means comprises means for providing a horizontal sync signal at the beginning of said composite pseudo video scan line output signal, said horizontal sync signal providing a record separator between adjacently provided composite pseudo video scan lines.

10. A system in accordance with claim 9 wherein said composite video scan line output signal providing means further comprises means for inserting a start bit pulse at the beginning of said composite pseudo video scan line output signal between said horizontal sync signal and said packet of digital information, said system further comprising television signal distribution means for distributing said provided television field over said common channel to said video display means for providing at least said grabbed row continuous video display and receiver means operatively connected between said common channel television signal distribution means and said video display means for processing said distributed television field and capable of providing a displayable video row signal corresponding to said displayable one row to said video display means from said one composite pseudo video scan line output signal for providing said continuous video display, said start bit pulse providing a unique synchronizing pulse for said pseudo video scan line for enabling precise determination of a sampling time for the received distributed one pseudo video scan line to enable accurate determination of the binary state of the bits comprising said digital information packet, said receiver signal processing means comprising means responsive to the occurrence of said start bit for providing a reset signal for resetting said processing means in response to detection of said start bit, whereby noise immunity and accurate signal information are enhanced.

11. A system in accordance with claim 10 wherein said one composite pseudo vidoe video scan line output signal provided by said combining means in said provided television field comprises a three level signal having first, second and third signal levels with said digital data information and said start bit pulse varying between said second and third signal levels, and said horizontal sync signal information being provided between said first and second signal levels.

12. A system in accordance with claim 10 wherein said receiver means comprises means for updating said grabbed displayable row dependent on the real time data information content of said received pseudo video scan line.

13. A system in accordance with claim 12 10 wherein said updating means comprises memory means for retrievably storing said continuously distributed pseudo video scan line data information portion for providing said displayable video row therefrom, said memory means retrievably stored data information portion being continuously updateable as said data information portion of said pseudo scan line output signal associated therewith is updated.

14. A system in accordance with claim 10 wherein said start bit pulse insertion means further comprises means for inserting said start bit pulse at the beginning of each of said composite video scan line output signals, said receiver signal processing means further comprising gating means responsive to each of said composite video scan line output signals for providing only said data information content of said composite video scan line output signals corresponding to said pseudo video scan line output signal for further processing for providing said displayable video row while providing each of said start bit pulses to said start bit responsive means, whereby said reset signal is provided for each of said plurality of television video scan lines comprising said television field.

15. A system in accordance with claim 1 wherein said system further comprises television signal distribution means for distributing said provided television field over said common channel to said video display means for providing at least said grabbed row continuous video display and receiver means operatively connected between said common channel television signal distribution means and said video display means for processing said distributed television field and capable of providing a displayable video row signal corresponding to said displayable one row to said video display means from said one composite pseudo video scan line output signal for providing said continuous video display.

16. A system in accordance with claim 15 wherein said receiver means comprises meand for updating said grabbed displayable row dependent on the real time data information

content of said received pseudo video scan line. 17. A system in accordance with claim 16 1 wherein said updating means comprises memory means for retrievably storing said continuously distributed pseudo video scan line data information portion for providing said displayable video row therefrom, said memory means retrievably stored data information portion being continuously updateable as said data information portion of said psuedo video scan line associated therewith is

updated. 18. A system in accordance with claim 1 wherein said system further comprises means for providing a continuous video display of a selectable predetermined video frame of information on said video display means for said continuously transmittable video information, said video frame comprising a plurality of said displayable rows including said one displayable row, and means for transmitting said continuously transmittable video information as a plurality of said pseudo video scan lines, said combining means comprising means for providing a plurality of said television fields over said common channel, said pseudo video scan line content of a plurality of said television fields comprising said

video frame displayable rows. 19. A system in accordance with claim 18 wherein said combining means comprises means for providing a composite video scan line output signal comprising sync information for each of said plurality of television video scan lines comprising each of said

television fields. 20. A system in accordance with claim 19 wherein said composite video scan line output signal providing means comprises means for providing a horizontal sync signal at the beginning of said composite pseudo video scan line output signal, said horizontal sync signal providing a record separator between adjacently provided composite pseudo

video scan lines. 21. A system in accordance with claim 18 wherein said system further comprises television signal distribution means comprises means for distributing said provided television fields over said common channel to said video display means for providing said video frame continuous display and, said receiver means operatively connected between said common channel television signal distribution means and said video display processing means comprising means for processing said distributed television fields and capable of providing a displayable video row signal corresponding to each of said displayable rows to said video display means from each of said corresponding pseudo video scan lines in said pluraliy plurality of television fields for

providing said continuous video frame display. 22. A system in accordance with claim 21 wherein said receiver updating means comprises means for updating said continuous video frame display on a displayable video row-by-row basis dependent on the real time data information content as said data portion of any of said received distributed pseudo video scan lines

pertaining to said selected frame is updated.23. A system in accordance with claim 22 wherein said updating means comprises memory means for retrievably storing said continuously distributed pseudo video scan line data information portion for providing said displayable video row therefrom, said memory means retrievably stored data information portion being continuously updateable as said data information portion of

said pseudo video scanline associated therewith is updated. 24. A system in accordance with claim 1 wherein said system further comprises television signal disribution means for distributing said provided television field over said common channel to said video display means, said video display means comprising comprises first and second means for separately video displaying said grabbed video displayable row information content of said television field on said first display means and said normal television video information content of said television field on said second display means, said system further comprising receiver means being operatively connected between said common channel television distribution means and said first and second display means for processing said distributed television field for providing displayable video signals to said first and second display means from said received television field for providing said separate

video displays. 25. A common channel video communication system for providing a television field comprising a plurality of television video scan lines over said common channel, said television field being comprised of both at least one video displayable row of video data characters contained in a pseudo video scan line occupying one of said plurality of television video scan lines and normal television video displayable information occupying the balance of said plurality of television video scan lines; said system comprising means for providing said television video scan lines comprising said normal television video information; means for providing said pseudo video scan line; and means operatively connected to said normal television video information providing means and said pseudo video scan line providing means for combining said normal television video information television video scan lines and said pseudo video scan line for providing said television field over said common channel, said pseudo video scan line providing means comprising means for providing said psuedo video scan line having a television video scan line format and capable of comprising a complete self-contained packet of digital information sufficient to provide said one row as an entire displayable row of video data characters, said displayable one row comprising a plurality of television video scan lines, said pseudo video scan line having an associated transmission time equivalent to said television video scan line, said packet of digital information comprising at least address information for said displayable one row and data information for said displayable characters in said displayable one row, said displayable one row being capable of providing a continuous video display of a selectable grabbed row of video information comprising said video data characters on a video display means from continuously transmittable video information distributed thereto, said system comprising means for processing said composite pseudo video scan line and capable of providing a displayable video row signal to said video display means from said pseudo video scan line pertaining to said grabbed row for providing said continuous video display thereof, said processing means comprising means for updating said continuously video displayable selectable row as said data portion of said displayable received distributed pseudo video scan line pertaining to said selected row is

updated. 26. A common channel video communication system for providing a television field comprising a plurality of television video scan lines over said common channel, said television field being comprised of both at least one video displayable row of video data characters contained in a pseudo video scan line occupying one of said plurality of television scan lines and normal television video displayable information occupying the balance of said plurality of television video scan lines; said system comprising means for providing said television video scan lines comprising said normal television video information; means for providing said pseudo video scan line; and means operatively connected to said normal television video information providing means and said pseudo video scan line providing means for combining said normal television video information television video scan lines and said pseudo video scan line for providing said television field over said common channel, said pseudo video scan line providing means comprising means for providing said pseudo video scan line having a television video scan line format and capable of comprising a complete self-contained packet of digital information sufficient to provide said one row as an entire displayable row of video data characters, said displayable one row comprising a plurality of television video scan lines, said pseudo video scan line having an associated transmission time equivalent to said television video scan line, said packet of digital information comprising at least address information for said displayable one row and data information for said displayable characters in said displayable one row, said displayable one row being capable of providing a continuous video display of a selectable grabbed row of video information comprising said video data characters on a video display means from continuously transmittable video information said system further comprising television signal distribution means for distributing said provided television field over said common channel to said video display means for providing at least said grabbed row continuous video display and receiver means operatively connected between said common channel television signal distribution means and said video display means for processing said distributed television field and capable of providing a displayable video row signal corresponding to said displayable one row to said video display means from said one composite pseudo video scan line output signal for providing said continuous video display, said receiver means comprising means for updating said grabbed displayable row as said data portion of said displayable received distributed pseudo video scan line portion of said television field is updated said combining means comrising means for providing a composite video scan line output signal comprising sync information for each of said plurality of television video scan lines comprising said television field, said composite video scan line output signal providing means comprising means for providing a horizontal sync signal at the beginning of said composite pseudo video scan line output signal, said horizontal sync signal providing a record separator between adjacently provided composite video scan lines, said composite video scan line output signal providing means further comprising means for inserting a start bit pulse at the beginning of said composite pseudo video scan line output signal between said horizontal sync signal and said packet of digital information, said system further comprising television signal distribution means for distributing said provided television field over said common channel to said video display means for providing at least said grabbed row continuous video display and receiver means operatively connected between said common channel television signal distribution means and said video display means for processing said distributed television field and capable of providing a displayable video row signal corresponding to said displayable one row to said video display means from said one composite pseudo video scan line output signal for providing said continuous video display, said start bit pulse providing a unique synchronizing pulse for said pseudo video scan line for enabling precise determination of a sampling time for the received distributed one pseudo video scan line to enable accurate determination of the binary state of the bits comprising said digital information packet, said receiver signal processing means comprising means responsive to the occurrence of said start bit and said horizontal sync signal for providing a reset signal for resetting said processing means in response to detection of said start bit for enhancing immunity of said system to any noise or jitter present in said horizontal sync signal, whereby noise immunity and accurate signal

information are enhanced. 27. A common channel video communication system in accordance with claim 25 wherein said updating means comprises memory means for retrievably storing said continuously distributed pseudo video scan line data information portion for providing said displayable video row therefrom, said memory means retrievably stored data information portion being continuously updateable as said data information portion of said pseudo video scan line associated therewith is updated. 28. A common channel video communication system for providing a television field comprising a plurality of television video scan lines over said common channel, said television field being comprised of both at least one video displayable row of video data characters contained in a pseudo video scan line occupying one of aid plurality of television scan lines and normal television video displayable information occupying the balance of said plurality of television video scan lines; said system comprising means for providing said television video scan lines comprising said normal television video information; means for providing said pseudo video scan line; and means operatively connected to said normal television video information providing means and said pseudo video scan line providing means for combining said normal television video information television video scan lines and said pseudo video scan line for providing said television field over said common channel, said pseudo video scan line providing scan line having a television video scan line format and capable of comprising a complete self-contained packet of digital information sufficient to provide said one row as an entire displayable row of video data characters, said displayable one row comprising a plurality of television video scan lines, and pseudo video scan line having an associated transmission time equivalent to said television video scan line, said packet of digital information comprising at least address information for said displayable one row and data information for said displayable characters in said dsiplayable one row, said displayable one row being capable of providing a continuous video display of a selectable grabbed row of video information comprising said video data characters on a video data characters on a video display means from continuously transmittable video information, said system further comprising television signal distribution means for distributing said provided television field over said common channel to said video display means, said video display means comprising first and second means for separately video displaying said grabbed video displayable row information content of said television field on said first display means and said normal television video information content of said television field on said second display means, said system further comprising receiver means operatively connected between said common channel television distribution means and said first and second display means for processing said distributed television field for providing displayable video signal to said first and second display means from said received television field for providing said separate video displays. 29. A common channel video communication system in accordance with claim 28 wherein said receiver means comprising means for updating said grabbed displayable row as said data portion of said displayable received distributed pseudo video scan line portion of said television field is updated.