A stream of binary bits is converted into blocks of eight parallel bits. A first group of five of the eight bits addresses a memory device which has thirty-two code words each having four numbers representing the coordinates of signal points in four-dimensional space. The remaining three of the eight bits are expanded to four bits by a convolutional encoder having three bits of memory. These four bits are then used to multiply the four numbers of a code word read out from the memory device. This method permits a block of eight binary bits to be coded into any one of five hundred and twelve four-dimensional code words.
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1. A method for coding information comprising the steps of
separating said information into first and second groups of signals, addressing any one of a plurality of multidimensional code words by said first group of signals, and determining the sign of each componet component of said multidimensional code words by said second group of signals.
13. Apparatus for coding information comprising
means for converting a predetermined plurality of serial binary bits into parallel bits, said parallel bits being separated into first and second groups of signals, means for converting the binary 1's to -1's and binary 0's to 1's for said first group of signals which are then used for addressing any one of a plurality of multi-dimensional code words said code words being stored in a memory device, and said second group of signals being used for determining the sign of each component of said multi-dimensional code words after said code words are read out from said memory device.
20. Apparatus for coding an input of eight binary bits to any one of five hundred and twelve code words each code word having four numbers representing the coordinates of signal points in four-dimensional space said apparatus comprising
a read only memory comprising thirty-two of said four dimensional code words, a serial-to-parallel converter for converting a serial stream of blocks of eight binary bits into sequences of eight parallel bits, five of said eight parallel bits being used to address any one of said thirty-two code words in said read only memory after passing through a means for converting binary 1's to -1's and binary 0's to 1's, the remaining three bits of said eight parallel bits being the input to a convolutional encoder having three bits of memory, said convolutional encoder being used to expand said three bits of input to four bits of output, means for converting said four bits of output from said convolutional encoder from binary 1's to -1's and from binary 0's to 1's, and means for multiplying each component said four numbers from said read only memory by said four output bits from said convolutional encoder to derive any one of said five hundred and twelve four dimensional code words.
2. The method of
3. The method of
4. The method of
5. The method of
6. The method of
expanding the number of bits in said second group of signals from three to four in a convolutional encoder comprising three bits of memory, and converting the binary 1's to -1's and binary 0's to 1's.
7. The method of
8. The method of
9. The method of
10. The method of
11. The method of
expanding the number of bits in said second group of signals from three to four in a convolutional encoder comprising three bits of memory, and converting the binary 1's to -1's and binary 0's to 1's.
12. The method of
14. The apparatus of
15. The apparatus of
a convolutional encoder which comprises means for storing a plurality of bits for expanding the number of bits in said second group of signals, by one, and means for converting the expanded bits from binary 1's to -1's and binary 0's to 1's.
17. The apparatus of
18. The apparatus of
said predetermined plurality of serial binary comprises a block of eight binary bits, said first group comprises five bits of said eight bits, said means for storing a plurality of bits in said convolutional encoder having a capacity for storing three bits, said second group comprises the other three of said eight binary bits, said three bits being the input to said convolutional encoder, the output from said convolutional encoder being four bits, said read only memory comprises a set of thirty-two four-dimensional code words, and said encoded symbols being any one of a signal constellation comprising five hundred and twelve four-dimensional code words.
19. The apparatus of
said predetermined plurality of serial binary bits comprises a block of twelve binary bits, said first group of signals comprises nine bits of said twelve binary bits, said means for storing a plurality of bits in said convolutional encoder having a capacity for storing three bits, said second group comprises the other three bits of said twelve binary bits as the input to said convolutional encoder, the output from the convolutional encoder being four bits, said read only memory comprises a set of five hundred twelve four-dimensional code words, and said encoded symbols being any one of a signal constellation comprising eight thousand, one hundred and ninety-two four-dimensional code words.
21. A method for coding information comprising the steps of
separating said information into first and second groups of signals, encoding the signals in said second group to provide an expanded group of signals, addressing any one of a plurality of multidimensional code words by said first group of signals, and determining the sign of each component of said multi-dimensional code words by said expanded group of signals. 22. A method for coding information to generate an output code word, said method comprising the steps of separating said information into first and second groups of signals, encoding the signals in said second group to provide an expanded group of signals, identifying one of a plurality of multi-dimensional code words in response to said first group of signals, and generating said output code word by changing the sign of at least one of the components of said identified code word as a function of said expanded group of signals. 23. A method for generating output code words in response to successive blocks of input signals, each of said blocks comprising first and second groups of said input signals, said method comprising the steps of identifying for each one of said blocks, and in response to said first group of signals of that block, one of a predetermined plurality of multidimensional code words generating an individual one of said output code words by changing the sign of at least a selected one of the components of said one of said code words in response to a plurality of trellis coded signals, said trellis coded signals being a function of (a) the signals of the second group of signals of said one of said blocks and (b) at least one bit of the second group of signals of a previous one of said blocks. 24. A method for generating a sequence of output signals in response to a sequence of multidigit input words, each of said output signals representing a respective signal point (x1, x2, x3, x4) of a predetermined alphabet of four-dimensional signal points, said method comprising the steps of identifying, in response to the values of a selected number of digits of each input word in said input word sequence and the value of at least one digit of a previous input word in said input word sequence, one of a plurality of sets of said signal points, the number of said sets being greater than 2 raised to said selected number, and, in each said set, x1, x2, x3 and x4 being, for all the points in that set, congruent, modulo a predetermined number, to w1, w2, w3 and w4, respectively, w1, w2, w3 and w4 being predetermined integers each having a value associated with said each set, identifying, in response at least to the digits of said each input word other than said selected number of digits, a particular one of the signal points of said one set, and generating as an individual one of said sequence of output signals a signal
representing the identified signal point. 25. The invention of identifying, in response to the values of a selected number of bits of each input word in said input word sequence and the value of at least one bit of a previous input word in said input word sequence, one of a plurality of sets of said signal points, the number of said sets being greater than 2 raised to said selected number, said plurality of sets comprising a first set of said signal points and a plurality of further sets of said signal points, each of the points in each said further set being given by a predetermined pattern of sign changes associated with said further set applied to the coordinates of the signal points of said first set, identifying, in response at least to the bits of said each input word other than said selected number of bits, a particular one of the signal points of said one set, and generating as an individual one of said sequence of output signals a signal representing the identified signal point. 27. Apparatus for generating output code words in response to successive blocks of input bits, each of said blocks comprising first and second groups of said input bits, said apparatus comprising means for identifying for each one of said blocks and in response to said first group of bits of that block, one of a predetermined plurality of multidimensional code words, means for generating an individual one of said output code words by changing the respective signs of selected ones of the components of said one of said code words in response to a plurality of trellis coded bits, said trellis coded bits being a function of (a) the bits of the second group of bits of said one of said blocks and (b) at least one bit of the second group of bits of a previous one of said blocks. 28. A data transmitter adapted to generate a sequence of output signals in response to a sequence of binary input words, each of said output signals representing a respective signal point (x1, x2, x3, x4) of a predetermined alphabet of four-dimensional signal points, said transmitter comprising means responsive to the values of a selected number of bits of each input word in said input word sequence and the value of at least one bit of a previous input word in said input word sequence for identifying one of a plurality of sets of said signal points, the number of said sets being greater than 2 raised to said selected number, and, in each said set, x1, x2, x3 and x4 being, for all the points in that set, congruent, modulo a predetermined number, to w1, w2, w3 and w4, respectively, w1, w2, w3 and w4 being predetermined integers each having a value associated with said each set, means responsive at least to the bits of said each input word other than said selected number of bits for identifying a particular one of said signal points of said one set, and means for generating as an individual one of said sequence of output signals a signal representing the identified signal point. 29. The invention of claim 28 wherein w1, w2, w3 and w4 can each take on one of the two values +1 and -1, wherein x1, x2, x3 and x4 are all odd integers and wherein said predetermined number is 4. 30. A data transmitter adapted to generate a sequence of output signals in response to a sequence of multidigit input words, each of said output signals representing a respective signal point of a predetermined alphabet of multi-dimensional signal points, said signal points being at least of dimension four, said transmitter comprising means responsive to the values of a selected number of digits of each input word in said input word sequence and the value of at least one digit of a previous input word in said input word sequence for identifying one of a plurality of sets of said signal points, the number of said sets being greater than 2 raised to said selected number, said plurality of sets comprising a first set of said signal points and a plurality of further sets of said signal points, each of the points in each said further set being given by a predetermined pattern of sign changes associated with said further set applied to the coordinates of the signal points of said first set, means responsive at least to the digits of said each input word other than said selected number of digits for identifying a particular one of the signal points of said one set, and means for generating as an individual one of said sequence of output signals a signal representing the identified signal point. |
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This invention relates to coding information so as to reduce errors caused by transmission from being included in the received signal and, in particular, to multidimensional coding.
When information is sent from a transmitter over a channel to a receiver, the information signals are often distorted by noise and other causes. Sometimes the information signals are distorted to such an extent that the received signals do not duplicate the information sent.
In order to reduce errors in the received signals, the information is coded at the transmitter. There are two basic coding schemes: block coding and convolution coding. These coding schemes are explained in detail in a book entitled "Error Control Coding: Fundamentals and Applications" by S. Lin et al.
Simply stated, block coding introduces n-k redundant bits to a block of k bits of information to derive a coded block of n bits which is transmitted to a receiver. For binary signals, there are 2k code words, each of length n, and the set is called (n, k) block code. Convolutional coding introduces m bits from previous blocks of information, each having k bits, to derive a coded signal having n bits. The encoder is said to have a memory order of m. The set of codes is called an (n, k, m) convolutional code. The code rate is k/n.
U.S. Pat. No. 4,077,021 teaches a technique called set partitioning that assigns signal points to successive blocks of input data. More particularly, a code rate of 4 bits/2-dimensional symbol is shown. Also, a coding gain of 4 db over standard uncoded transmission is obtained. That is, noise immunity is obtained without increasing the power required for transmission. As will be described fully in the detailed description of the present invention, it is desirable to obtain a more efficient coding scheme.
In accordance with the illustrative embodiment of the present invention there is disclosed a multidimensional coder which (1) reduces the power consumed, (2) achieves a high code rate, and (3) provides an efficient scheme by low power use and low error in the received signal.
More particularly, according to one embodiment of the present invention, an information block comprising eight bits of input to the coder is converted into any one of five hundred and twelve four-dimensional code words. The eight bits are change into yeilding yielding 256 (16×16=256) possible signals. Using the formula developed earlier herein, the average power or energy is ##EQU7## that is, 20. Because the minimum squared distance between distinct signals is four, the figure of merit is given by the formula: ##EQU8##
For coded transmission, however, 512 signal points are used, namely, twice the signal constellation for uncoded transmission of 4-dimensional symbols. This is so because a block of eight input bits is converted to nine bits using three bits from prior blocks and 29 is 512. This conversion will become clear by referring to FIG. 7, wherein is shown a stream of binary bits on lead 71 converted from serial to parallel in converter 70 and then set on via two sets of leads 73 and 51.
The first set of leads 73 carries five uncoded bits which are converted from binary form by changing a 0 to a 1 and a 1 to a -1 in known device 72 and then sent on via leads 75 to address any one of thirty-two (25 =32) code words, representing signal points, from a storage device such as read only memory (ROM) 74. Because each code word defines a point in four dimensional space, four numbers are required for each code word. The numbers of the addressed code word are passed via leads 77 to multipliers 82 . . . 88. Representative signal points are shown in Table 1 hereinbelow.
| TABLE 1 |
| ______________________________________ |
| Representative Signal Point |
| Energy Level or Average Power |
| ##STR1## |
| ______________________________________ |
| (1111) 4 1 |
| (3111) 12 4 |
| (3311) 20 6 |
| (5111) 28 4 |
| (3331) 28 4 |
| (5311) 36 12 |
| (3333) 36 1 |
| Total number of code 32 |
| words |
| ______________________________________ |
The first column of Table 1 shows the code words representative of signal points in four dimensional space. The number of permutations for each representative code word is shown in column three, giving a total of thirty-two code words stored in ROM 74. The list of thirty-two code words is obtained by permuting the coordinates of the code words in column one.
The second set of leads 51 from serial to parallel converter 70 carries three of the binary input bits to a device 50 which stores three bits from prior blocks as disclosed in detail earlier herein with reference to FIG. 5, and delivers four bits on leads 53 to a device 80, At device 80 the binary bit 0 is converted to 1 and a binary 1 is converted to a -1. The vector W of four bits w1, w2, w3, and w4 is then delivered to multipliers 82 . . . 88. The number y1 of the accessed code word is then multiplied by w1 from lead 81 at multiplier 82 to generate output x1. That is, y1 is negated if w1 is -1 but remains unchanged if w1 is +1. Likewise, x2, x3, and x4 are generated and sent over leads 89.
Because there are four bits w1, w2, w3, and w4, and because there are two values 1 or -1 for each, together there can be sixteen (24 =16) different permutations of these bits. Because there are thirty-two signal points (x1, x2, x3, x4) in the set S(w) which satisfy the requirement xi .tbd.wi (mod 4), for i=1, 2, 3, and 4, there are 512 (16×32=512) symbols in the signal constellation, because all permutations are allowed. Thus, the coding scheme of the present invention can be thought of as a code book comprising sixteen pages with thirty-two code words on each page. Each page corresponds to the vector wi, where i=1, 2, 3, and 4. The thirty-two code words correspond to the entries in ROM 74. The entire list of thirty-two code words in ROM 74 is shown in Table 2 hereinbelow.
| TABLE 2 |
| ______________________________________ |
| Input to ROM 74 Code Output From ROM 74 |
| a4 |
| a5 a6 |
| a7 |
| a8 |
| y1 |
| y2 |
| y3 |
| y4 |
| ______________________________________ |
| 1 1 1 1 1 1 1 1 |
| -1 1 1 1 1 3 1 1 1 |
| 1 -1 1 1 1 1 3 1 1 |
| -1 -1 1 1 1 1 1 3 1 |
| 1 1 -1 1 1 1 1 1 3 |
| -1 1 -1 1 1 3 3 1 1 |
| 1 -1 -1 1 1 3 1 3 1 |
| -1 -1 -1 1 1 3 1 1 3 |
| 1 1 1 -1 1 1 3 3 1 |
| -1 1 1 -1 1 1 3 1 3 |
| 1 -1 1 -1 1 1 1 3 3 |
| -1 -1 1 -1 1 5 1 1 1 |
| 1 1 -1 -1 1 1 5 1 1 |
| -1 1 -1 -1 1 1 1 5 1 |
| 1 -1 -1 -1 1 1 1 1 5 |
| -1 -1 -1 -1 1 3 3 3 1 |
| 1 1 1 1 -1 3 3 1 3 |
| -1 1 1 1 -1 3 1 3 3 |
| 1 -1 1 1 -1 1 3 3 3 |
| -1 -1 1 1 -1 5 3 1 1 |
| 1 1 -1 1 -1 5 1 3 1 |
| -1 1 -1 1 -1 5 1 1 3 |
| 1 -1 -1 1 -1 3 5 1 1 |
| -1 -1 -1 1 -1 1 5 3 1 |
| 1 1 1 -1 -1 1 5 1 3 |
| -1 1 1 -1 -1 3 1 5 1 |
| 1 -1 1 -1 -1 1 3 5 1 |
| -1 -1 1 -1 -1 1 1 5 3 |
| 1 1 -1 -1 -1 3 1 1 5 |
| -1 1 -1 -1 -1 1 3 1 5 |
| 1 -1 -1 -1 -1 1 1 3 5 |
| -1 -1 -1 -1 -1 3 3 3 3 |
| ______________________________________ |
The set of coordinates (x1, x2, x3, x4) representing the input block of 8 bits on leads 89 is then sent on to a modulator. The present invention relates to an encoder only and therefore other equipment cooperating with the encoder is not disclosed in any detail, beyond what was disclosed earlier with reference to FIG. 1.
The distance d(A, B) between two sets of vectors A and B is given by the expression: ##EQU9## The partition into sets S(w) satisfies the following metric properties: (M1): if x, yεS(w), then ∥x-y∥2 ≧16; and
(M2): is v≠w, then d2 (S(v), S(w))=∥v-w∥2.
To verify (M1), let x=(x1, x2, x3, x4) and y=(y1, y2, y3, y4). Then xi ≠yi for some i. Since xi .tbd.yi (mode 4), we have ∥x-y∥≧16. To verify (M2), let x=(x1, x2, x3, x4)εS(v), and y=(y1, y2, y3, y4)εS(w). If xi ≢yi (mod 4), then |xi -yi |2 ≧4. Hence ∥x-y∥2 ≧∥v-w∥2 and the equality holds when x=v and y=w.
Earlier hereinabove, a trellis code with rate 3 bits/4-dimensional symbol having a minimum squared distance dmin2 =16 was disclosed. In order to achieve a higher transmission rate of 8 bits/4-dimensional symbol, five uncoded bits were added, obtaining an input of eight parallel sequences to the encoder in FIG. 7: {a1i }, {a2i }, {a3i }, . . . , {a8i }. The sequences {a2i }, {a3i } determine the state a2i-1 a3i-1 a3i-2 of the encoder in FIG. 7. An edge joining two states that was originally labelled by the pair of vectors ±w in FIG. 3 is now labelled by the sixty-four vectors (not shown) in the set S(v) U S(-v). This is so because there are sixty-four parallel transitions between states a2i-1 a3i-1 a3i-2 and a2i a3i a3 i-1 corresponding to the sixty-four possible inputs a1i a4i . . . a8i. Furthermore, any fixed assignment of code symbol in S(v) U S(-v) to inputs a1i a4hu i a4i . . . a8i is permitted.
The properties (M1) and (M2) guarantee that the squared distance of any error event of length l is at least 16. Consider any error event in the eight state trellis of length greater than 1. If the squared distance for the low-rate code is ##EQU10## then the squared distance for the high rate code is at least ##EQU11## The property (M2) implies that the minimum squared distance of the high-rate code is at least 16. The average signal power P of the 512 point signal constellation is given by the expression: ##EQU12## Thus, ##EQU13## and the coding gain in db is: ##EQU14##
Referring to FIG. 8, there is shown a signal constellation comprising sixty-four signal points which is used for standard uncoded transmission at the rate of 6 bits/2-dimensional symbol. To transmit a 4-dimensional symbol at a rate of 12 bits/symbol, a constellation comprising two such copies are needed. The number of possible signals will be 4, 096 (64×64=4096). The average signal power P is ##EQU15## Thus, ##EQU16##
For coded transmission using three bits from prior blocks, 8, 192 (213 =8192) signal points are needed. As in the 8 bits/4-dimensional symbol, the signal constellation is partitioned into sixteen sets S(w) according to congruence of the entire modulo 4. Each set S(w) will contain, however, 512 signal points, or code words. Representative signal points are listed hereinbelow in Table 3.
| TABLE 3 |
| ______________________________________ |
| Representative |
| Energy |
| ##STR2## |
| ______________________________________ |
| (1111) 4 1 |
| (3111) 12 4 |
| (3311) 20 6 |
| (5111). (3331) |
| 28 4 + 4 = 8 |
| (5311). (3333) |
| 36 12 + 1 = 13 |
| (5331) 44 12 |
| (7111). (5333). (5511) |
| 52 4 + 4 + 6 = 14 |
| (7311). (5531) |
| 60 12 + 12 = 24 |
| (7331). (5533) |
| 68 12 + 6 = 18 |
| (7333). (5551). (7511) |
| 76 4 + 4 + 4 + 12 = 20 |
| (9111). (7531). (5553) |
| 84 4 + 24 + 4 = 32 |
| (9311). (7533) |
| 92 12 + 12 = 24 |
| (9331). (7711). (7551). |
| 100 12 + 6 + 12 + 1 = 31 |
| (5555) |
| (7553). (9333). (9511). |
| 108 12 + 4 + 12 + 12 = 40 |
| (7731) |
| (9531). (7733) |
| 116 24 + 6 = 30 |
| (9533). (11111). (7751). |
| 124 12 + 4 + 12 + 4 = 32 |
| (7555) |
| (11311). (9711). (9551). |
| 132 12 + 12 + 12 + 12 = 48 |
| (7753) |
| (11331). (9731). (9553) |
| 140 12 + 24 + 12 = 48 |
| (11333). (11511). (9733). |
| 148 4 + 12 + 12 + 6 + 4 = 38 |
| (7755). (7771) |
| (11531). (9555). (9751) |
| 156 24 + 4 + 24 + 4 = 56 |
| (7773) |
| (11533). (9911). (9753) |
| 164 only 13 |
| ______________________________________ |
In order to obtain a transmission rate of 12 bits/4-dimensional symbol it is necessary to add nine uncoded bits to the four derived bits from FIG. 5, to obtain a total of 13. There are now 1024 parallel transitions between states a2i-1 a3i-1 a3i-2 and a2i a3i a3i-1 in the eight state trellis. If the edge corresponding to this transition was originally labelled ±w, it is now labelled with the 1024 vectors in S(w) U S(-w). The metric properties (M1) and (M2) guarantee that the squared minimum distance of the high-rate code is equal to the squared mininmum minimum distance of the low-rate code, which is 16. The average signal power is 108.625, and so the figure of merit is: ##EQU17## and the coding gain is: ##EQU18##
Summarizing the aforesaid disclosure, in order to achieve coded transmission at a rate of k bits per four dimensional signal, (k-3) uncoded bits are added to the low rate trellis code, that is, 3 bits per four dimensional symbol, as disclosed hereinabove, with reference to FIG. 3. There are 2(k-2) parallel transitions between states a2i-1 a3i-l a3i-2 and a2i a3i a3i-1 in the eight state trellis. Relating this to FIG. 3, there are two parallel transitions between the two aforesaid states because 2(3-2) is 2.
Coded transmission requires 2(k+1) signal points. The points of the lattice (2Z+1)4, where (2Z+1) represents the set of odd numbers, lie in shells around the origin consisting of sixteen vectors of energy four, sixty-four vectors of energy twelve, . . . , shown summarized in Table 3. The 2k+1 signal points are obtained by taking all points of energy four, twelve, twenty, . . . and just enough points of a final shell to bring the total number up to 2k+1. The signal constellation is partitioned into sixteen sets S(w) according to congruence of the entries modulo four Each set contains 2k-3 signal points. Thus, when k=8, each set has thirty-two signal points (28-3 =32) as is shown in FIG. 9. Edges in the eight state trellis originally labeled ±w are now labelled with the 2k-2 vectors in S(w) U S(-w). The metric properties (M1) and (M2) guarantee that the minimum squared distance of this trellis is sixteen.
It can be shown that as k increases, that is, in the limiting case, the limiting coding gain is 10log10 π=4.914 db. That is, the maximum coding gain is 4.914 db. But the coding gain for twelve bits per four dimensional symbol is 4.904 db and the coding gain for eight bits per four dimensional symbol is 4.717 db. Thus, the scheme disclosed by the present invention is an efficient method of coding.
Sloane, Neil J. A., Calderbank, Arthur R.
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