A communication system for video information apparatus for carrying out a communication between a video information apparatus and a peripheral apparatus arranged so that a communication is repeatedly carried out at a period synchronized with a signal of a vertical period having a constant phase relation relative to a vertical synchronizing signal.
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1. A system for communicating between master video apparatus and a plurality of peripheral apparatus wherein video signals organized into vertical periods of successive fields are processed; said system comprising:
means for generating timing signals synchronously with said vertical periods; means for establishing first communication intervals having a substantially constant phase relation with respect to said timing signals; communication means for effecting communication between said master apparatus and said peripheral apparatus during said first communication intervals; said first communication intervals being divided into separate transmission areas, a plurality of said transmission areas being reserved for transmission of communications by said peripheral apparatus, the number of said reserved areas being less than the number of said peripheral apparatus; and means independent of said master apparatus whereby one of said peripheral apparatus can preempt one of said reserved areas for transmission therein.
7. A system for communicating between a master video apparatus and at least one peripheral apparatus wherein video signals organized into vertical periods of successive fields are processed; the system comprising:
means for generating timing signals synchronous with the vertical periods of the video signals; means for establishing a first communication interval having a first communication area and at least one second communication area and wherein the first communication interval is repeated periodically with substantially constant phase relationship to the timing signals; communication means for effecting communication between the master video apparatus and the peripheral apparatus during the first communication interval, wherein the master video apparatus and at least one of the peripheral apparatus transmit during the first and second communication areas respectively; and wherein the number of the second communication areas to be used for transmission in the first communication intervals is less than or equal to the number of the peripheral apparatus.
2. A system according to
means for generating timing signals synchronously with said vertical periods; means for establishing first communication intervals having a substantially constant phase relation with respect to said timing signals; communication means for periodically and repeatedly effecting communication between said master apparatus and said peripheral apparatus through said one transmission line during said first communication interval; means for establishing a window within which said timing signals normally appear;. detecting means for detecting the presence of said timing signals within said window; free-running timing means for establishing second communication intervals; and means responsive to failure of said detecting means to detect said timing signals within said window for temporarily substituting said second communications intervals for said first communication intervals, whereby said communication temporarily takes place during the second communication intervals.
3. A system according to
4. A system according to
means for generating timing signals synchronously with said vertical periods; means for establishing first communication intervals having a substantially constant phase relation with respect to said timing signals; communication means for periodically and repeatedly effecting communication between said master apparatus and said peripheral apparatus through said one transmission line during said first communication interval; said first communication intervals being divided into separate transmission areas, a plurality of said transmission areas being reserved for transmission of communications by said peripheral apparatus, and preempting means independent of said master apparatus whereby one of said peripheral apparatus can preempt one of said reserved areas for transmission therein, wherein said preempting means comprises including means in each of said peripheral apparatus for monitoring the state of said transmission line, for comparing the state thereof with the data transmitted thereto, and for terminating transmission in said area in case of a discrepancy between the state of said transmission line and the state of data transmitted thereto.
5. A system according to
6. A system according to
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1. Field of the Invention
This invention relates to bidirectional communication between a single master apparatus and a plurality of slave apparatus and, more particularly but not exclusively, to a method and apparatus for communication between video information apparatus, such as VTR (video tape recorder) or video disc player, and peripheral apparatus, such as tuner, a timer, a video camera, editing apparatus, a computer and so on.
2. Description of the Prior Art
Recently, in order to enhance the enjoyment of video equipment, a video information system has been developed, which comprises a VTR as master apparatus and a plurality of peripheral or slave apparatus, such as a video .bi bit D0 to D7 transmits "1" first is given priority and the corresponding area is assigned as the transmission area of that slave apparatus. Then, in the slave apparatus in which it is detected that the data as transmitted and the data on the communication line 30 are different from each other at a given bit, the succeeding bits are all set to "0", whereby to prevent the data of the slave apparatus preempting the area P1 from being transmitted incorrectly.
The slave apparatus which could not transmit data through the area P1 again transmits data on the basis of the start bit SB which occurs at the beginning of the area P2 (step 104). A determination whether or not the area P2 is vacant is made in the same way as earlier noted at steps 105 and 106. If the area P2 is vacant, it is selected as the transmission area of that slave apparatus. If on the other hand it is occupied, a determination whether or not the area P1 is vacant described above is made again in the next cycle. The operation described above is repeatedly carried out until a vacant area is detected.
FIG. 5 schematically illustrates these operations. In FIG. 5, a slave apparatus 1 (for example, a tuner) and another slave apparatus II (for example, an editing apparatus) compete with each other with respect to the transmission demand in the area P1 and the editing apparatus as the slave apparatus II transmissions switches into the area P2. The matter apparatus (VTR) receives in areas P1 and P2 and transmits in the areas P3 and P4 . Both slave apparatus receive in areas P3 and P4. Both attempt to transmit in the area P1 (left half of FIG. 5). The tuner preempts the area P1 and the editor then switches to the area P2 (right half of FIG. 5).
The checking of the area at every bit can be performed easily by the shift register 211, which is formed as a 9-bit shift register. In practice, since the shift register that the 4-bit microcomputer incorporates therein is of a 9-bit type, such shift register can be used without modification.
During the pause or stop interval next following the communication interval formed of the four areas P1 to P4, the data processing based on the content of the received data is carried out by the VTR 10, the video camera 20 and other slave apparatus, and other processing is carried out in a time division manner.
As described below, the communication interval including the transmission from the VTR 10 and the transmission from the slave apparatus such as the video camera 20 and the like into one block is repeated cyclically, the pause interval being interposed therein. In this embodiment, since the start bit SB is generated only by the master apparatus and the time control is carried out by the master apparatus, the areas P1 to P4 can be discriminated surely and the communication interval and the pause interval can be reliably distinguished from each other.
These operations are executed in accordance with the following program routines of the microcomputers of the VTR 10 and the video camera 20.
FIG. 6 is a flow chart: of the program steps for the VTR 10, in which steps 201 to 209 are executed sequentially and repeatedly. In steps 205 to 207, either the command from the video camera 20 or the function key operation of the VTR 10 is given priority, whereby the mode of the VTR 10 is determined. These steps 205 to 207 are used to prevent erroneous operation.
In step 209, data corresponding to the key operation at the VTR 10 and data indicative of the mode of the VTR 10 designated by the remote control signal from the video camera 20 are generated; and data indicative of "no operation to be performed" is generated when there are no command and no mode to be transmitted to the video camera 20.
More particularly, at step 201, the start SB is transmitted by the VTR 10 (master apparatus). At step 202, data is received. At step 203, the start bit SB is transmitted. At step 204, data is transmitted. At step 205, the received data is analyzed. At step 206, the operated function key of the VTR 10 is read. At step 207, the mode of the VTR 10 is determined. At step 208, the mode of the VTR 10 is displayed. At step 209, the data to be transmitted is generated. The program then recycles to step 201.
FIG. 7 is a flow chart of the program routine for the video camera 20, in which steps 301 to 308 are executed sequentially and repeatedly. In step 308, the transmission data is generated and stored in the register and the video camera 20 is set in the standby mode until the start bit is received. The transmission data is transmitted at step 304.
More particularly, at step 301, the start SB is received by the video camera 20 (slave apparatus). At step 302, data is transmitted. At step 303, the start bit SB is received. At step 304, data is received. At step 305, the received data is analyzed. At step 306, the mode of the camera 20 is displayed. At step 307, the operated function key of the camera 20 is read. At step 308, the data to be transmitted is generated. The program then recycles to step 301.
The generation of the start bit and of the clock pulse in the communication controller 112 and the detection of the start bit and the generation of the clock pulse in the communication controller 212 may be carried out under the control of the microcomputers 110 and 210, respectively, or by other hardware, as those skilled in the art will understand.
The communication is carried out in synchronism with the vertical sync signal VD as described above. When an artificial sync signal is mixed into the vertical sync signal VD or the television channel is changed by the television tuner, the period of vertical sync signal is disordered temporarily. If the communication responds to the disorder of the vertical sync signal, the communication may be interrupted, or malfunctions may occur in processes or operations other than the communication.
Therefore, the following operations are performed so as to cope with the disorder of the vertical synchronizing signal.
The following data processing is executed by the software program of the microcomputer 110 of the VTR 10 that is used as the master apparatus for communication.
The VTR 10 is set in the standby mode, in which it is momentarily inoperative, after a period S that begins at the leading edge of the vertical sync signal VD (FIG. 8A) and that is selected so that TF>S. The period S may be, for example, 15 msec (see FIG. 8B). More specifically, the communication interval begins at the leading edge of the vertical sync signal VD, and the pause or stop interval, in which operations other than communication are performed, begins at the end of the period S. These other operations are interrupted until the time S is passed from the leading edge of the vertical sync signal VD. The normal complete cycle is 16.7 msec.
The vertical sync signal VD is not disordered, if the following vertical sync signal VD arrives at the end of the time TF, whereby the VTR 10 is released from its waiting mode and the communication begins (see FIG. 8B). This operation is repeated indefinitely.
Generally, if the maximum waiting interval is taken as 2ΔS, the waiting mode is released at the midpoint thereof. That is, TF=S+ΔS is approximately established. Theoretically, TF is a constant (16.66 . . . msec=1/60 sec), but actually it contains a periodic error ΔT, as discussed below.
If the period of the vertical sync signal VD is disordered by channel selection and the like as shown in FIG. 8A, when the constant waiting period 2ΔS passes (FIG. 8B), the waiting mode is released and hence the communication begins. If the vertical sync signal VD arrives before 3 msec passes (following the end of period S), the waiting mode is released upon its arrival: i.e., the waiting mode is released without waiting for the full 3 msec. Thus, the VTR 10 is designed to follow the disorder of the period of the vertical sync signal VD if the time displacement of the vertical sync signal VD does not exceed ±ΔS. However, when the disorder of the period of the vertical sync signal VD is such that the time displacement thereof exceeds ±ΔS, the VTR 10 is not synchronized with the vertical sync signal VD for a certain time duration and the free-running cycle of duration S+2ΔS that is determined by the microcomputer 110 continues. Thereafter, when the vertical sync signal VD again enters into the waiting period of 2ΔS, communication is started in synchronism with the vertical sync signal VD.
That is, when the vertical sync signal VD is disordered, a window having a width of ±ΔS is provided for the vertical sync signal VD. Accordingly, disorder of the synchronization is known to exist when the vertical sync signal VD is outside this window. Then, until the vertical sync signal enters into the window, the communication is carried out at the free-running cycle of S+2ΔS. The time required by the VTR 10 to return to synchronization with the vertical sync signal VD is determined by the width 2ΔS of the window. In FIG. 8 two successive vertical sync signals VD are shown to occur with a period X1 that deviates considerably from the norm. If the periodic error of the vertical sync signal VD is taken as ±ΔT where ΔS>T and the displacement between the vertical sync signal VD and the communication cycle after the channel is changed is taken as X2, the following equation results: ##EQU1##
The displacement is thus reduced by (ΔS±ΔT) at every period and hence in the worst case the vertical sync signal VD again enters into the window after a period of ##EQU2## and the VTR 10 is located to the vertical sync signal VD. These operations are carried out in accordance with the flow chart of FIG. 9. At step 401, the timer is cleared. At step 402, communication and other processes are carried out. At step 403, a determination is made whether or not the value registered by the timer has reached the starting point of the window. The determination is made repeatedly until the answer is yes. At step 404 a determination is made whether or not the sync signal has arrived. If so the program loops back to step 401. If not a determination is made at step 405 whether or not the value registered by the timer has reached the end point of the window. As long as the end point of the window has not been reached, the program loops back to step 404; when the end point of the window is reached, the program loops back to step 401.
As described above, when a PLL circuit is constructed by the software of the microcomputer, the communication can be carried out in synchronism with the vertical sync signal VD.
Accordingly, if the vertical sync signal VD is disordered rapidly or the sync signal is weakened to destroy the synchronization, free-running synchronization is established by the PLL circuit provided by the software of the microcomputer so that interruption of communication is prevented and the communication therefore follows the vertical sync signal VD.
Since the processing time for transmission an and reception is provided by making the length of the end bit longer than the norm, the serial data can be read out and written easily by the software. In addition, with respect to the hardware, there is the advantage than an extra latch circuit is not required.
Further, this system is an excellent match for the RS-232C that is the communication interface standard widely used in apparatus of this kind. In the communication system of this embodiment, using the RS-232C system communication channel, the data can be read out only by voltage conversion.
Since the communication is carried out cyclically and can be free-running, the correct content of the communication is restored immediately in case of a dropout or inadvertent error in the communication.
Furthermore, only the transmission line is needed, an expensive interface is not used, the communication and related functions can all be carried out by a one-chip microcomputer, and bidirectional digital data communication can be realized by inexpensive home LSIs.
In addition, since synchronization of the communication is established by the master apparatus, even when a plurality of operations A, B, C and D (FIG. 10A and 10B) in addition to the communication must be performed in a time division manner, it is possible to prevent a given operation from being interrupted while in progress.
That is, when synchronization of the communication is not established and an expensive interface is not employed, the communications may be carried out in the midst of one operation as shown in FIG. 10A so that other operations cannot be carried out. In this embodiment, since the synchronization of the communication is established by the master apparatus and other operations are carried out in the pause or stop interval of constant length, the control of the time division multiplexing processing becomes easy as shown in FIG. 10B. As a result, there is the advantage that the signal processing can be carried out by an inexpensive microcomputer.
In the embodiment described above, the communication is started in synchronism with the vertical sync signal VD itself; alternatively, communication may be started in synchronism with a signal synchronized with the vertical sync signal: for example, a signal indicative of the rotary phase of a rotary head and a switching signal for two rotary heads.
While the embodiment described above is the special case where communication can be realized by a single communication line, the present invention can be applied also to a case where two lines for transmission and reception, respectively, extend from the master apparatus to a plurality of slave apparatus.
While in the embodiment described above a check is made at intervals of one bit to determine whether or not the transmission area is vacant, a check may be made at intervals of, for example, one word (8 bits).
If in the embodiment of FIG. 2 the earlier areas P1 and P2 are assigned as transmission periods of the slave apparatus and the later areas P3 and P4 are assigned as transmission periods of the master apparatus, only the start bit of the first half can always be transmitted cyclically, while the start bit of the second half can be transmitted only when data is transmitted from the master apparatus. Further, if the reception of incoming data is carried out before the transmission of outgoing data, it is possible to reduce considerably the buffer memories that store the data in the communication controller 212 and the microcomputer 210 of the slave apparatus.
In accordance with the present invention, since the transmission from the slave apparatus is carried out by using a selected unoccupied area of the plurality of time division areas, the number of time division areas can be smaller than the number of slave apparatus; in addition, the unused areas are reduced and the efficiency of use is increased. Furthermore, when the communication is carried out at a constant period, for example the vertical period, it is possible to prevent the length of the communication interval from becoming too long. Accordingly, it is possible to preserve the time necessary for carrying out operations other than communication during the stop mode interval.
Further, according to the present invention, since the communication is carried out periodically, if the communication is carried out once erroneously, the correct data is transmitted on the next occasion, whereby the erroneous communication is restored to the correct one. In addition, according to the present invention, since the communication is carried out in synchronism with a signal synchronized with the vertical sync signal, it is possible to transmit as communication data signals corresponding to the frame number and field of the video signal.
Furthermore, since the communication timing can be predicted, the design of the hardware of the peripheral apparatus and the main body is simplified.
In addition, since the communication is carried out in synchronism with the vertical period, the mixing of noise into the picture due to the communication or the like can be detected easily and the debugging period is reduced.
Thus there is provided in accordance with the invention a novel and highly effective method and apparatus for communication between video information apparatus, such as a VTR or video disc player, and peripheral apparatus, such as a tuner, a timer, a video camera, editing apparatus, a computer and so on. Many modifications of the preferred embodiment of the invention described above will readily occur to those skilled in the art without departing from the spirit or scope of the invention. Accordingly, the invention is defined by the appended claims only.
Machida, Yukihiko, Shimada, Keiichiro, Ishihara, Mitsugu, Takada, Shinji
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