Apparatus utilizing change in pressure condition in an area to be protected to indicate intrusion or change in conditions of the area by using a pressure detection device to detect pressure waves at low and infrasonic frequencies which includes a pressure transducer sensitive to change in pressure to provide an output signal. In some instances an amplifier is provided to amplify the output signal, a signal conditioning circuit is provided to delay a portion of the signal, and a detector device is provided to detect the signal with a comparator provided to compare the signal with the delayed signal and actuate an alarm.

Additionally, a device producing signals responsive to pressure waves and selected sonic frequencies is taught. If the signals are coincidently received at a coincidence detector, an alarm is activated. Further, the signals can be stretched and/or delayed before receipt at the coincidence detector.

Patent
   RE34788
Priority
Feb 23 1983
Filed
May 19 1992
Issued
Nov 15 1994
Expiry
Nov 15 2011
Assg.orig
Entity
Large
5
9
all paid
1. A signalling device to detect coincidence of first and second selected conditions in a selected area where wherein
the first selected condition is infrasonic air pressure waves having frequencies below 20 cycles per second and the second selected condition is selected sonic frequency waves, said device comprising;
a pressure sensitive transducer means responsive to said infrasonic air pressure waves to provide an alternating electrical signal;
an amplifier means to selectively amplify said alternating electrical signal to provide an amplified alternating output signal;
a rectifier means to rectify said amplified alternating output signal to provide a first rectified signal;
a sonic frequency transducer means responsive to selected frequencies to provide a second alternating electrical signal;
a second amplifier means to selectively amplify said second alternating electrical signal to provide a second amplified alternating output signal;
a second rectifier means to rectify said second amplified alternating output signal to provide a second rectified signal;
a switch means, including a coincidence detector responsive to the first and second rectified signals, which activates an alarm in response to coincident receipt of the first and second rectified signals.
2. A signalling device according to claim 1 including first delay means to delay transmission of said first rectified signal to said switch means for a selected period of time.
3. A signalling device according to claim 1 including second delay means to delay transmission of said second rectified signal to said switch means for a selected period of time.
4. A signalling device according to claim 1, including a stretch means to cause said first rectified signal to have an increased pulse duration, wherein said switch means activates said alarm during any coincident receipt of said second rectified signal and said first rectified signal having said increased pulse duration.
5. A signalling device according to claim 4, including a second stretch means to cause said second rectified signal to have a second increased pulse duration, wherein said switch means activates said alarm during any coincident receipt of said first rectified signal having first-recited increased pulse duration and said second rectified signal having said second increased pulse duration.
6. A signalling device according to claim 1, including a stretch means to cause said second rectified signal to have an increased pulse duration, wherein said switch means activates said alarm during any coincident receipt of said firsts rectified signal and said second rectified signal having said increased pulse duration.
7. A signalling device according to claim 2, including a second delay means to delay transmission of said second rectified signal to said switch means for a second selected period of time. 8. A signalling device according to claim 7, wherein said second selected period of time is greater than said first-recited selected period of time.
9. A signalling device according to claim 8, including a stretch means to cause said first rectified signal to have an increased pulse duration, wherein said switch means activates said alarm during any coincident receipt of said second rectified signal and said first rectified signal having said increased pulse duration.
A signalling device according to claim 9, including a second stretch means to cause said second rectified signal to have a second increased pulse duration, wherein said switch means activates said alarm during any coincident receipt of said first rectified signal having said first-recited increased pulse duration and said second rectified signal
having said second increased pulse duration. 11. A signalling device according to claim 8, including a stretch means to cause said second rectified signal to have an increased pulse duration, wherein said switch means activates said alarm during any coincident receipt of said second rectified signal and said second rectified signal having said
increased pulse duration. 12. A signalling device according to claim 7, including a stretch means to cause said first rectified signal to have an increased pulse duration, wherein said switch means activates said alarm during any coincident receipt of said second rectified signal and said first rectified signal having said increased
pulse duration. 13. A signalling device according to claim 12, including a second stretch means to cause said second rectified signal to have a second increased pulse duration, wherein said switch means activates said alarm during any coincident receipt of said first rectified signal having said first-recited increased pulse duration and said second rectified signal having said second increased pulse duration.
14. A signalling device according to claim 7, including a stretch means to cause said second rectified signal to have an increased pulse duration, wherein said switch means activates said alarm during any coincident receipt of said first rectified signal and said second rectified signal having said increased pulse duration.
A signalling device according to claim 2, including a stretch means to cause said first rectified signal to have an increased pulse duration, wherein said switch means activates said alarm during any coincident receipt of said second rectified signal and said first rectified signal having said increased pulse duration.
A signalling device according to claim 15, including a second stretch means to cause said second rectified signal to have a second increased pulse duration, wherein said switch means activates said alarm during any coincident receipt of said first rectified signal having said first-recited increased pulse duration and said second rectified signal
having said second increased pulse duration. 17. A signalling device according to claim 2, including a stretch means to cause said second rectified signal to have an increased pulse duration, wherein said switch means activates said alarm during any coincident receipt of said first rectified signal and said second rectified signal having said
increased pulse duration. 18. A signalling device according to claim 3, including a stretch means to cause said first rectified signal to have an increased pulse duration, wherein said switch means activates said alarm during any coincident receipt of said second rectified signal and said first rectified signal having said increased
pulse duration. 19. A signalling device according to claim 18, including a second stretch means to cause said second rectified signal to have a second increased pulse duration, wherein said switch means activates said alarm during any coincident receipt of said first rectified signal having first-recited increased pulse duration and said second rectified signal having said second increased pulse duration.
20. A signalling device according to claim 3, including a stretch means to cause said second rectified signal to have an increased pulse duration, wherein said switch means activates said alarm during any coincident receipt of said first rectified signal and said second rectified signal having said increased pulse duration.

This application is a occurance occurrence so a signal extension circuit including diode D12, resistor R37, capacitor C16 to ground G is provided to stretch the signal, for example for approximately 40 milliseconds. The signal from inverter 68 is supplied through a resistor R38 which forms part of an AND gate as described hereinafter.

The signal provided by tracking detector 36 is supplied to a holdoff circuit consisting of a diode D13 and a resistor R39 and inverter 71 where the output from inverter 71 passes through a second "stretch out" circuit diode D14 Resistor R41 and capacitor C17 to ground G to a second inverter 72. The output from inverter 72 is supplied by means of a diode D16 which, with resistor R38, provides an AND gate. So long as there is no alarm from sound or pressure the output from inverters 68, 72 is low. An AND gate composed of resistor R38, diode D16 operates as follows: Assuming inverter 72 is low diode D16 will shunt any output from inverter 68 to ground through resistor R38. Conversly Conversely if the output of inverter 72 is high, diode D16 is reversed biased if the output of inverter 68 is low and in these two instances the anode of diode D17 remains low and there is no output. Upon the occurrence of a pressure wave the output from inverter 72 goes high for a short period determined by the "stretch out" circuit D14-R41-C17. In the event of a sound occurrence output of inverter 68 goes high. The coincidence of the high signals causes diode D17 to conduct charging C17 through resistor R38. Diode D17 resistor R42 and capacitor C18 comprise another stretch circuit which determines the minimum duration of the alarm output. The signal is supplied to an inverter 73 where the output from inverter 73 is supplied through a resistor R43 to the base of a transistor Q4 where the emitter is grounded and the collector is connected to supply voltage A by means of resistor R44. Transistor Q4 is normally conductive but upon the occurrence of a simultaneous pressure and sound signal inverter 73 goes low so that transistor Q4 goes nonconductive and the collector of transistor Q4 is supplied to the base of transistor Q5 which goes conductive activating a LED 4 to indicate an alarm.

FIG. 6 illustrates another utilization of pressure detectors within the scope of the present invention and in this configuration two separate detectors are connected in an anti-coincidence mode. Devices of the sort described herein are useful where pressure events normally occur in the space to be monitored, for example the activation of heating, ventilating, air conditioning equipment, thunderclaps or other occurrences where it is desired to compare the pressure waves in the area to be protected with a reference area so that simultaneous generation of in phase pressure waves prevents false tripping of the alarm system. In the arrangement shown, a remote transducer 76 is located, for example on one side of the wall outside the area to be protected. A master detector 86 is located in the area to be protected. The phase of the pressure signals are split and the phases are "anded" so that in order to get an output from the master device the remote device must generate a signal that is out of phase with the output of the detector in the area to be protected. It has been found that this procedure minimizes the occurrences false alarms due to common mode changes.

A flow chart of the arrangement is shown in FIG. 6 where the remote located transducer 76 is shown connected to an amplifier 77 with the sensitivity adjusted by a potentiometer P11. The output from amplifier 77 is supplied to a signal conditioning device 78 which supplies a signal to a phase splitter 79 which provides outputs 81-82 to positive and negative rectifiers 83 and 84 each of which provides a signal 93-94. In the master detector which is located in the area to be observed, transducer 86, is located to supply a signal to an amplifier 87 with sensitivity adjusted by potentiometer P12. The output from amplifier 87 is supplied through conditioning circuit 88 to a phase splitter 89 which supplies signals 91-92 to rectifiers 96-97 which supply signals 98-99 respectively to the AND gates 101 and 102 along with signals 93 and 94 from phase splitters 83 and 84. The outputs of the AND gates 101 and 102 are supplied to an OR gate 103 to activate a driver 104 to activate the alarm device.

A schematic illustration of a circuit to accomplish the objective shown in FIG. 6 is illustrated in FIG. 7 where transducers 76,86 are shown connected to potentiometers P11 and 12. The output from potentiometer P11 is connected through Pdecoupling capacitors C21-C22 and through resistor R46 to a band pass amplifier 106 which is provided with gain circuit including resistors R48 and R53. A low pass filter resistor R47, capacitor C24 connected to G is provided to the noninverting input of the amplifier. The high pass function of amplifier 106 is provided by capacitor C23. The inverting input to amplifier 106 is supplied from a reference source including a unity gain operational amplifier 107 having a noninverting input from supply voltage A through a voltage divider including resistors R49-R51 and filtered by capacitor C26. The inverting input to op amp 107 is provided from its output. The output 108 from amplifier 107 is supplied through a resistor R53 to the inverting input of operational amplifier 106 and to the noninverting input of amplifier 106 through R52, R46 and R47. The output from amplifier 106 is supplied through a resistor R54 and decoupling capacitors C27-C28 to the inverting input of an operational amplifier 109 to provide an output 110 which is of a first phase. A gain circuit including resistor R56, and a low pass determining capacitor C29 is provided for amplifier 109. Within the scope of the present invention an inverted phase is provided by means of a second operational amplifier 111 where the inverting input to amplifier 111 is provided from amplifier 109 and the noninverting input to amplifier 111 is provided by output 108 of the reference generator amplifier 107 and filtered by capacitor C31 and resistor R66. Resistors R57-R58 are provided in series between the outputs 110 and 113 and are chosen to cause amplifier 111 to have unity gain. Output 113 is provided through resistor R59 to the base of a transistor Q6. The output 110 is likewise provided through a resistor R61 to the base of a transistor Q7. Each of the transistors Q6-Q7 transmits the occurrence of a pressure signal of different phase. The collector of transistor Q7 is connected through an inverter 113 to a holdoff circuit including a diode D16, resistor R63, capacitor C32 to an inverter 116 which supplies an output signal to a "stretch out" circuit including diode D18, resistor R67 and capacitor C34 to provide signal 93 as shown in FIG. 7.

Likewise, transistor Q6 has its collector connected to an inverter 114 where the output is connected to a holdoff circuit including diode D17, resistor R64, and capacitor C33 and to inverter 117 which supplies a "stretch out" circuit comprising diode D19, resistor R66 and capacitor C36 so that signal 94 is provided as shown in FIG. 7.

The transducer 86 located in the area to be monitored is connected through potentiometer P12 and decoupling capacitors 37-38 and resistor R71-R72 to a band pass amplifier 121 which is provided with gain circuit including resistors R77, R78. Capacitor C41 is used to form a high-pass filter. A low pass filter resistor R72, capacitor C37 connected to G is provided to the noninverting input of amplifier 121. The inverting input to amplifier 121 is supplied from a reference source including a unity gain operational amplifier 122 having a noninverting input from supply voltage A through a voltage diver including resistors R73-R74 and filtered by capacitor C42. The inverting input to op amp 122 is provided from its output 123. Output 123 from amplifier 122 is supplied through a resistor R77 to the inverting input of operational amplifier 121 and to the noninverting input of amplifier 121 through resistors R76, R71 and R72. The output from amplifier 121 is supplied through a resistor R79 and decoupling capacitors C43-C44 to the inverting input of an operational amplifier 126 to provide an output 127 which is of a first phase. A gain circuit including resistor R81, and a low pass determining capacitor C46 is provided for amplifier 126. Within the scope of the present invention an inverted phase is provided by means of a second operational amplifier 131 where the inverting input to amplifier 131 is provided from amplifier 126 and the noninverting input to amplifier 131 is provided by output 123 of the reference generator amplifier 122 and filtered by capacitor C50 and resistors R80. Resistors R87-R88 are provided in series between the outputs 127 and 132 and are chosen to cause amplifier 131 to have unity gain. Output 132 is provided through resistor R91 to the base of a transistor Q9. The output 127 is likewise provided through a resistor R82 to the base of a transistor Q8. Each of the transistors Q8-Q9 transmits the occurrence of a pressure signal of different phase. The collector of transistor Q8 is connected through an inverter 128 to a holdoff circuit including a diode D29, resistor R84, capacitor C47 to an inverter 129 which supplies an output signal to a "stretch out" circuit including diode D21, resistor R86 and capacitor C48 to provide signal 98 as shown in FIG. 7.

Likewise transistor Q9 has its collector connected to an inverter 133 where the output is connected to a holdoff circuit including diode D62, resistor R93, and capacitor C19 and to inverter 134 which supplies a "stretch out" circuit comprising diode D23, resistor R94 and capacitor C51 so that signal 99 is provided as shown in FIG. 7.

The signals 93-94 and 98-99 are then provided through inverters 171-174 to transistors Q14, Q13, Q12 and Q11. The outputs from transistors Q12 and Q14 are combined through diodes D28 and D29 to provide an output 121. One of the AND gates, for example AND gate 102, of FIG. 6 is provided by diodes D28,D29. For example, when both transistors Q14 and Q12 go conductive, diodes D29 and D28 are reverse biased, allowing capacitor C53 to be discharged through resistor R97 causing the output of inverter 142 to go high. Output 121 is supplied through a circuit including capacitors C53, resistor R97 to an inverter 142 and a diode D32. Output 122 is provided through a delay circuit including resistor R96 and capacitor C52 to an inverter 141 and a diode D31. The combination of Diodes D31-D32 provides the OR gates of FIG. 7. Thus upon the occurrence of a signal in either output 121 or output 122 inverter 144 goes low through a "stretch out" circuit including diode D32, resistor R98 and capacitor C54 to an inverter 146 and a resistor R99 to activate a transistor Q16 which goes conductive and activates an alarm 160 and light emitting diode LED 6. A double pole switch 161 is provided to operate from position shown in FIG. 7 to permit operation of the audible alarm to a second position shown by dotted line where only the LED 6 is activated.

Logsdon, William K., DuRand, III, Elden E.

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May 19 1992Blue Grass Electronics, Inc.(assignment on the face of the patent)
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