Solid state optically coupled electrical power switch

Abstract

Solid state optically coupled power switch with light induced or modified voltage applied or removed at one or more MOSFET gate and source electrode pairs to shift each MOSFET between its high and low impedance states and in various circuit arrays for ac or dc switching and/or cross points switching or mechanical Form C relay substitution or other purposes

Description

, 10B megonms megaohms as shown in FIG. 1B speeds the discharge of C_E, but has the effect of increasing turn-on time. This is acceptable where switching speed is not critical. Dropping R to an even lower value would theoretically discharge C_E in 20-50 microseconds but can unfortunately load down D-V excessively to where full or adequate turn-on does not exist.

The ideal arrangement, then, is one where the full D-V voltage is applied during turn-on with minimal biasing, but where maximum biasing is attained during turnoff. Such an arrangement is provided in the embodiment of the invention illustrated in FIG. 1C, where the bias resistor is replaced by an N-channel depletion mode junction FET, Q-2.

A second diode array, D-V₂, is connected to the gate of Q-2. Q-2, being a depletion mode FET, is normally in a low impedance state, well under 1,000 ohms. When L-1 activates D-V₂, Q-2 sces D-V₂ total voltage at its gate, causing Q-2 to rapidly be "pinched off" to a high impedance, thereby allowing enhanced turn-on time.

When L-1 is deactivated, D-V₂ voltage collapses and Q-2 is no longer pinched off and drops to a low impedance, thereby causing rapid C_E discharge and Q-1 turn-off.

Photovoltaic diode generators, D-V and D-V₂, and FET, Q-2, are fabricated on the same chip using dielectric isolation. Each diode is electrically isolated from the next except for surface interconnect metallurgy, which proceeds from one anode to the next cathode. The oxide "tub" surrounding each diode prevents electrical interaction except between the P and N regions of each diode except through surface interconnect metalization.

Such an array produced by conventional integrated circuit diffusion isolation technology would result in undesirable photovoltaic action at each isolation junction, cancelling out the desired effects. The dielectric process provides near perfect isolation and eliminates the many external-wire connections associated with individual diode chips. It also provides the maximum diode element location concentration for receiving light from L-1.

FIG. 5 depicts the cross-sectional geometry of the diodes and the bias FET, Q-2. While FIGS. 1A, 1B and 1C reflect basic configurations, a more preferred embodiment of the invention for many practical applications is shown in FIG. 6. In the FIG. 6 circuit, the voltage generated by D-V is simultaneously applied to the gates and sources of Q-1 and Q-2, which are connected source-to-source. In operation, Q-1 and Q-2 can each block voltage in one direction, but can withstand only about one volt in the reverse direction. In FIG. 6, however, either Q-1 or Q-2 is always in the full blocking mode, thereby blocking load voltage regardless of the polarity.

With the vertical DMOS structure, the conductivity is modulated with either polarity of load voltage. Hence, with a relatively high AC load voltage, either Q-1 or Q-2 bears the majority of the blocking requirement, but both drop to a low impedance with an L-1 signal. The final ON resistance, then, is the sum of Q-1 and Q-2.

In this approach, no steering diodes are required and, therefore, an ideal condition of no voltage offset is maintained. The elimination of steering diodes means that dissipation and signal distortion are minimized. Furthermore, high voltage AC (above 300 V) switching can be achieved. (Steering diodes or the low forward drop of Schottky or gold-doped type are not available today in high-voltage, low-leakage versions.)

It has been noted that the use of a depletion mode FET such as Q-2 can enhance turn-off. It can also be noted that the addition of a photovoltaically activated FET, Q-2, as in FIG. 7, can enhance turn-on speed as follows:

L-1 is so arranged as to simultaneously activate D-V. The reduced impedance of Q-2 causes Q-1 gate capacitance to suddenly begin charging toward V_B through Q-2. Q-2 has an input capacitance much smaller than that of Q-1 by an order to magnitude equal to the degree of turn-on speed enhancement. Since Q-2 handles negligible current, it can be a much smaller chip than Q-1, thereby facilitating a geometry contributing less capacitance.

The result is the rapid charge of Q-1 gate capacitance and faster turn-on, which could not occur were gate capacitance to charge directly through the high impedance D-V voltage source.

With the preceding means for turn-on and the means of FIG. 1-C for turn-off, it is possible to fabricate a bidirectional, distortion-free AC power amplifier or switch capable of operating at frequencies above 1 Megahertz.

Unlike thyristors, the switch exhibits no regenerative mechanism and hence, cannot be latched on by a voltage transient.

With vertical DMOS technology, it is possible to integrate all elements, except for the LED, on a single chip using dielectric isolation technology. The single chip would include the photovoltaic diodes (FIG. 7).

The circuit of FIG. 8 comprises a unique configuration in which transformer action augments the isolated photovoltaic drive scheme in order to achieve very fast turn-on and turn-off times.

In the FIG. 8 circuit, a LED is in parallel with the primary of a pulse transformer T-1. When the input signal abruptly rises to a positive level, LED-1 is illuminated. This would noramlly normally cause voltage generator, D-V to begin charging C_E, in turn causing Q-1 to turn on in a time comparable to the time constant of C_E and internal equivalent resistance of V_G.

However, the rise in input signal is seen at the secondary of T-1 as a positive pulse which rapidly charges C_E through forward biased zener diode, D_Z. Once the input signal reaches an on-quiescent state, the positive pulse at the T-1 secondary disappears, but the charge on C_E in is maintained by D-V.

When the input signal drops to zero, L-1 ceases its illumination and D-V discharge through available leakage paths, or, if one were connected, a gate-to-source bias resistor. Turn-off time under this condition would, in certain applications, be excessive.

With transformer augmentation, the loss of input signal and cessation of T-1 primary current not only causes L-1's output to cease, but also causes a negative pulse to appear at the T-1 secondary, causing D_Z to break over in the reverse direction, effectively grounding the gate of Q-1. As a result, C_E is discharged, abruptly causing extremely fast Q-1 to turn-off.

FIG. 8 depicts a similar configuration in which Q-1 and Q-2 are connected to form an AC switch with high-speed drive circuit. It is desirable in the circuits of FIG. 8 that the zener diode be specified at a voltage approximately equal to that of the photovoltaic generator and that the voltage appearing at the secondary of T-1, especially at turn-off, be greater than the breakdown voltage of D_Z.

The result is a magnetically and optically isolated switch capable of switching speeds on the order of hundreds of nanoseconds or better. Since the T-1 is needed only during switching and depends on D-V during the on period, T-1 can be sharply reduced in size.

In various prior art technologies, it his been demonstrated that a DC voltage could be used to operate an oscillator. The oscillator's high frequency output could be transformer coupled, rectified, filtered and applied to a transistor base or FET gate to turn it on.

Such approaches, however, are more complex and introduce filter-induced delays along with an oscillation signal which can be undesirable, particularly when switching low-level or high-frequency signals.

The circuit of FIGS. 1, 6, 7 and 8 provide simplified switching without the hazard of spurious signals or beat frequencies.

While the primary mode of fabrication is based on thick film hybrid circuit technology, variations of the preceding circuits can, with the exception of the LED's, be readily fabricated totally on a single integrated circuit chip; in particular, by means of dielectric isolation technology. An IC employing the LEDS's, as well, is compatible with present knowledge of processing techniques, but is not yet economically feasible. Such a chip for example could be fabricated having all elements fabricated with Gallum Arsenide rather than having the diode and FET's processed with silicon as is currently the practice.

A major consideration in activating the photovoltaic array is that the maximum output current can be no greater than the current generated by the least illuminated diode in the series string. In a straightforward matrix of series-connected diodes (FIG. 9), the diode farthest from the LED becomes a limiting factor. For comparable efficiency (comparable impedance in the illuminated state), the diode area should be larger as the distance from the LED increases.

The optimized configuration, then, for a series string of photovoltaic diodes is the "wagon wheel" configuration of FIG. 10A (the equivalent circuit of which is shown in FIG. 10B and a cross-section of which is shown in FIG. 10C), with the LED mounted in the center so as to equally illuminate all diodes. The wagon wheel surface geometry, coupled with the hemispherical refractive film, provides maximum response to the LED hemispherical radiation pattern across the entire surface of each diode.

FIG. 11 depicts such a circuit, capable of switching AC or DC, in which the switching elements are depletion mode V-MOS chips. Bias resistors R-1 and R-2 are selected to be above 5 megohm megaohms. The result is that when the photovoltaic generators DV-1 or DV-2 are activated, turnoff is rapid because of minimal shunt resistance. Turn-on is slower because of the slow discharge of MOSFET gate capacitance through the large bias resistor value.

In the circuit shown, LED, L-1, is normally on, thereby maintaining Q-2 and Q-3 in an OFF condition. When a control signal is applied to terminal 1, Q-1 becomes saturated, thereby shunting current around L-1. Base current to Q-1 passes through L-2, thereby rapidly turning off Q-4 and Q-5 before Q-2 and Q-3 turn on. When the control signal is removed, L-1 initiates rapid turn off of Q-2 and Q-3 before Q-4 and Q-5 turn on.

FIG. 11A shows the equivalent circuit for such a physical circuit as shown in FIG. 11.

It is evident that those skilled in the art, once given the benefit of the foregoing disclosures, may now make numerous other uses and modifications of, and departures from, the specific embodiments described herein without departing from the inventive concepts. Consequently, the invention is to be construed as embracing each and every novel feature and novel combination of features present in, or possessed by, the apparatus and techniques herein disclosed and limited solely by the scope and spirit of the appended claims.