A metal selective polymer removal process is disclosed which prevents metal lift-off for use especially suited for ULSI fabrication.
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8. A process for removing post etch residue from a metal structure comprising the following steps:
introducing anhydrous HF into a chamber containing said metal structure which includes non water soluble residue thereon; introducing water vapor into said chamber; and removing said post etch residue from said structure after performing the above steps.
1. A process for removal of metal etch byproducts from a metal etch from a semiconductor wafer comprising the following steps:
introducing HF into a chamber containing said wafer which includes non-water soluble byproducts thereon; introducing N2 +xH2 O, where x is a real number, into said chamber; and removing soluble byproducts from said wafer after performing the above steps.
6. A process for removing sidewall polymer from the posts of a deformable mirror device comprising the following steps:
introducing HF into a chamber containing said device which includes non-water soluble byproducts thereon, introducing N2 +xH2 O, where x is a real number, into said chamber; and removing soluble byproduct from said device after performing the above steps.
10. A process for removing post etch residue from a metal structure comprising the following steps:
introducing anhydrous HF into a chamber containing said metal structure which includes non water soluble residue thereon; passing a gas over water and introducing the result into said chamber; and removing said post etch residue from said structure after performing the above steps.
3. A process for removing post etch metal silicate-containing residue from a metal structure comprising the following steps:
introducing vapor HF into a chamber containing said metal structure which includes non water soluble residue thereon; passing a gas over water and introducing the result into said chamber; and removing said post etch metal silicate-containing residue from said structure after performing the above steps.
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The density of devices fabricated on semiconductor substrates has increased steadily over the years with ultra large scale integration (ULSI) currently being employed in 16 megabit (MB) dynamic random access memories (DRAMs). Accompanying this trend have been decreased feature sizes (currently less than or equal to 0.5 microns) and increased demands on process technology. To pattern such small features, conventional lithographic procedures are being supplanted by newer ones based on diffusion enhanced silylated resist DESIRE™ processes. The numerous reports of the success of the diffusion enhanced silylated processes in producing sub-half micron features in various resists, using one line and deep ultra violet light exposure indicates this process has a bright future. The resolution and throughput rate up to the image transfer step exceeds that of conventional positive resists and are clearly superior when topography is of major concern. The resist is somewhat more difficult to remove with diffusion enhanced silylated resist processes as compared with conventional processes as a result of larger amounts of etch byproducts such as sidewall polymer (SWP) on vertical walls of a device undergoing fabrication. These byproducts, generally referred to as polymers, are generally comprised of a metal and SiO2 molecule. For instance, the molecule can comprise carbon from the photoresist, metal from the metal layer and SiO2. Further, data has indicated that sidewall polymer is comprised of aluminum silicate and very small amounts of fluorocarbons. Fluorocarbons are noncombustible and therefore are not removed during an O2 in-situ ash sequence of a metal etch. Thus, ashing has proven to be ineffective because of the high carbon content in the byproduct molecule from the photoresist. The difficulty with which resist can be removed has proven to be a severe impediment to the generation of sub-half micron features. Previously solvent/ultrasonic agitation had been used to remove SWP. For instance, soaking the device undergoing fabrication in an ethanolamine solution followed optionally with ultrasonic agitation using a Ney ultrasonic (which allows the capability of adjusting the power of the ultrasonic) has been used in the past. However, these techniques prove to be unusable because of the tendency of metal, such as aluminum, to lift off of the minimum features. Further, these techniques tend to leave behind significant amounts of residue on device sidewalls and on device surfaces. Until now, no effective means has been available to solve the problem of removing sidewall polymer resulting from diffusion enhanced silyated resist processes.
A process to remove the sidewall polymer without metal lift-off is disclosed.
FIGS. 1 through 6 are drawings in which applicable reference numerals have been carried forward, which illustrate cross-sectional views of a semiconductor wafer undergoing fabrication according to a diffusion enhanced silyated resist process.
Late in the fabrication sequence, specific devices such as DRAMs must be electrically interconnected to accomplish the desired circuit function. One important aspect of this interconnection concerns the second interconnect level and the last level in the manufacture of the device, conventionally known as Metal 2 (M2). The M2 scheme as shown in the cross-sectional FIG. 1, conventionally comprises a Si O2 substrate followed by metal 2 which generally comprises a layer of titanium tungsten (TiW) under tungsten (W) which lies under aluminum alloy which includes 1% silicon and 0.5% copper. With reference to FIGS. 1 through 6 which illustrate cross-sectional views of a semiconductor wafer 1 undergoing fabrication according to a diffusion enhanced silylated resist process, that process is as follows. A positive resist such as a novolac-based resist 2 is conventionally spin-coated and after subsequent exposure through mask 4, resist 2 is treated with hexamethyldisilazine vapor (HMDS) prior to development. The silyation reaction modifies the surface of the exposed resist, yielding areas 6 which are less susceptible to dry etching by O2 plasmas. This reverses the normal development behavior of the resist and affords a negative image. A main advantage of dry etching the unexposed (and hence underivatized) resist is that it circumvents the undesirable swelling and the concomitant loss of resolution that often accompanies wet etch development. As shown in FIG. 3, an oxygen plasma etch etches away the unexposed resist. In order to transfer the pattern into the metal, the wafer is dry etched with an anisotropic reactive ion etching (RIE). The chemistries used are Cl2 /BCl3 to etch the aluminum alloy followed by SF6 /Ar to etch the W and TiW. Fine line geometries with essentially vertical walls are ideally obtained as shown in FIG. 4. The final step in the etch is an in situ ash which reduces corrosion by oxidizing the responsible chlorine-containing compounds and removes areas 6 which function as bulk resist masks. This etch is greater than 20:1 selective to the SiO2 substrate. The etch is anisotropic because during the process a nonvolatile polymer (SWP) is deposited on the surfaces being etched which protects the underlying surfaces against etching by reactive gas. Stripping of remaining resist and SWP is the last step in the process flow for this level. The invention's process is a vapor phase process which involves anhydrous HF and N2 Hx where x is a real number (N2 Hx is achievable by passing nitrogen over water), introduced in a chamber with the wafer to be processed, which react to make the etch byproducts 5 water soluble. After the byproducts acquire their water soluble property, water is applied to the wafer so as to rinse the byproduct away, as shown in FIG. 5. Note that aqueous HF can be substituted for anhydrous HF- i.e. one can make vapor HF from aqueous HF and react it with the aforementioned N2 +H2 O. Vapor phase processing provides an advantage or other types of processing in that it will not corrode metal like aqueous phase or liquid phase processing. Experimental data indicates that after processing according to the invention, the sheet resistance on the metal does not change, thereby indicating the reactions during processing do not harm metal. Further, damage resulting from processing to the silicon dioxide substrate can be controlled through the regulation of vapor. The process of the invention can be accomplished using a wafer vapor phase cleaner. A wafer vapor phase cleaner is a machine that removes oxides from a wafer. Wafer vapor phase cleaners include the Advantage, Equinox and scop scope of the invention as claimed below.
Bohannon, Brynne K., Syverson, Daniel J.
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