Method for manufacturing a modular semiconductor power device

Abstract

The components used in the method comprise a heat-dissipating base plate, one or more three-layer plates (the top layer consisting of copper plates and strips) and a one-piece frame designed to constitute the terminals. After the chips have been soldered onto the upper plates and connected to the strips, the inner ends of the frame are soldered to points of connection with the chips. This is followed by the encapsulation in resin and the shearing of the outer portions of the frame, which, during the process, serve to temporarily connect the terminals.

Description

maintainins:) , molybdenum, having an expansion coefficient lying half way between those of silicon and copper, which however complicate the assembling and lower the thermal performance).

The use of a low-stress type of resin helps to limit the stress transmitted to the chips even in the case of chips of very large dimensions.

It is also clear that numerous modifications, adjustments, variations and substitutions may be made to the embodiments previously described by way of example, always remaining within the spirit of this invention and its scope. For example, the wires connecting the chips to the metal strips of the substrates can be by direct soldering between the inner terminal portions of the one-piece frame and the chips, whenever the latter have wettable metal coatings. These internal portions can then be soldered to points (P) of connection with the chips situated on the aforesaid plates 33 and strips 34, 35, 36 (as in the case illustrated in FIGS. 4 and 5), or situated on the same plates and on wettable metal coatings on the surface of the chips.

Likewise, the chip-supporting substrates could have a different structure from that previously described and the insulation between the chips and the dissipator could be achieved by means of a layer of the encapsulating resin itself--which in this case should be of high thermal conductivity--instead of by a layer of alumina.

Claims

1. A method of manufacturing a modular semiconductor power device, comprising the steps of:

(a) welding semiconductor means including at least one attaching a semiconductor chip onto conductive-sheet means including at least one a sheet of an electrically conductive material;

(b) forming a power-device body by fixing affixing said sheet to a member provided with a heat-dissipating metal plate for dissipating heat generated by the Joule effect and parallel to and close to said heat-dissipating plate ;

(c) blanking from a single sheet of conductive material a one-piece forming a frame formed with strips adapted to form for signal and power terminals of for said device semiconductor chip, and with temporary connections between at least some of outer ends of said strips;

(d) soldering selectively connecting inner ends of said strips selectively to points of said conductive sheet means connected with said semiconductor means or to said semiconductor means chip;

(e) encapsulating at least active parts of said body semiconductor chip, said sheet of electrically conductive material, and said inner ends of said strips with an insulating resin and leaving said outer ends of said strips and an outer surface of said plate uncovered by said resin ; and

(f) shearing removing said temporary connections from said strips.

2. The method defined in claim 1 wherein said conductor sheet means comprises a plurality of sheet members composed of copper, said sheet means being disposed further comprising forming said sheet of electrically conductive material by disposing a first electrically conductive sheet member on a first face of an intermediate layer formed with an alumina plate, and a further sheet of copper of a size at most equal to that of the intermediate layer and disposed disposing a second electrically conductive sheet member on another a second face of said intermediate layer, said inner ends of said strips being soldered to said sheet members and a plurality of chips forming said semiconductor means and connected with wires soldered to said sheet members .

3. The method defined in claim 2 wherein said further step of affixing said sheet is soldered to a surface of said heat-dissipating metal plate opposite said outer surface, connections between said chips and said sheet members being made by ultrasonic soldering of aluminum wires comprises attaching said second electrically conductive sheet member to said heat-dissipating plate.

4. The method defined in claim 1 wherein said inner ends are selectively connected to wettable metal coatings on surfaces of chips forming said semiconductor means. The method defined in claim 3 wherein said step of attaching said second electrically conductive sheet member to said heat-dissipating a plate comprises soldering said second electrically conductive sheet member to said heat-dissipating plate.

5. The method defined in claim 1 wherein, after blanking of said one-piece frame and prior to the soldering of said inner ends of said strips, said inner ends of said strips are bent in a direction perpendicular to a plane of said frame. The method defined in claim 4 wherein said step of soldering said second electrically conductive sheet member to said heat-dissipating plate comprises ultrasonically bonding said second electrically conductive sheet member to said heat-dissipating plate.

6. The method defined in claim 1 wherein, after encapsulation and shearing os said temporary connections, selected ones of said strips adapted to form signal terminals are bent in a direction perpendicular to said base plate while others of said strips adapted to form power terminals are bent over the encapsulating resin in a direction parallel to said base plate. The method defined in claim 2 wherein said step of disposing a first electrically conductive sheet member on a first face of an intermediate layer comprises disposing a first electrically conductive sheet member on a first face of an alumina layer.

7. The method defined in claim 2 wherein said steps of forming said sheet of electrically conductive material comprises disposing a first sheet member comprising copper on a first face of the intermediate layer and disposing a second electrically conductive sheet member comprising copper on a second face of said intermediate layer.

8. The method defined in claim 2 further comprising disposing a plurality of additional sheet members on said first face of said intermediate layer.

9. The method defined in claim 1 wherein said inner ends of said strips are selectively connected to wettable metal coatings on surfaces of said semiconductor chip.

10. The method defined in claim 1 wherein, after forming said frame and prior to the selectively connecting of inner ends of said strips, said inner ends of said strips are bent in a direction perpendicular to a plane of said frame.

11. The method defined in claim 1 wherein said encapsulating step comprises encapsulating at least parts of said semiconductor chip, said sheet of electrically conductive material, and said inner ends of said strips with an encapsulating resin, and wherein, after encapsulation and removing of said temporary connections, selected strips of said frame are adapted to form signal terminals bent in a direction perpendicular to said heat-dissipating plate while other selected strips of said frame are strips adapted to form power terminals bent over the encapsulating resin in a direction parallel to said base heat-dissipating plate.

12. The method defined in claim 1 wherein said step of affixing said sheet to said heat-dissipating plate comprises affixing said sheet to allow heat generated by a Joule effect to be dissipated.

13. The method defined in claim 1 wherein said step of affixing said sheet to said heat-dissipating plate comprises affixing said sheet parallel to and close to said heat-dissipating plate.

14. The method defined in claim 1 wherein said step of forming a frame comprises blanking a single sheet of conductive material.

15. The method defined in claim 1 wherein said step of selectively connecting inner ends of said strips comprises soldering said inner ends of said to said sheet of electrically conductive material or to said semiconductor chip.

16. The method defined in claim 1 wherein said step of encapsulating at least parts of said semiconductor chip said sheet of electrically conductive material, and said inner ends of said strips comprises encapsulating said at least parts of said semiconductor chip, said sheet of electrically conductive material, and said inner ends of said strips with an insulator.

17. The method defined in claim 11 wherein said step of encapsulating said semiconductor chip, said sheet of electrically conductive material, and said inner ends of said strips with an insulator comprises encapsulating said at least parts with an insulating resin.

18. The method defined in claim 1 wherein said step of encapsulating at least parts of said semiconductor chip, said sheet of electrically conductive material, and said inner ends of said strips with an insulator comprises leaving said outer ends of said strips uncovered by said insulator.

19. The method defined in claim 1 wherein said step of removing said temporary connections from said strips comprises shearing said temporary connections.

20. A method for making a semiconductor package, comprising:

attaching a semiconductor device to a first surface of a substrate, said substrate having power leads on said first surface;

electrically connecting said semiconductor device to said power leads;

connecting selected leads of a lead frame with said power leads, said lead frame having a plurality of said leads temporarily attached to each other; and

encapsulating at least portions of said selected leads and said semiconductor device.

21. The method of claim 20 further comprising locating said substrate on a heat sink body prior to locating said lead frame.

22. The method of claim 20 wherein said step of attaching a semiconductor device to a first surface of a substrate comprises attaching a semiconductor device on a first surface of an insulating substrate.

23. The method of claim 22 wherein said step of attaching a semiconductor device to a first surface of an insulating substrate comprises attaching a semiconductor device on a first surface of an alumina layer.

24. The method of claim 23 wherein said step of attaching a semiconductor device to a first surface of an insulating substrate comprises providing a conductive layer on said alumina layer and locating said semiconductor device on said conductive layer.

25. The method of claim 24 wherein said step of providing a conductive layer on said alumina layer on which said semiconductor device is located comprises providing a layer comprising copper.

26. The method of claim 20 wherein said step of attaching a semiconductor device to a first surface of a substrate comprises attaching a semiconductor device to a first surface of a sandwich comprising an alumina layer having said power leads on one surface of said substrate and a conductive layer on another surface of said substrate.

27. The method of claim 26 wherein said step of attaching a semiconductor device to a first surface of a sandwich comprising an alumina layer having said power leads on one surface of said substrate and a conductive layer on another surface of said substrate comprises attaching a semiconductor device to a first surface of a sandwich comprising an alumina layer having said power leads on one surface of said substrate and a conductive layer comprising copper on another surface.

28. The method of claim 27 further comprising locating said conductive layer comprising copper a body.

29. The method of claim 20 wherein said step of attaching a semiconductor device to a first surface of a substrate comprises providing an insulating layer having three topside conductors, one of which is for carrying said semiconductor device, and two of which are for providing power contacts.

30. The method of claim 29 further providing connecting wires from said two topside conductors for providing power contacts to said semiconductor chip.

31. The method of claim 29 wherein said three topside conductors comprises copper.

32. A method for making a package containing at least one semiconductor device comprising:

fabricating a structure comprising an insulating layer and plural top conductive layers on said insulating layer;

electrically coupling a semiconductor device to at least one of said top conductive layers so that at least some of said top conductive layers can supply power to said semiconductor device;

electrically contacting plural leads to at least some of said top conductive layers; and

encapsulating at least portions of said semiconductor device and said structure.

33. The method of claim 32 wherein said insulating layer is alumina.

34. The method of claim 32 further comprising forming said semiconductor device to present power leads external to said encapsulated portions.

35. The method of claim 32 further comprising attaching a heat sink to said insulating layer with a bottom conductive layer on said insulating layer between said insulating layer and said heat sink.

36. The method of claim 35 wherein said conductive layer between said insulating layer and said heat sink comprises copper.

37. The method of claim 32 further comprising providing three topside conductors, one of which for carrying said semiconductor chip and two of which for providing power contacts.

38. The method of claim 37 further providing connecting wires from said two topside conductors for providing power contacts to said semiconductor chip.

39. The method of claim 37 wherein said three topside conductors comprise copper.