A buck switching DC-to-DC regulator having a resistor and capacitor in combination across the storage inductor to measure output current and voltage. The resistor connects to the input of the inductor and the capacitor to the output of the inductor. The junction of the resistor and capacitor connects to an error amplifier for controlling the switching regulator. The regulator may be paralleled for more output current by connecting the outputs together and providing a common reference voltage to all the regulators.
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11. A switching regulator having a switch, an inductor and a filter capacitor coupled in series at junctions, and an error amplifier having an input for controlling the switch, CHARACTERIZED BY:
a first resistor coupled to the junction between the switch and the inductor; a capacitor connected to the first resistor at a node and to the junction between the inductor and the filter capacitor; wherein the node is coupled to the error amplifier input.
0. 21. For use with a switching regulator having an inductor with an internal resistance and subject to a voltage drop thereacross, a feedback circuit, comprising:
a feedback resistor coupled to the inductor; and a capacitor series-coupled to the feedback resistor and coupled to a fixed potential associated with the switching regulator, the feedback resistor and capacitor configured to provide a signal to regulate the switching regulator as a function of the voltage drop across the inductor.
1. In a computing system, a switching regulator for powering a load including a microprocessor, the switching regulator having a switch, an inductor and a filter capacitor coupled in series at junctions, and an error amplifier having an input for controlling the switch, CHARACTERIZED BY:
a first resistor coupled to the junction between the switch and the inductor; a capacitor connected to the first resistor at a node and to the junction between the inductor and the filter capacitor; wherein the node is coupled to the error amplifier input.
0. 31. For use with a switching regulator having an inductor with an internal resistance and subject to a voltage drop thereacross, a method for configuring a feedback path to provide a signal to regulate the switching regulator, comprising:
coupling a feedback resistor to the inductor; and series-coupling a capacitor to the feedback resistor and coupled to a fixed potential associated with the switching regulator, the feedback resistor and capacitor configured to provide the signal to regulate the switching regulator as a function of the voltage drop across the inductor.
0. 41. A switching regulator having an input and configured to power a load coupled to an output thereof, comprising:
a switch coupled to the input; an inductor, coupled to the switch, having an internal resistance and subject to a voltage drop thereacross; a filter capacitor interposed between the inductor and the output; and a feedback circuit, including: a feedback resistor coupled to the inductor; and a capacitor series-coupled to the feedback resistor and coupled to a fixed potential associated with the switching regulator, the feedback resistor and capacitor configured to provide a signal to control the switch of the switching regulator as a function of the voltage drop across the inductor. 2. The computing system switching regulator as recited in
3. The computing system switching regulator as recited in
4. The computing system switching regulator as recited in
a first impedance coupled between the node and the inverting input of the error amplifier; and a second impedance disposed between the output and inverting input of the error amplifier.
5. The computing system switching regulator as recited in
6. The computing system switching regulator as recited in
7. The computing system switching regulator as recited in
8. The computing system switching regulator as recited in
9. The computing system switching regulator as recited in
10. The computing system switching regulator as recited in
12. The computing system switching regulator as recited in
13. The computing system switching regulator as recited in
14. The computing system switching regulator as recited in
a first impedance coupled between the node and the inverting input of the error amplifier; and a second impedance disposed between the output and inverting input of the error amplifier.
15. The computing system switching regulator as recited in
16. The computing system switching regulator as recited in
17. The computing system switching regulator as recited in
18. The computing system switching regulator as recited in
19. The computing system switching regulator as recited in
20. The computing system switching regulator as recited in
0. 22. The circuit as recited in
a switch coupled between an input of the switching regulator and the inductor; an error amplifier coupled to and configured to control the switch; a first impedance and resistor coupled to an inverting input of the error amplifier; and a second impedance interposed between an output of the error amplifier and the inverting input of the error amplifier.
0. 23. The circuit as recited in
0. 24. The circuit as recited in
0. 25. The circuit as recited in
0. 26. The circuit as recited in
0. 27. The circuit as recited in
0. 28. The circuit as recited in
0. 29. The circuit as recited in
0. 30. The circuit as recited in
0. 32. The method as recited in
a switch coupled between an input of the switching regulator and the inductor; an error amplifier coupled to and configured to control the switch; a first impedance and resistor coupled to an inverting input of the error amplifier; and a second impedance interposed between an output of the error amplifier and the inverting input of the error amplifier.
0. 33. The method as recited in
0. 34. The method as recited in
0. 35. The method as recited in
0. 36. The method as recited in
0. 37. The method as recited in
0. 38. The method as recited in
0. 39. The method as recited in
0. 40. The method as recited in
0. 42. The switching regulator as recited in
0. 43. The switching regulator as recited in
a first impedance and resistor coupled to an inverting input of the error amplifier; and a second impedance interposed between an output of the error amplifier and the inverting input of the error amplifier.
0. 44. The switching regulator as recited in
0. 45. The switching regulator as recited in
0. 46. The switching regulator as recited in
0. 47. The switching regulator as recited in
0. 48. The switching regulator as recited in
0. 49. The switching regulator as recited in
0. 50. The switching regulator as recited in
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This application claims priority of provisional Application Ser. No. 60/028,041 which was filed on Oct. 9, 1996.
1. Field of the Invention
This invention relates to switching regulators in general and, more particularly, to low output voltage switching regulators, typically referred to as "buck" regulators.
2. Description of the Prior Art
To meet the demand for faster and more powerful personal computers and workstations, microprocessor manufacturers are increasing the clock frequency at which the microprocessor operates. Because most of the microprocessors are implemented in complementary metal-oxide-semiconductor (CMOS) technology, the power dissipation of the microprocessor generally increases linearly with the clock frequency. In high power designs, the heat created by the power dissipated in the microprocessor is dissipated by fan-cooled heat sinks attached to the microprocessor's package. However, even this technique may be insufficient for dissipating sufficient heat with newer microprocessors operating at even higher clock speeds. Aside from going to more exotic types of heat removal, the power dissipated must be reduced without reducing clock speeds.
Three techniques are generally used to reduce power dissipation: reducing capacitive loading of internal nodes within the microprocessor, power supply voltage reduction, and selective clock speed reduction. The first approach is typically dependent on the dimensions of junctions and conductors of the fabrication process used to make the microprocessor and are not generally under the control of a circuit designer. The last two techniques may be used in combination. Because the power dissipation is related to the square of the power supply voltage, even a small reduction in power supply voltage makes a significant reduction in power dissipation. Since power dissipation is proportional to clock frequency, if the clock is removed or significantly slowed in portions of the microprocessor not being used at any given time, very little power is dissipated in those portions and the overall power dissipated is significantly reduced.
However, these power savings come at a cost. Power supply current can swing widely--from hundreds of milliamperes to over ten amperes with the microprocessor unable to tolerate more than a few percent change in voltage. Further, the change in current can occur in tens of nanoseconds and may change in magnitude with the instructions and data being processed. The power supply designed to supply the microprocessor must have a sufficiently low impedance and tight regulation to supply such dynamic power consumption. Moreover, if the power supply voltage is only a few volts (e.g., 3.3 or even 2 volts), the power supplies that can deliver over ten amperes at these voltages are very difficult to make and control and still operate efficiently.
To further complicate matters, the microprocessor may be powered at a different voltage than the rest of the integrated circuits in the computer. For example, the voltage available to power components in the computer is typically five volts with the microprocessor operating at three volts or so. Usually, a dedicated power supply for the microprocessor is placed in close proximity to the microprocessor and preferably on the same circuit board therewith. Thus, the power supply must be small and efficient. To meet these requirements, a small DC-to-DC switching power regulator is usually used.
Switching regulators are widely used in the DC-to-DC power supply market because they are generally efficient in terms of both power conversion as well as size. The typical kind of switching regulator used to convert a higher input voltage to a lower output voltage is known as "buck" regulator. Three kinds of feedback are generally used to control the operation of the regulator: voltage alone (with current limiting), voltage with peak current control, and voltage with average current control. See "Fueling the Megaprocesors--Empowering Dynamic Energy Management" by Bob Mammano, published by the Unitrode Corporation, 1996, pages 1-5 to 1-6 and incorporated herein by reference, describing these types of feedback as part of a buck switching regulator. For microprocessor applications, the voltage with average current control type of regulation is generally preferred over the other types for the described reasons. However, regulators using a lumped resistance in series with the output thereof for current sensing (both for peak current as well as average current control techniques) usually has significant power dissipation therein (e.g., one watt or more) at the higher output currents. (The resistance must be high enough to provide a sufficiently high voltage, usually tens of millivolts, to overcome input offset errors of the sense amplifier connected to the resistor at moderate output currents.) This reduces the overall efficiency of the regulator and reduces available margin for output voltage variation, as well as requiring a physically large resistor to handle the dissipated power. Further, the circuitry implementing the average current control technique is significantly more complicated than the circuitry of the other two techniques.
Therefore, one aspect of the invention is to provide an efficient switching regulator having a voltage and current control technique.
It is another aspect of the invention to provide a switching regulator having a fast transient response with relatively simple control circuitry.
It is a further aspect of the invention to provide a switching regulator design that allows for parallel operation.
This and other aspects of the invention may be obtained generally in a computing system, a switching regulator for powering a load including a microprocessor, the switching regulator having a switch, an inductor and a filter capacitor coupled in series at junctions, and an error amplifier having an input for controlling the switch. The regulator is characterized by a first resistor, coupled to the junction between the switch and the inductor, and a capacitor connected to the first resistor at a node and to the junction between the inductor and the filter capacitor. The node is coupled to the error amplifier input.
The foregoing features of this invention, as well as the invention itself, may be more fully understood from the following detailed description of the drawings, in which:
Generally, the invention may understood by referring to FIG. 1. As discussed below in more detail and in accordance with one embodiment of the invention, an exemplary computing system 10, has a switching regulator 11 for powering a load 12 including a microprocessor 13. The switching regulator 11 has a switch 20, an inductor 21 and a filter capacitor 22 couples in series at respective junctions 23, 24, and an error amplifier 26 having an input for controlling the switch 20. A first resistor 30 is coupled between the junction 23 and a node 32. A capacitor 31 is coupled between node 32 and to the junction 24. Node 32 is in turn coupled to the input of the error amplifier 26. Thus, first resistor 30 and capacitor 31 combine to be the feedback path for controlling the switching regulator 11.
In more detail, the switching regulator 11, here a buck regulator, takes an input voltage from input VIN and converts it to a lower voltage for use by load 12. The load 12 is illustrated here as a microprocessor 13 with an exemplary one of a plurality of bypass capacitors 14 (typically of different types and capacitance values) and inductance 15 (shown here as a lumped inductance) representing the distributed inductance of the power supply printed wiring board traces. The combined effect of capacitance 14 and inductance 15 (which may be undesirable) serves to smooth out the rapid transitions in current consumption by microprocessor 13, described above.
The switching regulator 11 includes an illustrative switch 20, a series inductor 21 (which includes an inherent resistance RW, discussed below), a filter capacitor 22, and a flyback diode 25. Coupled across inductor 21 is a resistor 30 in series with a capacitor 31, joining together at node 32. Node 32 in turn connects to an error amplifier 26, having in combination impedances Z1, Z2 and operational amplifier 27. Impedances Z1 and Z2 may include reactive elements to achieve lead/lag compensation to the overall operation of the regulator 11.
The output of amplifier 26 drives a conventional pulse-width modulator 28. The modulator 28 controls the opening and closing of switch 20, which is preferably a MOSFET but may be a bipolar transistor or the like. In this arrangement, the error amplifier 26 controls the duty cycle of the switch 20, while the switching frequency of the switch 20 remains substantially constant. It is understood, however, that other alternative techniques for controlling switch 20 may be used.
The combination of resistor 30 and capacitor 31 serve to provide to the error amplifier 26 signals representing the output voltage V0 and output current I0 from the regulator 11. The output current is substantially determined by the voltage drop across the resistance RW of inductor 21. This resistance is usually very small, typically much smaller than the intentionally introduced resistor of prior art regulators, discussed above. The output voltage is measured indirectly, here by voltage on node 23.
Briefly, the voltage on node 23 is approximately V0+I0RW. By the closed loop nature of the regulator 11, the output voltage V0 is maintained to be substantially equal to VREF-I0RW. Thus, the output impedance is approximately the resistance RW. Accordingly, the output voltage droops with increasing current I0. Since resistance RW is small, the amount of droop is correspondingly small and can be compensated for as discussed below.
The choice of resistor 30 and capacitor 31 affects the response of the switching regulator to transients in output current.
As noted above, the output voltage V0 decreases with increasing output current I0 due to any voltage drop across resistance RW. While the resistance of RW is small, at high output currents several tens of millivolts may be dropped across it. To compensate for any voltage drop across the resistance RW a resistor 34 is added across capacitor 31. In this case, the output voltage V0 is approximately
where R30 and R34 is the resistance of resistors 30 and 34, respectively.
A further adaptation is the addition of resistor 36 to the error amplifier 26. As can be readily understood by those with ordinary skill in the art, resistor 36 combined with impedance Z1 allows the output voltage V0 to be scaled to the reference voltage VREF and can be set accordingly.
The illustrated embodiment of
While the embodiment disclosed herein is a buck switching regulator, other types of switching regulator circuits may take advantage of this invention.
Having described the preferred embodiment of this invention, it will now be apparent to one of skill in the art that other embodiments incorporating its concept may be used. Therefore, this invention should not be limited to the disclosed embodiment, but rather should be limited only by the spirit and scope of the appended claims.
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